From b3eaf401667c111de4222b3a4e1ba9ff425360b2 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Tue, 13 Dec 2022 17:48:39 +0000 Subject: [PATCH] [X86] lowerShuffleAsVTRUNC - improve detection of cheap/free vector concatenation Handle the case where the lo/hi subvectors are a split load. --- llvm/lib/Target/X86/X86ISelLowering.cpp | 22 +- .../CodeGen/X86/shuffle-strided-with-offset-256.ll | 592 +++++++++++----- .../CodeGen/X86/shuffle-strided-with-offset-512.ll | 776 ++++----------------- .../X86/vector-interleaved-load-i16-stride-2.ll | 54 +- .../X86/vector-interleaved-load-i16-stride-4.ll | 181 +---- .../X86/vector-interleaved-load-i8-stride-2.ll | 46 +- .../X86/vector-interleaved-load-i8-stride-4.ll | 85 +-- .../X86/vector-interleaved-load-i8-stride-8.ll | 213 ++---- llvm/test/CodeGen/X86/x86-interleaved-access.ll | 53 +- 9 files changed, 717 insertions(+), 1305 deletions(-) diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 21da279..c003dae 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -12556,11 +12556,23 @@ static SDValue lowerShuffleAsVTRUNC(const SDLoc &DL, MVT VT, SDValue V1, UpperElts > 0 && isUndefInRange(Mask, NumSrcElts, UpperElts); // For offset truncations, ensure that the concat is cheap. - // TODO: Relax this? - if (Offset && (V1.getOpcode() != ISD::EXTRACT_SUBVECTOR || - V2.getOpcode() != ISD::EXTRACT_SUBVECTOR || - V1.getOperand(0) != V2.getOperand(0))) - continue; + if (Offset) { + auto IsCheapConcat = [&](SDValue Lo, SDValue Hi) { + if (Lo.getOpcode() == ISD::EXTRACT_SUBVECTOR && + Hi.getOpcode() == ISD::EXTRACT_SUBVECTOR) + return Lo.getOperand(0) == Hi.getOperand(0); + if (ISD::isNormalLoad(Lo.getNode()) && + ISD::isNormalLoad(Hi.getNode())) { + auto *LDLo = cast(Lo); + auto *LDHi = cast(Hi); + return DAG.areNonVolatileConsecutiveLoads( + LDHi, LDLo, Lo.getValueType().getStoreSize(), 1); + } + return false; + }; + if (!IsCheapConcat(V1, V2)) + continue; + } // As we're using both sources then we need to concat them together // and truncate from the double-sized src. diff --git a/llvm/test/CodeGen/X86/shuffle-strided-with-offset-256.ll b/llvm/test/CodeGen/X86/shuffle-strided-with-offset-256.ll index 5a322d9..02c66e3 100644 --- a/llvm/test/CodeGen/X86/shuffle-strided-with-offset-256.ll +++ b/llvm/test/CodeGen/X86/shuffle-strided-with-offset-256.ll @@ -23,16 +23,43 @@ define void @shuffle_v32i8_to_v16i8_1(ptr %L, ptr %S) nounwind { ; AVX-NEXT: vmovdqa %xmm0, (%rsi) ; AVX-NEXT: retq ; -; AVX512-LABEL: shuffle_v32i8_to_v16i8_1: -; AVX512: # %bb.0: -; AVX512-NEXT: vmovdqa (%rdi), %xmm0 -; AVX512-NEXT: vmovdqa 16(%rdi), %xmm1 -; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = <1,3,5,7,9,11,13,15,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] -; AVX512-NEXT: vmovdqa %xmm0, (%rsi) -; AVX512-NEXT: retq +; AVX512F-LABEL: shuffle_v32i8_to_v16i8_1: +; AVX512F: # %bb.0: +; AVX512F-NEXT: vmovdqa (%rdi), %xmm0 +; AVX512F-NEXT: vmovdqa 16(%rdi), %xmm1 +; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = <1,3,5,7,9,11,13,15,u,u,u,u,u,u,u,u> +; AVX512F-NEXT: vpshufb %xmm2, %xmm1, %xmm1 +; AVX512F-NEXT: vpshufb %xmm2, %xmm0, %xmm0 +; AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] +; AVX512F-NEXT: vmovdqa %xmm0, (%rsi) +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: shuffle_v32i8_to_v16i8_1: +; AVX512VL: # %bb.0: +; AVX512VL-NEXT: vmovdqa (%rdi), %xmm0 +; AVX512VL-NEXT: vmovdqa 16(%rdi), %xmm1 +; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = <1,3,5,7,9,11,13,15,u,u,u,u,u,u,u,u> +; AVX512VL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 +; AVX512VL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 +; AVX512VL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] +; AVX512VL-NEXT: vmovdqa %xmm0, (%rsi) +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: shuffle_v32i8_to_v16i8_1: +; AVX512BW: # %bb.0: +; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512BW-NEXT: vpsrlw $8, %ymm0, %ymm0 +; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 +; AVX512BW-NEXT: vmovdqa %xmm0, (%rsi) +; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: shuffle_v32i8_to_v16i8_1: +; AVX512BWVL: # %bb.0: +; AVX512BWVL-NEXT: vpsrlw $8, (%rdi), %ymm0 +; AVX512BWVL-NEXT: vpmovwb %ymm0, (%rsi) +; AVX512BWVL-NEXT: vzeroupper +; AVX512BWVL-NEXT: retq %vec = load <32 x i8>, ptr %L %strided.vec = shufflevector <32 x i8> %vec, <32 x i8> undef, <16 x i32> store <16 x i8> %strided.vec, ptr %S @@ -52,38 +79,34 @@ define void @shuffle_v16i16_to_v8i16_1(ptr %L, ptr %S) nounwind { ; ; AVX512F-LABEL: shuffle_v16i16_to_v8i16_1: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vmovdqa (%rdi), %xmm0 -; AVX512F-NEXT: vmovdqa 16(%rdi), %xmm1 -; AVX512F-NEXT: vpsrld $16, %xmm1, %xmm1 -; AVX512F-NEXT: vpsrld $16, %xmm0, %xmm0 -; AVX512F-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 +; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512F-NEXT: vpsrld $16, %ymm0, %ymm0 +; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 ; AVX512F-NEXT: vmovdqa %xmm0, (%rsi) +; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v16i16_to_v8i16_1: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vpsrld $16, 16(%rdi), %xmm0 -; AVX512VL-NEXT: vpsrld $16, (%rdi), %xmm1 -; AVX512VL-NEXT: vpackusdw %xmm0, %xmm1, %xmm0 -; AVX512VL-NEXT: vmovdqa %xmm0, (%rsi) +; AVX512VL-NEXT: vpsrld $16, (%rdi), %ymm0 +; AVX512VL-NEXT: vpmovdw %ymm0, (%rsi) +; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: shuffle_v16i16_to_v8i16_1: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa (%rdi), %xmm0 -; AVX512BW-NEXT: vmovdqa 16(%rdi), %xmm1 -; AVX512BW-NEXT: vpsrld $16, %xmm1, %xmm1 -; AVX512BW-NEXT: vpsrld $16, %xmm0, %xmm0 -; AVX512BW-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 +; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512BW-NEXT: vpsrld $16, %ymm0, %ymm0 +; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0 ; AVX512BW-NEXT: vmovdqa %xmm0, (%rsi) +; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: shuffle_v16i16_to_v8i16_1: ; AVX512BWVL: # %bb.0: -; AVX512BWVL-NEXT: vpsrld $16, 16(%rdi), %xmm0 -; AVX512BWVL-NEXT: vpsrld $16, (%rdi), %xmm1 -; AVX512BWVL-NEXT: vpackusdw %xmm0, %xmm1, %xmm0 -; AVX512BWVL-NEXT: vmovdqa %xmm0, (%rsi) +; AVX512BWVL-NEXT: vpsrld $16, (%rdi), %ymm0 +; AVX512BWVL-NEXT: vpmovdw %ymm0, (%rsi) +; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: retq %vec = load <16 x i16>, ptr %L %strided.vec = shufflevector <16 x i16> %vec, <16 x i16> undef, <8 x i32> @@ -123,16 +146,38 @@ define void @shuffle_v32i8_to_v8i8_1(ptr %L, ptr %S) nounwind { ; AVX-NEXT: vmovq %xmm0, (%rsi) ; AVX-NEXT: retq ; -; AVX512-LABEL: shuffle_v32i8_to_v8i8_1: -; AVX512: # %bb.0: -; AVX512-NEXT: vmovdqa (%rdi), %xmm0 -; AVX512-NEXT: vmovdqa 16(%rdi), %xmm1 -; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = <1,5,9,13,u,u,u,u,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] -; AVX512-NEXT: vmovq %xmm0, (%rsi) -; AVX512-NEXT: retq +; AVX512F-LABEL: shuffle_v32i8_to_v8i8_1: +; AVX512F: # %bb.0: +; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512F-NEXT: vpsrlw $8, %ymm0, %ymm0 +; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 +; AVX512F-NEXT: vmovq %xmm0, (%rsi) +; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: shuffle_v32i8_to_v8i8_1: +; AVX512VL: # %bb.0: +; AVX512VL-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0 +; AVX512VL-NEXT: vpmovdb %ymm0, (%rsi) +; AVX512VL-NEXT: vzeroupper +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: shuffle_v32i8_to_v8i8_1: +; AVX512BW: # %bb.0: +; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512BW-NEXT: vpsrlw $8, %ymm0, %ymm0 +; AVX512BW-NEXT: vpmovdb %zmm0, %xmm0 +; AVX512BW-NEXT: vmovq %xmm0, (%rsi) +; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: shuffle_v32i8_to_v8i8_1: +; AVX512BWVL: # %bb.0: +; AVX512BWVL-NEXT: vpsrlw $8, (%rdi), %ymm0 +; AVX512BWVL-NEXT: vpmovdb %ymm0, (%rsi) +; AVX512BWVL-NEXT: vzeroupper +; AVX512BWVL-NEXT: retq %vec = load <32 x i8>, ptr %L %strided.vec = shufflevector <32 x i8> %vec, <32 x i8> undef, <8 x i32> store <8 x i8> %strided.vec, ptr %S @@ -151,16 +196,37 @@ define void @shuffle_v32i8_to_v8i8_2(ptr %L, ptr %S) nounwind { ; AVX-NEXT: vmovq %xmm0, (%rsi) ; AVX-NEXT: retq ; -; AVX512-LABEL: shuffle_v32i8_to_v8i8_2: -; AVX512: # %bb.0: -; AVX512-NEXT: vmovdqa (%rdi), %xmm0 -; AVX512-NEXT: vmovdqa 16(%rdi), %xmm1 -; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = <2,6,10,14,u,u,u,u,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] -; AVX512-NEXT: vmovq %xmm0, (%rsi) -; AVX512-NEXT: retq +; AVX512F-LABEL: shuffle_v32i8_to_v8i8_2: +; AVX512F: # %bb.0: +; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512F-NEXT: vpsrld $16, %ymm0, %ymm0 +; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 +; AVX512F-NEXT: vmovq %xmm0, (%rsi) +; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: shuffle_v32i8_to_v8i8_2: +; AVX512VL: # %bb.0: +; AVX512VL-NEXT: vpsrld $16, (%rdi), %ymm0 +; AVX512VL-NEXT: vpmovdb %ymm0, (%rsi) +; AVX512VL-NEXT: vzeroupper +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: shuffle_v32i8_to_v8i8_2: +; AVX512BW: # %bb.0: +; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512BW-NEXT: vpsrld $16, %ymm0, %ymm0 +; AVX512BW-NEXT: vpmovdb %zmm0, %xmm0 +; AVX512BW-NEXT: vmovq %xmm0, (%rsi) +; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: shuffle_v32i8_to_v8i8_2: +; AVX512BWVL: # %bb.0: +; AVX512BWVL-NEXT: vpsrld $16, (%rdi), %ymm0 +; AVX512BWVL-NEXT: vpmovdb %ymm0, (%rsi) +; AVX512BWVL-NEXT: vzeroupper +; AVX512BWVL-NEXT: retq %vec = load <32 x i8>, ptr %L %strided.vec = shufflevector <32 x i8> %vec, <32 x i8> undef, <8 x i32> store <8 x i8> %strided.vec, ptr %S @@ -179,16 +245,37 @@ define void @shuffle_v32i8_to_v8i8_3(ptr %L, ptr %S) nounwind { ; AVX-NEXT: vmovq %xmm0, (%rsi) ; AVX-NEXT: retq ; -; AVX512-LABEL: shuffle_v32i8_to_v8i8_3: -; AVX512: # %bb.0: -; AVX512-NEXT: vmovdqa (%rdi), %xmm0 -; AVX512-NEXT: vmovdqa 16(%rdi), %xmm1 -; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = <3,7,11,15,u,u,u,u,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] -; AVX512-NEXT: vmovq %xmm0, (%rsi) -; AVX512-NEXT: retq +; AVX512F-LABEL: shuffle_v32i8_to_v8i8_3: +; AVX512F: # %bb.0: +; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512F-NEXT: vpsrld $24, %ymm0, %ymm0 +; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 +; AVX512F-NEXT: vmovq %xmm0, (%rsi) +; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: shuffle_v32i8_to_v8i8_3: +; AVX512VL: # %bb.0: +; AVX512VL-NEXT: vpsrld $24, (%rdi), %ymm0 +; AVX512VL-NEXT: vpmovdb %ymm0, (%rsi) +; AVX512VL-NEXT: vzeroupper +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: shuffle_v32i8_to_v8i8_3: +; AVX512BW: # %bb.0: +; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512BW-NEXT: vpsrld $24, %ymm0, %ymm0 +; AVX512BW-NEXT: vpmovdb %zmm0, %xmm0 +; AVX512BW-NEXT: vmovq %xmm0, (%rsi) +; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: shuffle_v32i8_to_v8i8_3: +; AVX512BWVL: # %bb.0: +; AVX512BWVL-NEXT: vpsrld $24, (%rdi), %ymm0 +; AVX512BWVL-NEXT: vpmovdb %ymm0, (%rsi) +; AVX512BWVL-NEXT: vzeroupper +; AVX512BWVL-NEXT: retq %vec = load <32 x i8>, ptr %L %strided.vec = shufflevector <32 x i8> %vec, <32 x i8> undef, <8 x i32> store <8 x i8> %strided.vec, ptr %S @@ -229,41 +316,34 @@ define void @shuffle_v16i16_to_v4i16_1(ptr %L, ptr %S) nounwind { ; ; AVX512F-LABEL: shuffle_v16i16_to_v4i16_1: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vpshufd {{.*#+}} xmm0 = mem[0,2,2,3] -; AVX512F-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[1,3,2,3,4,5,6,7] -; AVX512F-NEXT: vpshufd {{.*#+}} xmm1 = mem[0,2,2,3] -; AVX512F-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[1,3,2,3,4,5,6,7] -; AVX512F-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] +; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512F-NEXT: vpsrld $16, %ymm0, %ymm0 +; AVX512F-NEXT: vpmovqw %zmm0, %xmm0 ; AVX512F-NEXT: vmovq %xmm0, (%rsi) +; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v16i16_to_v4i16_1: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa (%rdi), %xmm0 -; AVX512VL-NEXT: vmovdqa 16(%rdi), %xmm1 -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [2,3,10,11,8,9,10,11,8,9,10,11,12,13,14,15] -; AVX512VL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512VL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] -; AVX512VL-NEXT: vmovq %xmm0, (%rsi) +; AVX512VL-NEXT: vpsrld $16, (%rdi), %ymm0 +; AVX512VL-NEXT: vpmovqw %ymm0, (%rsi) +; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: shuffle_v16i16_to_v4i16_1: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm0 = [1,5,33,37,4,5,36,37] -; AVX512BW-NEXT: vmovdqa (%rdi), %xmm1 -; AVX512BW-NEXT: vmovdqa 16(%rdi), %xmm2 -; AVX512BW-NEXT: vpermt2w %zmm2, %zmm0, %zmm1 -; AVX512BW-NEXT: vmovq %xmm1, (%rsi) +; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512BW-NEXT: vpsrld $16, %ymm0, %ymm0 +; AVX512BW-NEXT: vpmovqw %zmm0, %xmm0 +; AVX512BW-NEXT: vmovq %xmm0, (%rsi) ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: shuffle_v16i16_to_v4i16_1: ; AVX512BWVL: # %bb.0: -; AVX512BWVL-NEXT: vmovdqa (%rdi), %xmm0 -; AVX512BWVL-NEXT: vmovdqa {{.*#+}} xmm1 = <1,5,9,13,u,u,u,u> -; AVX512BWVL-NEXT: vpermi2w 16(%rdi), %xmm0, %xmm1 -; AVX512BWVL-NEXT: vmovq %xmm1, (%rsi) +; AVX512BWVL-NEXT: vpsrld $16, (%rdi), %ymm0 +; AVX512BWVL-NEXT: vpmovqw %ymm0, (%rsi) +; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: retq %vec = load <16 x i16>, ptr %L %strided.vec = shufflevector <16 x i16> %vec, <16 x i16> undef, <4 x i32> @@ -305,41 +385,32 @@ define void @shuffle_v16i16_to_v4i16_2(ptr %L, ptr %S) nounwind { ; ; AVX512F-LABEL: shuffle_v16i16_to_v4i16_2: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vpshufd {{.*#+}} xmm0 = mem[3,1,2,3] -; AVX512F-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[2,0,2,3,4,5,6,7] -; AVX512F-NEXT: vpshufd {{.*#+}} xmm1 = mem[3,1,2,3] -; AVX512F-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[2,0,2,3,4,5,6,7] -; AVX512F-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] +; AVX512F-NEXT: vpshufd {{.*#+}} ymm0 = mem[1,1,3,3,5,5,7,7] +; AVX512F-NEXT: vpmovqw %zmm0, %xmm0 ; AVX512F-NEXT: vmovq %xmm0, (%rsi) +; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v16i16_to_v4i16_2: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa (%rdi), %xmm0 -; AVX512VL-NEXT: vmovdqa 16(%rdi), %xmm1 -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [4,5,12,13,4,5,6,7,8,9,10,11,12,13,14,15] -; AVX512VL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512VL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] -; AVX512VL-NEXT: vmovq %xmm0, (%rsi) +; AVX512VL-NEXT: vpshufd {{.*#+}} ymm0 = mem[1,1,3,3,5,5,7,7] +; AVX512VL-NEXT: vpmovqw %ymm0, (%rsi) +; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: shuffle_v16i16_to_v4i16_2: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm0 = [2,6,34,38,2,3,34,35] -; AVX512BW-NEXT: vmovdqa (%rdi), %xmm1 -; AVX512BW-NEXT: vmovdqa 16(%rdi), %xmm2 -; AVX512BW-NEXT: vpermt2w %zmm2, %zmm0, %zmm1 -; AVX512BW-NEXT: vmovq %xmm1, (%rsi) +; AVX512BW-NEXT: vpshufd {{.*#+}} ymm0 = mem[1,1,3,3,5,5,7,7] +; AVX512BW-NEXT: vpmovqw %zmm0, %xmm0 +; AVX512BW-NEXT: vmovq %xmm0, (%rsi) ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: shuffle_v16i16_to_v4i16_2: ; AVX512BWVL: # %bb.0: -; AVX512BWVL-NEXT: vmovdqa (%rdi), %xmm0 -; AVX512BWVL-NEXT: vmovdqa {{.*#+}} xmm1 = <2,6,10,14,u,u,u,u> -; AVX512BWVL-NEXT: vpermi2w 16(%rdi), %xmm0, %xmm1 -; AVX512BWVL-NEXT: vmovq %xmm1, (%rsi) +; AVX512BWVL-NEXT: vpshufd {{.*#+}} ymm0 = mem[1,1,3,3,5,5,7,7] +; AVX512BWVL-NEXT: vpmovqw %ymm0, (%rsi) +; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: retq %vec = load <16 x i16>, ptr %L %strided.vec = shufflevector <16 x i16> %vec, <16 x i16> undef, <4 x i32> @@ -381,41 +452,34 @@ define void @shuffle_v16i16_to_v4i16_3(ptr %L, ptr %S) nounwind { ; ; AVX512F-LABEL: shuffle_v16i16_to_v4i16_3: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vpshufd {{.*#+}} xmm0 = mem[3,1,2,3] -; AVX512F-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[3,1,2,3,4,5,6,7] -; AVX512F-NEXT: vpshufd {{.*#+}} xmm1 = mem[3,1,2,3] -; AVX512F-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[3,1,2,3,4,5,6,7] -; AVX512F-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] +; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512F-NEXT: vpsrlq $48, %ymm0, %ymm0 +; AVX512F-NEXT: vpmovqw %zmm0, %xmm0 ; AVX512F-NEXT: vmovq %xmm0, (%rsi) +; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v16i16_to_v4i16_3: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa (%rdi), %xmm0 -; AVX512VL-NEXT: vmovdqa 16(%rdi), %xmm1 -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [6,7,14,15,4,5,6,7,8,9,10,11,12,13,14,15] -; AVX512VL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512VL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] -; AVX512VL-NEXT: vmovq %xmm0, (%rsi) +; AVX512VL-NEXT: vpsrlq $48, (%rdi), %ymm0 +; AVX512VL-NEXT: vpmovqw %ymm0, (%rsi) +; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: shuffle_v16i16_to_v4i16_3: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm0 = [3,7,35,39,2,3,34,35] -; AVX512BW-NEXT: vmovdqa (%rdi), %xmm1 -; AVX512BW-NEXT: vmovdqa 16(%rdi), %xmm2 -; AVX512BW-NEXT: vpermt2w %zmm2, %zmm0, %zmm1 -; AVX512BW-NEXT: vmovq %xmm1, (%rsi) +; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512BW-NEXT: vpsrlq $48, %ymm0, %ymm0 +; AVX512BW-NEXT: vpmovqw %zmm0, %xmm0 +; AVX512BW-NEXT: vmovq %xmm0, (%rsi) ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: shuffle_v16i16_to_v4i16_3: ; AVX512BWVL: # %bb.0: -; AVX512BWVL-NEXT: vmovdqa (%rdi), %xmm0 -; AVX512BWVL-NEXT: vmovdqa {{.*#+}} xmm1 = <3,7,11,15,u,u,u,u> -; AVX512BWVL-NEXT: vpermi2w 16(%rdi), %xmm0, %xmm1 -; AVX512BWVL-NEXT: vmovq %xmm1, (%rsi) +; AVX512BWVL-NEXT: vpsrlq $48, (%rdi), %ymm0 +; AVX512BWVL-NEXT: vpmovqw %ymm0, (%rsi) +; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: retq %vec = load <16 x i16>, ptr %L %strided.vec = shufflevector <16 x i16> %vec, <16 x i16> undef, <4 x i32> @@ -435,16 +499,38 @@ define void @shuffle_v32i8_to_v4i8_1(ptr %L, ptr %S) nounwind { ; AVX-NEXT: vmovd %xmm0, (%rsi) ; AVX-NEXT: retq ; -; AVX512-LABEL: shuffle_v32i8_to_v4i8_1: -; AVX512: # %bb.0: -; AVX512-NEXT: vmovdqa (%rdi), %xmm0 -; AVX512-NEXT: vmovdqa 16(%rdi), %xmm1 -; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = <1,9,u,u,u,u,u,u,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512-NEXT: vmovd %xmm0, (%rsi) -; AVX512-NEXT: retq +; AVX512F-LABEL: shuffle_v32i8_to_v4i8_1: +; AVX512F: # %bb.0: +; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512F-NEXT: vpsrlw $8, %ymm0, %ymm0 +; AVX512F-NEXT: vpmovqb %zmm0, %xmm0 +; AVX512F-NEXT: vmovd %xmm0, (%rsi) +; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: shuffle_v32i8_to_v4i8_1: +; AVX512VL: # %bb.0: +; AVX512VL-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0 +; AVX512VL-NEXT: vpmovqb %ymm0, (%rsi) +; AVX512VL-NEXT: vzeroupper +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: shuffle_v32i8_to_v4i8_1: +; AVX512BW: # %bb.0: +; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512BW-NEXT: vpsrlw $8, %ymm0, %ymm0 +; AVX512BW-NEXT: vpmovqb %zmm0, %xmm0 +; AVX512BW-NEXT: vmovd %xmm0, (%rsi) +; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: shuffle_v32i8_to_v4i8_1: +; AVX512BWVL: # %bb.0: +; AVX512BWVL-NEXT: vpsrlw $8, (%rdi), %ymm0 +; AVX512BWVL-NEXT: vpmovqb %ymm0, (%rsi) +; AVX512BWVL-NEXT: vzeroupper +; AVX512BWVL-NEXT: retq %vec = load <32 x i8>, ptr %L %strided.vec = shufflevector <32 x i8> %vec, <32 x i8> undef, <4 x i32> store <4 x i8> %strided.vec, ptr %S @@ -463,16 +549,37 @@ define void @shuffle_v32i8_to_v4i8_2(ptr %L, ptr %S) nounwind { ; AVX-NEXT: vmovd %xmm0, (%rsi) ; AVX-NEXT: retq ; -; AVX512-LABEL: shuffle_v32i8_to_v4i8_2: -; AVX512: # %bb.0: -; AVX512-NEXT: vmovdqa (%rdi), %xmm0 -; AVX512-NEXT: vmovdqa 16(%rdi), %xmm1 -; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = <2,10,u,u,u,u,u,u,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512-NEXT: vmovd %xmm0, (%rsi) -; AVX512-NEXT: retq +; AVX512F-LABEL: shuffle_v32i8_to_v4i8_2: +; AVX512F: # %bb.0: +; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512F-NEXT: vpsrld $16, %ymm0, %ymm0 +; AVX512F-NEXT: vpmovqb %zmm0, %xmm0 +; AVX512F-NEXT: vmovd %xmm0, (%rsi) +; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: shuffle_v32i8_to_v4i8_2: +; AVX512VL: # %bb.0: +; AVX512VL-NEXT: vpsrld $16, (%rdi), %ymm0 +; AVX512VL-NEXT: vpmovqb %ymm0, (%rsi) +; AVX512VL-NEXT: vzeroupper +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: shuffle_v32i8_to_v4i8_2: +; AVX512BW: # %bb.0: +; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512BW-NEXT: vpsrld $16, %ymm0, %ymm0 +; AVX512BW-NEXT: vpmovqb %zmm0, %xmm0 +; AVX512BW-NEXT: vmovd %xmm0, (%rsi) +; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: shuffle_v32i8_to_v4i8_2: +; AVX512BWVL: # %bb.0: +; AVX512BWVL-NEXT: vpsrld $16, (%rdi), %ymm0 +; AVX512BWVL-NEXT: vpmovqb %ymm0, (%rsi) +; AVX512BWVL-NEXT: vzeroupper +; AVX512BWVL-NEXT: retq %vec = load <32 x i8>, ptr %L %strided.vec = shufflevector <32 x i8> %vec, <32 x i8> undef, <4 x i32> store <4 x i8> %strided.vec, ptr %S @@ -491,16 +598,37 @@ define void @shuffle_v32i8_to_v4i8_3(ptr %L, ptr %S) nounwind { ; AVX-NEXT: vmovd %xmm0, (%rsi) ; AVX-NEXT: retq ; -; AVX512-LABEL: shuffle_v32i8_to_v4i8_3: -; AVX512: # %bb.0: -; AVX512-NEXT: vmovdqa (%rdi), %xmm0 -; AVX512-NEXT: vmovdqa 16(%rdi), %xmm1 -; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = <3,11,u,u,u,u,u,u,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512-NEXT: vmovd %xmm0, (%rsi) -; AVX512-NEXT: retq +; AVX512F-LABEL: shuffle_v32i8_to_v4i8_3: +; AVX512F: # %bb.0: +; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512F-NEXT: vpsrld $24, %ymm0, %ymm0 +; AVX512F-NEXT: vpmovqb %zmm0, %xmm0 +; AVX512F-NEXT: vmovd %xmm0, (%rsi) +; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: shuffle_v32i8_to_v4i8_3: +; AVX512VL: # %bb.0: +; AVX512VL-NEXT: vpsrld $24, (%rdi), %ymm0 +; AVX512VL-NEXT: vpmovqb %ymm0, (%rsi) +; AVX512VL-NEXT: vzeroupper +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: shuffle_v32i8_to_v4i8_3: +; AVX512BW: # %bb.0: +; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512BW-NEXT: vpsrld $24, %ymm0, %ymm0 +; AVX512BW-NEXT: vpmovqb %zmm0, %xmm0 +; AVX512BW-NEXT: vmovd %xmm0, (%rsi) +; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: shuffle_v32i8_to_v4i8_3: +; AVX512BWVL: # %bb.0: +; AVX512BWVL-NEXT: vpsrld $24, (%rdi), %ymm0 +; AVX512BWVL-NEXT: vpmovqb %ymm0, (%rsi) +; AVX512BWVL-NEXT: vzeroupper +; AVX512BWVL-NEXT: retq %vec = load <32 x i8>, ptr %L %strided.vec = shufflevector <32 x i8> %vec, <32 x i8> undef, <4 x i32> store <4 x i8> %strided.vec, ptr %S @@ -519,16 +647,35 @@ define void @shuffle_v32i8_to_v4i8_4(ptr %L, ptr %S) nounwind { ; AVX-NEXT: vmovd %xmm0, (%rsi) ; AVX-NEXT: retq ; -; AVX512-LABEL: shuffle_v32i8_to_v4i8_4: -; AVX512: # %bb.0: -; AVX512-NEXT: vmovdqa (%rdi), %xmm0 -; AVX512-NEXT: vmovdqa 16(%rdi), %xmm1 -; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = <4,12,u,u,u,u,u,u,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512-NEXT: vmovd %xmm0, (%rsi) -; AVX512-NEXT: retq +; AVX512F-LABEL: shuffle_v32i8_to_v4i8_4: +; AVX512F: # %bb.0: +; AVX512F-NEXT: vpshufd {{.*#+}} ymm0 = mem[1,1,3,3,5,5,7,7] +; AVX512F-NEXT: vpmovqb %zmm0, %xmm0 +; AVX512F-NEXT: vmovd %xmm0, (%rsi) +; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: shuffle_v32i8_to_v4i8_4: +; AVX512VL: # %bb.0: +; AVX512VL-NEXT: vpshufd {{.*#+}} ymm0 = mem[1,1,3,3,5,5,7,7] +; AVX512VL-NEXT: vpmovqb %ymm0, (%rsi) +; AVX512VL-NEXT: vzeroupper +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: shuffle_v32i8_to_v4i8_4: +; AVX512BW: # %bb.0: +; AVX512BW-NEXT: vpshufd {{.*#+}} ymm0 = mem[1,1,3,3,5,5,7,7] +; AVX512BW-NEXT: vpmovqb %zmm0, %xmm0 +; AVX512BW-NEXT: vmovd %xmm0, (%rsi) +; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: shuffle_v32i8_to_v4i8_4: +; AVX512BWVL: # %bb.0: +; AVX512BWVL-NEXT: vpshufd {{.*#+}} ymm0 = mem[1,1,3,3,5,5,7,7] +; AVX512BWVL-NEXT: vpmovqb %ymm0, (%rsi) +; AVX512BWVL-NEXT: vzeroupper +; AVX512BWVL-NEXT: retq %vec = load <32 x i8>, ptr %L %strided.vec = shufflevector <32 x i8> %vec, <32 x i8> undef, <4 x i32> store <4 x i8> %strided.vec, ptr %S @@ -547,16 +694,37 @@ define void @shuffle_v32i8_to_v4i8_5(ptr %L, ptr %S) nounwind { ; AVX-NEXT: vmovd %xmm0, (%rsi) ; AVX-NEXT: retq ; -; AVX512-LABEL: shuffle_v32i8_to_v4i8_5: -; AVX512: # %bb.0: -; AVX512-NEXT: vmovdqa (%rdi), %xmm0 -; AVX512-NEXT: vmovdqa 16(%rdi), %xmm1 -; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = <5,13,u,u,u,u,u,u,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512-NEXT: vmovd %xmm0, (%rsi) -; AVX512-NEXT: retq +; AVX512F-LABEL: shuffle_v32i8_to_v4i8_5: +; AVX512F: # %bb.0: +; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512F-NEXT: vpsrlq $40, %ymm0, %ymm0 +; AVX512F-NEXT: vpmovqb %zmm0, %xmm0 +; AVX512F-NEXT: vmovd %xmm0, (%rsi) +; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: shuffle_v32i8_to_v4i8_5: +; AVX512VL: # %bb.0: +; AVX512VL-NEXT: vpsrlq $40, (%rdi), %ymm0 +; AVX512VL-NEXT: vpmovqb %ymm0, (%rsi) +; AVX512VL-NEXT: vzeroupper +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: shuffle_v32i8_to_v4i8_5: +; AVX512BW: # %bb.0: +; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512BW-NEXT: vpsrlq $40, %ymm0, %ymm0 +; AVX512BW-NEXT: vpmovqb %zmm0, %xmm0 +; AVX512BW-NEXT: vmovd %xmm0, (%rsi) +; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: shuffle_v32i8_to_v4i8_5: +; AVX512BWVL: # %bb.0: +; AVX512BWVL-NEXT: vpsrlq $40, (%rdi), %ymm0 +; AVX512BWVL-NEXT: vpmovqb %ymm0, (%rsi) +; AVX512BWVL-NEXT: vzeroupper +; AVX512BWVL-NEXT: retq %vec = load <32 x i8>, ptr %L %strided.vec = shufflevector <32 x i8> %vec, <32 x i8> undef, <4 x i32> store <4 x i8> %strided.vec, ptr %S @@ -575,16 +743,37 @@ define void @shuffle_v32i8_to_v4i8_6(ptr %L, ptr %S) nounwind { ; AVX-NEXT: vmovd %xmm0, (%rsi) ; AVX-NEXT: retq ; -; AVX512-LABEL: shuffle_v32i8_to_v4i8_6: -; AVX512: # %bb.0: -; AVX512-NEXT: vmovdqa (%rdi), %xmm0 -; AVX512-NEXT: vmovdqa 16(%rdi), %xmm1 -; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = <6,14,u,u,u,u,u,u,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512-NEXT: vmovd %xmm0, (%rsi) -; AVX512-NEXT: retq +; AVX512F-LABEL: shuffle_v32i8_to_v4i8_6: +; AVX512F: # %bb.0: +; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512F-NEXT: vpsrlq $48, %ymm0, %ymm0 +; AVX512F-NEXT: vpmovqb %zmm0, %xmm0 +; AVX512F-NEXT: vmovd %xmm0, (%rsi) +; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: shuffle_v32i8_to_v4i8_6: +; AVX512VL: # %bb.0: +; AVX512VL-NEXT: vpsrlq $48, (%rdi), %ymm0 +; AVX512VL-NEXT: vpmovqb %ymm0, (%rsi) +; AVX512VL-NEXT: vzeroupper +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: shuffle_v32i8_to_v4i8_6: +; AVX512BW: # %bb.0: +; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512BW-NEXT: vpsrlq $48, %ymm0, %ymm0 +; AVX512BW-NEXT: vpmovqb %zmm0, %xmm0 +; AVX512BW-NEXT: vmovd %xmm0, (%rsi) +; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: shuffle_v32i8_to_v4i8_6: +; AVX512BWVL: # %bb.0: +; AVX512BWVL-NEXT: vpsrlq $48, (%rdi), %ymm0 +; AVX512BWVL-NEXT: vpmovqb %ymm0, (%rsi) +; AVX512BWVL-NEXT: vzeroupper +; AVX512BWVL-NEXT: retq %vec = load <32 x i8>, ptr %L %strided.vec = shufflevector <32 x i8> %vec, <32 x i8> undef, <4 x i32> store <4 x i8> %strided.vec, ptr %S @@ -603,16 +792,37 @@ define void @shuffle_v32i8_to_v4i8_7(ptr %L, ptr %S) nounwind { ; AVX-NEXT: vmovd %xmm0, (%rsi) ; AVX-NEXT: retq ; -; AVX512-LABEL: shuffle_v32i8_to_v4i8_7: -; AVX512: # %bb.0: -; AVX512-NEXT: vmovdqa (%rdi), %xmm0 -; AVX512-NEXT: vmovdqa 16(%rdi), %xmm1 -; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = <7,15,u,u,u,u,u,u,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512-NEXT: vmovd %xmm0, (%rsi) -; AVX512-NEXT: retq +; AVX512F-LABEL: shuffle_v32i8_to_v4i8_7: +; AVX512F: # %bb.0: +; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512F-NEXT: vpsrlq $56, %ymm0, %ymm0 +; AVX512F-NEXT: vpmovqb %zmm0, %xmm0 +; AVX512F-NEXT: vmovd %xmm0, (%rsi) +; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: shuffle_v32i8_to_v4i8_7: +; AVX512VL: # %bb.0: +; AVX512VL-NEXT: vpsrlq $56, (%rdi), %ymm0 +; AVX512VL-NEXT: vpmovqb %ymm0, (%rsi) +; AVX512VL-NEXT: vzeroupper +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: shuffle_v32i8_to_v4i8_7: +; AVX512BW: # %bb.0: +; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512BW-NEXT: vpsrlq $56, %ymm0, %ymm0 +; AVX512BW-NEXT: vpmovqb %zmm0, %xmm0 +; AVX512BW-NEXT: vmovd %xmm0, (%rsi) +; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: shuffle_v32i8_to_v4i8_7: +; AVX512BWVL: # %bb.0: +; AVX512BWVL-NEXT: vpsrlq $56, (%rdi), %ymm0 +; AVX512BWVL-NEXT: vpmovqb %ymm0, (%rsi) +; AVX512BWVL-NEXT: vzeroupper +; AVX512BWVL-NEXT: retq %vec = load <32 x i8>, ptr %L %strided.vec = shufflevector <32 x i8> %vec, <32 x i8> undef, <4 x i32> store <4 x i8> %strided.vec, ptr %S diff --git a/llvm/test/CodeGen/X86/shuffle-strided-with-offset-512.ll b/llvm/test/CodeGen/X86/shuffle-strided-with-offset-512.ll index e1cf0c4..6938b77 100644 --- a/llvm/test/CodeGen/X86/shuffle-strided-with-offset-512.ll +++ b/llvm/test/CodeGen/X86/shuffle-strided-with-offset-512.ll @@ -20,29 +20,19 @@ define void @shuffle_v64i8_to_v32i8_1(ptr %L, ptr %S) nounwind { ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; -; AVX512BWVL-FAST-ALL-LABEL: shuffle_v64i8_to_v32i8_1: -; AVX512BWVL-FAST-ALL: # %bb.0: -; AVX512BWVL-FAST-ALL-NEXT: vmovdqa (%rdi), %ymm0 -; AVX512BWVL-FAST-ALL-NEXT: vmovdqa 32(%rdi), %ymm1 -; AVX512BWVL-FAST-ALL-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[u,u,u,u,u,u,u,u,1,3,5,7,9,11,13,15,u,u,u,u,u,u,u,u,17,19,21,23,25,27,29,31] -; AVX512BWVL-FAST-ALL-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[1,3,5,7,9,11,13,15,u,u,u,u,u,u,u,u,17,19,21,23,25,27,29,31,u,u,u,u,u,u,u,u] -; AVX512BWVL-FAST-ALL-NEXT: vmovdqa {{.*#+}} ymm2 = [0,2,5,7] -; AVX512BWVL-FAST-ALL-NEXT: vpermi2q %ymm1, %ymm0, %ymm2 -; AVX512BWVL-FAST-ALL-NEXT: vmovdqa %ymm2, (%rsi) -; AVX512BWVL-FAST-ALL-NEXT: vzeroupper -; AVX512BWVL-FAST-ALL-NEXT: retq +; AVX512BW-LABEL: shuffle_v64i8_to_v32i8_1: +; AVX512BW: # %bb.0: +; AVX512BW-NEXT: vpsrlw $8, (%rdi), %zmm0 +; AVX512BW-NEXT: vpmovwb %zmm0, (%rsi) +; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: retq ; -; AVX512BWVL-FAST-PERLANE-LABEL: shuffle_v64i8_to_v32i8_1: -; AVX512BWVL-FAST-PERLANE: # %bb.0: -; AVX512BWVL-FAST-PERLANE-NEXT: vmovdqa (%rdi), %ymm0 -; AVX512BWVL-FAST-PERLANE-NEXT: vmovdqa 32(%rdi), %ymm1 -; AVX512BWVL-FAST-PERLANE-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[u,u,u,u,u,u,u,u,1,3,5,7,9,11,13,15,u,u,u,u,u,u,u,u,17,19,21,23,25,27,29,31] -; AVX512BWVL-FAST-PERLANE-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[1,3,5,7,9,11,13,15,u,u,u,u,u,u,u,u,17,19,21,23,25,27,29,31,u,u,u,u,u,u,u,u] -; AVX512BWVL-FAST-PERLANE-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7] -; AVX512BWVL-FAST-PERLANE-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3] -; AVX512BWVL-FAST-PERLANE-NEXT: vmovdqa %ymm0, (%rsi) -; AVX512BWVL-FAST-PERLANE-NEXT: vzeroupper -; AVX512BWVL-FAST-PERLANE-NEXT: retq +; AVX512BWVL-LABEL: shuffle_v64i8_to_v32i8_1: +; AVX512BWVL: # %bb.0: +; AVX512BWVL-NEXT: vpsrlw $8, (%rdi), %zmm0 +; AVX512BWVL-NEXT: vpmovwb %zmm0, (%rsi) +; AVX512BWVL-NEXT: vzeroupper +; AVX512BWVL-NEXT: retq %vec = load <64 x i8>, ptr %L %strided.vec = shufflevector <64 x i8> %vec, <64 x i8> undef, <32 x i32> store <32 x i8> %strided.vec, ptr %S @@ -50,37 +40,12 @@ define void @shuffle_v64i8_to_v32i8_1(ptr %L, ptr %S) nounwind { } define void @shuffle_v32i16_to_v16i16_1(ptr %L, ptr %S) nounwind { -; AVX512F-LABEL: shuffle_v32i16_to_v16i16_1: -; AVX512F: # %bb.0: -; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 -; AVX512F-NEXT: vmovdqa 32(%rdi), %ymm1 -; AVX512F-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[u,u,u,u,u,u,u,u,2,3,6,7,10,11,14,15,u,u,u,u,u,u,u,u,18,19,22,23,26,27,30,31] -; AVX512F-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[2,3,6,7,10,11,14,15,u,u,u,u,u,u,u,u,18,19,22,23,26,27,30,31,u,u,u,u,u,u,u,u] -; AVX512F-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7] -; AVX512F-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3] -; AVX512F-NEXT: vmovdqa %ymm0, (%rsi) -; AVX512F-NEXT: vzeroupper -; AVX512F-NEXT: retq -; -; AVX512BW-LABEL: shuffle_v32i16_to_v16i16_1: -; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm0 = [1,3,5,7,33,35,37,39,9,11,13,15,41,43,45,47] -; AVX512BW-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512BW-NEXT: vmovdqa 32(%rdi), %ymm2 -; AVX512BW-NEXT: vpermt2w %zmm2, %zmm0, %zmm1 -; AVX512BW-NEXT: vpermq {{.*#+}} ymm0 = ymm1[0,2,1,3] -; AVX512BW-NEXT: vmovdqa %ymm0, (%rsi) -; AVX512BW-NEXT: vzeroupper -; AVX512BW-NEXT: retq -; -; AVX512BWVL-LABEL: shuffle_v32i16_to_v16i16_1: -; AVX512BWVL: # %bb.0: -; AVX512BWVL-NEXT: vmovdqa (%rdi), %ymm0 -; AVX512BWVL-NEXT: vmovdqa {{.*#+}} ymm1 = [1,3,5,7,9,11,13,15,17,19,21,23,25,27,29,31] -; AVX512BWVL-NEXT: vpermi2w 32(%rdi), %ymm0, %ymm1 -; AVX512BWVL-NEXT: vmovdqa %ymm1, (%rsi) -; AVX512BWVL-NEXT: vzeroupper -; AVX512BWVL-NEXT: retq +; AVX512-LABEL: shuffle_v32i16_to_v16i16_1: +; AVX512: # %bb.0: +; AVX512-NEXT: vpsrld $16, (%rdi), %zmm0 +; AVX512-NEXT: vpmovdw %zmm0, (%rsi) +; AVX512-NEXT: vzeroupper +; AVX512-NEXT: retq %vec = load <32 x i16>, ptr %L %strided.vec = shufflevector <32 x i16> %vec, <32 x i16> undef, <16 x i32> store <16 x i16> %strided.vec, ptr %S @@ -123,64 +88,37 @@ define void @shuffle_v16i32_to_v8i32_1(ptr %L, ptr %S) nounwind { define void @shuffle_v64i8_to_v16i8_1(ptr %L, ptr %S) nounwind { ; AVX512F-LABEL: shuffle_v64i8_to_v16i8_1: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vmovdqa 48(%rdi), %xmm0 -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm1 = -; AVX512F-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX512F-NEXT: vmovdqa 32(%rdi), %xmm2 -; AVX512F-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512F-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] -; AVX512F-NEXT: vmovdqa (%rdi), %ymm1 +; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512F-NEXT: vmovdqa 32(%rdi), %ymm1 +; AVX512F-NEXT: vpsrlw $8, %ymm0, %ymm0 ; AVX512F-NEXT: vpsrlw $8, %ymm1, %ymm1 -; AVX512F-NEXT: vpmovdb %zmm1, %xmm1 -; AVX512F-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] -; AVX512F-NEXT: vmovdqa %xmm0, (%rsi) +; AVX512F-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 +; AVX512F-NEXT: vpmovdb %zmm0, (%rsi) ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v64i8_to_v16i8_1: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa 48(%rdi), %xmm0 -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm1 = -; AVX512VL-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: vmovdqa 32(%rdi), %xmm2 -; AVX512VL-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] -; AVX512VL-NEXT: vmovdqa (%rdi), %ymm1 +; AVX512VL-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512VL-NEXT: vmovdqa 32(%rdi), %ymm1 +; AVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0 ; AVX512VL-NEXT: vpsrlw $8, %ymm1, %ymm1 -; AVX512VL-NEXT: vpmovdb %ymm1, %xmm1 -; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] -; AVX512VL-NEXT: vmovdqa %xmm0, (%rsi) +; AVX512VL-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 +; AVX512VL-NEXT: vpmovdb %zmm0, (%rsi) ; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: shuffle_v64i8_to_v16i8_1: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa 48(%rdi), %xmm0 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = -; AVX512BW-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX512BW-NEXT: vmovdqa 32(%rdi), %xmm2 -; AVX512BW-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512BW-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] -; AVX512BW-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512BW-NEXT: vpsrlw $8, %ymm1, %ymm1 -; AVX512BW-NEXT: vpmovdb %zmm1, %xmm1 -; AVX512BW-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] -; AVX512BW-NEXT: vmovdqa %xmm0, (%rsi) +; AVX512BW-NEXT: vpsrlw $8, (%rdi), %zmm0 +; AVX512BW-NEXT: vpmovdb %zmm0, (%rsi) ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: shuffle_v64i8_to_v16i8_1: ; AVX512BWVL: # %bb.0: -; AVX512BWVL-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512BWVL-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512BWVL-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512BWVL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] -; AVX512BWVL-NEXT: vpsrlw $8, (%rdi), %ymm1 -; AVX512BWVL-NEXT: vpmovdb %ymm1, %xmm1 -; AVX512BWVL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] -; AVX512BWVL-NEXT: vmovdqa %xmm0, (%rsi) +; AVX512BWVL-NEXT: vpsrlw $8, (%rdi), %zmm0 +; AVX512BWVL-NEXT: vpmovdb %zmm0, (%rsi) ; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: retq %vec = load <64 x i8>, ptr %L @@ -192,63 +130,33 @@ define void @shuffle_v64i8_to_v16i8_1(ptr %L, ptr %S) nounwind { define void @shuffle_v64i8_to_v16i8_2(ptr %L, ptr %S) nounwind { ; AVX512F-LABEL: shuffle_v64i8_to_v16i8_2: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vmovdqa 48(%rdi), %xmm0 -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm1 = -; AVX512F-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX512F-NEXT: vmovdqa 32(%rdi), %xmm2 -; AVX512F-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512F-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] -; AVX512F-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512F-NEXT: vpsrld $16, %ymm1, %ymm1 -; AVX512F-NEXT: vpmovdb %zmm1, %xmm1 -; AVX512F-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] -; AVX512F-NEXT: vmovdqa %xmm0, (%rsi) +; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512F-NEXT: vinserti64x4 $1, 32(%rdi), %zmm0, %zmm0 +; AVX512F-NEXT: vpsrld $16, %zmm0, %zmm0 +; AVX512F-NEXT: vpmovdb %zmm0, (%rsi) ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v64i8_to_v16i8_2: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512VL-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512VL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512VL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] -; AVX512VL-NEXT: vpsrld $16, (%rdi), %ymm1 -; AVX512VL-NEXT: vpmovdb %ymm1, %xmm1 -; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] -; AVX512VL-NEXT: vmovdqa %xmm0, (%rsi) +; AVX512VL-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512VL-NEXT: vinserti64x4 $1, 32(%rdi), %zmm0, %zmm0 +; AVX512VL-NEXT: vpsrld $16, %zmm0, %zmm0 +; AVX512VL-NEXT: vpmovdb %zmm0, (%rsi) ; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: shuffle_v64i8_to_v16i8_2: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa 48(%rdi), %xmm0 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = -; AVX512BW-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX512BW-NEXT: vmovdqa 32(%rdi), %xmm2 -; AVX512BW-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512BW-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] -; AVX512BW-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512BW-NEXT: vpsrld $16, %ymm1, %ymm1 -; AVX512BW-NEXT: vpmovdb %zmm1, %xmm1 -; AVX512BW-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] -; AVX512BW-NEXT: vmovdqa %xmm0, (%rsi) +; AVX512BW-NEXT: vpsrld $16, (%rdi), %zmm0 +; AVX512BW-NEXT: vpmovdb %zmm0, (%rsi) ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: shuffle_v64i8_to_v16i8_2: ; AVX512BWVL: # %bb.0: -; AVX512BWVL-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512BWVL-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512BWVL-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512BWVL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] -; AVX512BWVL-NEXT: vpsrld $16, (%rdi), %ymm1 -; AVX512BWVL-NEXT: vpmovdb %ymm1, %xmm1 -; AVX512BWVL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] -; AVX512BWVL-NEXT: vmovdqa %xmm0, (%rsi) +; AVX512BWVL-NEXT: vpsrld $16, (%rdi), %zmm0 +; AVX512BWVL-NEXT: vpmovdb %zmm0, (%rsi) ; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: retq %vec = load <64 x i8>, ptr %L @@ -258,67 +166,12 @@ define void @shuffle_v64i8_to_v16i8_2(ptr %L, ptr %S) nounwind { } define void @shuffle_v64i8_to_v16i8_3(ptr %L, ptr %S) nounwind { -; AVX512F-LABEL: shuffle_v64i8_to_v16i8_3: -; AVX512F: # %bb.0: -; AVX512F-NEXT: vmovdqa 48(%rdi), %xmm0 -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm1 = -; AVX512F-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX512F-NEXT: vmovdqa 32(%rdi), %xmm2 -; AVX512F-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512F-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] -; AVX512F-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512F-NEXT: vpsrld $24, %ymm1, %ymm1 -; AVX512F-NEXT: vpmovdb %zmm1, %xmm1 -; AVX512F-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] -; AVX512F-NEXT: vmovdqa %xmm0, (%rsi) -; AVX512F-NEXT: vzeroupper -; AVX512F-NEXT: retq -; -; AVX512VL-LABEL: shuffle_v64i8_to_v16i8_3: -; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512VL-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512VL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512VL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] -; AVX512VL-NEXT: vpsrld $24, (%rdi), %ymm1 -; AVX512VL-NEXT: vpmovdb %ymm1, %xmm1 -; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] -; AVX512VL-NEXT: vmovdqa %xmm0, (%rsi) -; AVX512VL-NEXT: vzeroupper -; AVX512VL-NEXT: retq -; -; AVX512BW-LABEL: shuffle_v64i8_to_v16i8_3: -; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa 48(%rdi), %xmm0 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = -; AVX512BW-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX512BW-NEXT: vmovdqa 32(%rdi), %xmm2 -; AVX512BW-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512BW-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] -; AVX512BW-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512BW-NEXT: vpsrld $24, %ymm1, %ymm1 -; AVX512BW-NEXT: vpmovdb %zmm1, %xmm1 -; AVX512BW-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] -; AVX512BW-NEXT: vmovdqa %xmm0, (%rsi) -; AVX512BW-NEXT: vzeroupper -; AVX512BW-NEXT: retq -; -; AVX512BWVL-LABEL: shuffle_v64i8_to_v16i8_3: -; AVX512BWVL: # %bb.0: -; AVX512BWVL-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512BWVL-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512BWVL-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512BWVL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] -; AVX512BWVL-NEXT: vpsrld $24, (%rdi), %ymm1 -; AVX512BWVL-NEXT: vpmovdb %ymm1, %xmm1 -; AVX512BWVL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] -; AVX512BWVL-NEXT: vmovdqa %xmm0, (%rsi) -; AVX512BWVL-NEXT: vzeroupper -; AVX512BWVL-NEXT: retq +; AVX512-LABEL: shuffle_v64i8_to_v16i8_3: +; AVX512: # %bb.0: +; AVX512-NEXT: vpsrld $24, (%rdi), %zmm0 +; AVX512-NEXT: vpmovdb %zmm0, (%rsi) +; AVX512-NEXT: vzeroupper +; AVX512-NEXT: retq %vec = load <64 x i8>, ptr %L %strided.vec = shufflevector <64 x i8> %vec, <64 x i8> undef, <16 x i32> store <16 x i8> %strided.vec, ptr %S @@ -326,54 +179,12 @@ define void @shuffle_v64i8_to_v16i8_3(ptr %L, ptr %S) nounwind { } define void @shuffle_v32i16_to_v8i16_1(ptr %L, ptr %S) nounwind { -; AVX512F-LABEL: shuffle_v32i16_to_v8i16_1: -; AVX512F: # %bb.0: -; AVX512F-NEXT: vpshufd {{.*#+}} xmm0 = mem[0,2,2,3] -; AVX512F-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,1,1,3,4,5,6,7] -; AVX512F-NEXT: vpshufd {{.*#+}} xmm1 = mem[0,2,2,3] -; AVX512F-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,1,1,3,4,5,6,7] -; AVX512F-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] -; AVX512F-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512F-NEXT: vpsrld $16, %ymm1, %ymm1 -; AVX512F-NEXT: vpmovqw %zmm1, %xmm1 -; AVX512F-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] -; AVX512F-NEXT: vmovdqa %xmm0, (%rsi) -; AVX512F-NEXT: vzeroupper -; AVX512F-NEXT: retq -; -; AVX512VL-LABEL: shuffle_v32i16_to_v8i16_1: -; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512VL-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,2,3,2,3,10,11,8,9,10,11,12,13,14,15] -; AVX512VL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512VL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] -; AVX512VL-NEXT: vpsrld $16, (%rdi), %ymm1 -; AVX512VL-NEXT: vpmovqw %ymm1, %xmm1 -; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] -; AVX512VL-NEXT: vmovdqa %xmm0, (%rsi) -; AVX512VL-NEXT: vzeroupper -; AVX512VL-NEXT: retq -; -; AVX512BW-LABEL: shuffle_v32i16_to_v8i16_1: -; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm0 = <1,5,9,13,33,37,41,45,u,u,u,u,u,u,u,u> -; AVX512BW-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512BW-NEXT: vmovdqa 32(%rdi), %ymm2 -; AVX512BW-NEXT: vpermt2w %zmm2, %zmm0, %zmm1 -; AVX512BW-NEXT: vmovdqa %xmm1, (%rsi) -; AVX512BW-NEXT: vzeroupper -; AVX512BW-NEXT: retq -; -; AVX512BWVL-LABEL: shuffle_v32i16_to_v8i16_1: -; AVX512BWVL: # %bb.0: -; AVX512BWVL-NEXT: vmovdqa {{.*#+}} xmm0 = [1,5,9,13,17,21,25,29] -; AVX512BWVL-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512BWVL-NEXT: vpermt2w 32(%rdi), %ymm0, %ymm1 -; AVX512BWVL-NEXT: vmovdqa %xmm1, (%rsi) -; AVX512BWVL-NEXT: vzeroupper -; AVX512BWVL-NEXT: retq +; AVX512-LABEL: shuffle_v32i16_to_v8i16_1: +; AVX512: # %bb.0: +; AVX512-NEXT: vpsrld $16, (%rdi), %zmm0 +; AVX512-NEXT: vpmovqw %zmm0, (%rsi) +; AVX512-NEXT: vzeroupper +; AVX512-NEXT: retq %vec = load <32 x i16>, ptr %L %strided.vec = shufflevector <32 x i16> %vec, <32 x i16> undef, <8 x i32> store <8 x i16> %strided.vec, ptr %S @@ -381,53 +192,12 @@ define void @shuffle_v32i16_to_v8i16_1(ptr %L, ptr %S) nounwind { } define void @shuffle_v32i16_to_v8i16_2(ptr %L, ptr %S) nounwind { -; AVX512F-LABEL: shuffle_v32i16_to_v8i16_2: -; AVX512F: # %bb.0: -; AVX512F-NEXT: vpshufd {{.*#+}} xmm0 = mem[3,1,2,3] -; AVX512F-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,1,2,0,4,5,6,7] -; AVX512F-NEXT: vpshufd {{.*#+}} xmm1 = mem[3,1,2,3] -; AVX512F-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,1,2,0,4,5,6,7] -; AVX512F-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] -; AVX512F-NEXT: vpshufd {{.*#+}} ymm1 = mem[1,1,3,3,5,5,7,7] -; AVX512F-NEXT: vpmovqw %zmm1, %xmm1 -; AVX512F-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] -; AVX512F-NEXT: vmovdqa %xmm0, (%rsi) -; AVX512F-NEXT: vzeroupper -; AVX512F-NEXT: retq -; -; AVX512VL-LABEL: shuffle_v32i16_to_v8i16_2: -; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512VL-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [12,13,14,15,4,5,12,13,8,9,10,11,12,13,14,15] -; AVX512VL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512VL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] -; AVX512VL-NEXT: vpshufd {{.*#+}} ymm1 = mem[1,1,3,3,5,5,7,7] -; AVX512VL-NEXT: vpmovqw %ymm1, %xmm1 -; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] -; AVX512VL-NEXT: vmovdqa %xmm0, (%rsi) -; AVX512VL-NEXT: vzeroupper -; AVX512VL-NEXT: retq -; -; AVX512BW-LABEL: shuffle_v32i16_to_v8i16_2: -; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm0 = <2,6,10,14,34,38,42,46,u,u,u,u,u,u,u,u> -; AVX512BW-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512BW-NEXT: vmovdqa 32(%rdi), %ymm2 -; AVX512BW-NEXT: vpermt2w %zmm2, %zmm0, %zmm1 -; AVX512BW-NEXT: vmovdqa %xmm1, (%rsi) -; AVX512BW-NEXT: vzeroupper -; AVX512BW-NEXT: retq -; -; AVX512BWVL-LABEL: shuffle_v32i16_to_v8i16_2: -; AVX512BWVL: # %bb.0: -; AVX512BWVL-NEXT: vmovdqa {{.*#+}} xmm0 = [2,6,10,14,18,22,26,30] -; AVX512BWVL-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512BWVL-NEXT: vpermt2w 32(%rdi), %ymm0, %ymm1 -; AVX512BWVL-NEXT: vmovdqa %xmm1, (%rsi) -; AVX512BWVL-NEXT: vzeroupper -; AVX512BWVL-NEXT: retq +; AVX512-LABEL: shuffle_v32i16_to_v8i16_2: +; AVX512: # %bb.0: +; AVX512-NEXT: vpshufd {{.*#+}} zmm0 = mem[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15] +; AVX512-NEXT: vpmovqw %zmm0, (%rsi) +; AVX512-NEXT: vzeroupper +; AVX512-NEXT: retq %vec = load <32 x i16>, ptr %L %strided.vec = shufflevector <32 x i16> %vec, <32 x i16> undef, <8 x i32> store <8 x i16> %strided.vec, ptr %S @@ -435,54 +205,12 @@ define void @shuffle_v32i16_to_v8i16_2(ptr %L, ptr %S) nounwind { } define void @shuffle_v32i16_to_v8i16_3(ptr %L, ptr %S) nounwind { -; AVX512F-LABEL: shuffle_v32i16_to_v8i16_3: -; AVX512F: # %bb.0: -; AVX512F-NEXT: vpshufd {{.*#+}} xmm0 = mem[3,1,2,3] -; AVX512F-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,1,3,1,4,5,6,7] -; AVX512F-NEXT: vpshufd {{.*#+}} xmm1 = mem[3,1,2,3] -; AVX512F-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,1,3,1,4,5,6,7] -; AVX512F-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] -; AVX512F-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512F-NEXT: vpsrlq $48, %ymm1, %ymm1 -; AVX512F-NEXT: vpmovqw %zmm1, %xmm1 -; AVX512F-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] -; AVX512F-NEXT: vmovdqa %xmm0, (%rsi) -; AVX512F-NEXT: vzeroupper -; AVX512F-NEXT: retq -; -; AVX512VL-LABEL: shuffle_v32i16_to_v8i16_3: -; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512VL-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [12,13,14,15,6,7,14,15,8,9,10,11,12,13,14,15] -; AVX512VL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512VL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] -; AVX512VL-NEXT: vpsrlq $48, (%rdi), %ymm1 -; AVX512VL-NEXT: vpmovqw %ymm1, %xmm1 -; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] -; AVX512VL-NEXT: vmovdqa %xmm0, (%rsi) -; AVX512VL-NEXT: vzeroupper -; AVX512VL-NEXT: retq -; -; AVX512BW-LABEL: shuffle_v32i16_to_v8i16_3: -; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm0 = <3,7,11,15,35,39,43,47,u,u,u,u,u,u,u,u> -; AVX512BW-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512BW-NEXT: vmovdqa 32(%rdi), %ymm2 -; AVX512BW-NEXT: vpermt2w %zmm2, %zmm0, %zmm1 -; AVX512BW-NEXT: vmovdqa %xmm1, (%rsi) -; AVX512BW-NEXT: vzeroupper -; AVX512BW-NEXT: retq -; -; AVX512BWVL-LABEL: shuffle_v32i16_to_v8i16_3: -; AVX512BWVL: # %bb.0: -; AVX512BWVL-NEXT: vmovdqa {{.*#+}} xmm0 = [3,7,11,15,19,23,27,31] -; AVX512BWVL-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512BWVL-NEXT: vpermt2w 32(%rdi), %ymm0, %ymm1 -; AVX512BWVL-NEXT: vmovdqa %xmm1, (%rsi) -; AVX512BWVL-NEXT: vzeroupper -; AVX512BWVL-NEXT: retq +; AVX512-LABEL: shuffle_v32i16_to_v8i16_3: +; AVX512: # %bb.0: +; AVX512-NEXT: vpsrlq $48, (%rdi), %zmm0 +; AVX512-NEXT: vpmovqw %zmm0, (%rsi) +; AVX512-NEXT: vzeroupper +; AVX512-NEXT: retq %vec = load <32 x i16>, ptr %L %strided.vec = shufflevector <32 x i16> %vec, <32 x i16> undef, <8 x i32> store <8 x i16> %strided.vec, ptr %S @@ -492,64 +220,39 @@ define void @shuffle_v32i16_to_v8i16_3(ptr %L, ptr %S) nounwind { define void @shuffle_v64i8_to_v8i8_1(ptr %L, ptr %S) nounwind { ; AVX512F-LABEL: shuffle_v64i8_to_v8i8_1: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vmovdqa 48(%rdi), %xmm0 -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm1 = -; AVX512F-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX512F-NEXT: vmovdqa 32(%rdi), %xmm2 -; AVX512F-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512F-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] -; AVX512F-NEXT: vmovdqa (%rdi), %ymm1 +; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512F-NEXT: vmovdqa 32(%rdi), %ymm1 +; AVX512F-NEXT: vpsrlw $8, %ymm0, %ymm0 ; AVX512F-NEXT: vpsrlw $8, %ymm1, %ymm1 -; AVX512F-NEXT: vpmovqb %zmm1, %xmm1 -; AVX512F-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] +; AVX512F-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 +; AVX512F-NEXT: vpmovqb %zmm0, %xmm0 ; AVX512F-NEXT: vmovq %xmm0, (%rsi) ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v64i8_to_v8i8_1: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa 48(%rdi), %xmm0 -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm1 = -; AVX512VL-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: vmovdqa 32(%rdi), %xmm2 -; AVX512VL-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512VL-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] -; AVX512VL-NEXT: vmovdqa (%rdi), %ymm1 +; AVX512VL-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512VL-NEXT: vmovdqa 32(%rdi), %ymm1 +; AVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0 ; AVX512VL-NEXT: vpsrlw $8, %ymm1, %ymm1 -; AVX512VL-NEXT: vpmovqb %ymm1, %xmm1 -; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] +; AVX512VL-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 +; AVX512VL-NEXT: vpmovqb %zmm0, %xmm0 ; AVX512VL-NEXT: vmovq %xmm0, (%rsi) ; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: shuffle_v64i8_to_v8i8_1: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa 48(%rdi), %xmm0 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = -; AVX512BW-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX512BW-NEXT: vmovdqa 32(%rdi), %xmm2 -; AVX512BW-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512BW-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] -; AVX512BW-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512BW-NEXT: vpsrlw $8, %ymm1, %ymm1 -; AVX512BW-NEXT: vpmovqb %zmm1, %xmm1 -; AVX512BW-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] -; AVX512BW-NEXT: vmovq %xmm0, (%rsi) +; AVX512BW-NEXT: vpsrlw $8, (%rdi), %zmm0 +; AVX512BW-NEXT: vpmovqb %zmm0, (%rsi) ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: shuffle_v64i8_to_v8i8_1: ; AVX512BWVL: # %bb.0: -; AVX512BWVL-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512BWVL-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512BWVL-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512BWVL-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512BWVL-NEXT: vpsrlw $8, (%rdi), %ymm1 -; AVX512BWVL-NEXT: vpmovqb %ymm1, %xmm1 -; AVX512BWVL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] -; AVX512BWVL-NEXT: vmovq %xmm0, (%rsi) +; AVX512BWVL-NEXT: vpsrlw $8, (%rdi), %zmm0 +; AVX512BWVL-NEXT: vpmovqb %zmm0, (%rsi) ; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: retq %vec = load <64 x i8>, ptr %L @@ -561,63 +264,35 @@ define void @shuffle_v64i8_to_v8i8_1(ptr %L, ptr %S) nounwind { define void @shuffle_v64i8_to_v8i8_2(ptr %L, ptr %S) nounwind { ; AVX512F-LABEL: shuffle_v64i8_to_v8i8_2: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vmovdqa 48(%rdi), %xmm0 -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm1 = -; AVX512F-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX512F-NEXT: vmovdqa 32(%rdi), %xmm2 -; AVX512F-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512F-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] -; AVX512F-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512F-NEXT: vpsrld $16, %ymm1, %ymm1 -; AVX512F-NEXT: vpmovqb %zmm1, %xmm1 -; AVX512F-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] +; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512F-NEXT: vinserti64x4 $1, 32(%rdi), %zmm0, %zmm0 +; AVX512F-NEXT: vpsrld $16, %zmm0, %zmm0 +; AVX512F-NEXT: vpmovqb %zmm0, %xmm0 ; AVX512F-NEXT: vmovq %xmm0, (%rsi) ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v64i8_to_v8i8_2: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512VL-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512VL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512VL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512VL-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512VL-NEXT: vpsrld $16, (%rdi), %ymm1 -; AVX512VL-NEXT: vpmovqb %ymm1, %xmm1 -; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] +; AVX512VL-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512VL-NEXT: vinserti64x4 $1, 32(%rdi), %zmm0, %zmm0 +; AVX512VL-NEXT: vpsrld $16, %zmm0, %zmm0 +; AVX512VL-NEXT: vpmovqb %zmm0, %xmm0 ; AVX512VL-NEXT: vmovq %xmm0, (%rsi) ; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: shuffle_v64i8_to_v8i8_2: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa 48(%rdi), %xmm0 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = -; AVX512BW-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX512BW-NEXT: vmovdqa 32(%rdi), %xmm2 -; AVX512BW-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512BW-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] -; AVX512BW-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512BW-NEXT: vpsrld $16, %ymm1, %ymm1 -; AVX512BW-NEXT: vpmovqb %zmm1, %xmm1 -; AVX512BW-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] -; AVX512BW-NEXT: vmovq %xmm0, (%rsi) +; AVX512BW-NEXT: vpsrld $16, (%rdi), %zmm0 +; AVX512BW-NEXT: vpmovqb %zmm0, (%rsi) ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: shuffle_v64i8_to_v8i8_2: ; AVX512BWVL: # %bb.0: -; AVX512BWVL-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512BWVL-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512BWVL-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512BWVL-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512BWVL-NEXT: vpsrld $16, (%rdi), %ymm1 -; AVX512BWVL-NEXT: vpmovqb %ymm1, %xmm1 -; AVX512BWVL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] -; AVX512BWVL-NEXT: vmovq %xmm0, (%rsi) +; AVX512BWVL-NEXT: vpsrld $16, (%rdi), %zmm0 +; AVX512BWVL-NEXT: vpmovqb %zmm0, (%rsi) ; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: retq %vec = load <64 x i8>, ptr %L @@ -629,63 +304,31 @@ define void @shuffle_v64i8_to_v8i8_2(ptr %L, ptr %S) nounwind { define void @shuffle_v64i8_to_v8i8_3(ptr %L, ptr %S) nounwind { ; AVX512F-LABEL: shuffle_v64i8_to_v8i8_3: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vmovdqa 48(%rdi), %xmm0 -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm1 = -; AVX512F-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX512F-NEXT: vmovdqa 32(%rdi), %xmm2 -; AVX512F-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512F-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] -; AVX512F-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512F-NEXT: vpsrld $24, %ymm1, %ymm1 -; AVX512F-NEXT: vpmovqb %zmm1, %xmm1 -; AVX512F-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] +; AVX512F-NEXT: vpsrld $24, (%rdi), %zmm0 +; AVX512F-NEXT: vpmovqb %zmm0, %xmm0 ; AVX512F-NEXT: vmovq %xmm0, (%rsi) ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v64i8_to_v8i8_3: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512VL-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512VL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512VL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512VL-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512VL-NEXT: vpsrld $24, (%rdi), %ymm1 -; AVX512VL-NEXT: vpmovqb %ymm1, %xmm1 -; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] +; AVX512VL-NEXT: vpsrld $24, (%rdi), %zmm0 +; AVX512VL-NEXT: vpmovqb %zmm0, %xmm0 ; AVX512VL-NEXT: vmovq %xmm0, (%rsi) ; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: shuffle_v64i8_to_v8i8_3: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa 48(%rdi), %xmm0 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = -; AVX512BW-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX512BW-NEXT: vmovdqa 32(%rdi), %xmm2 -; AVX512BW-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512BW-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] -; AVX512BW-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512BW-NEXT: vpsrld $24, %ymm1, %ymm1 -; AVX512BW-NEXT: vpmovqb %zmm1, %xmm1 -; AVX512BW-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] -; AVX512BW-NEXT: vmovq %xmm0, (%rsi) +; AVX512BW-NEXT: vpsrld $24, (%rdi), %zmm0 +; AVX512BW-NEXT: vpmovqb %zmm0, (%rsi) ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: shuffle_v64i8_to_v8i8_3: ; AVX512BWVL: # %bb.0: -; AVX512BWVL-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512BWVL-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512BWVL-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512BWVL-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512BWVL-NEXT: vpsrld $24, (%rdi), %ymm1 -; AVX512BWVL-NEXT: vpmovqb %ymm1, %xmm1 -; AVX512BWVL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] -; AVX512BWVL-NEXT: vmovq %xmm0, (%rsi) +; AVX512BWVL-NEXT: vpsrld $24, (%rdi), %zmm0 +; AVX512BWVL-NEXT: vpmovqb %zmm0, (%rsi) ; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: retq %vec = load <64 x i8>, ptr %L @@ -695,65 +338,12 @@ define void @shuffle_v64i8_to_v8i8_3(ptr %L, ptr %S) nounwind { } define void @shuffle_v64i8_to_v8i8_4(ptr %L, ptr %S) nounwind { -; AVX512F-LABEL: shuffle_v64i8_to_v8i8_4: -; AVX512F: # %bb.0: -; AVX512F-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512F-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512F-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512F-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512F-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512F-NEXT: vpshufd {{.*#+}} ymm1 = mem[1,1,3,3,5,5,7,7] -; AVX512F-NEXT: vpmovqb %zmm1, %xmm1 -; AVX512F-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] -; AVX512F-NEXT: vmovq %xmm0, (%rsi) -; AVX512F-NEXT: vzeroupper -; AVX512F-NEXT: retq -; -; AVX512VL-LABEL: shuffle_v64i8_to_v8i8_4: -; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512VL-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512VL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512VL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512VL-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512VL-NEXT: vpshufd {{.*#+}} ymm1 = mem[1,1,3,3,5,5,7,7] -; AVX512VL-NEXT: vpmovqb %ymm1, %xmm1 -; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] -; AVX512VL-NEXT: vmovq %xmm0, (%rsi) -; AVX512VL-NEXT: vzeroupper -; AVX512VL-NEXT: retq -; -; AVX512BW-LABEL: shuffle_v64i8_to_v8i8_4: -; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512BW-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512BW-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512BW-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512BW-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512BW-NEXT: vpshufd {{.*#+}} ymm1 = mem[1,1,3,3,5,5,7,7] -; AVX512BW-NEXT: vpmovqb %zmm1, %xmm1 -; AVX512BW-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] -; AVX512BW-NEXT: vmovq %xmm0, (%rsi) -; AVX512BW-NEXT: vzeroupper -; AVX512BW-NEXT: retq -; -; AVX512BWVL-LABEL: shuffle_v64i8_to_v8i8_4: -; AVX512BWVL: # %bb.0: -; AVX512BWVL-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512BWVL-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512BWVL-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512BWVL-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512BWVL-NEXT: vpshufd {{.*#+}} ymm1 = mem[1,1,3,3,5,5,7,7] -; AVX512BWVL-NEXT: vpmovqb %ymm1, %xmm1 -; AVX512BWVL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] -; AVX512BWVL-NEXT: vmovq %xmm0, (%rsi) -; AVX512BWVL-NEXT: vzeroupper -; AVX512BWVL-NEXT: retq +; AVX512-LABEL: shuffle_v64i8_to_v8i8_4: +; AVX512: # %bb.0: +; AVX512-NEXT: vpshufd {{.*#+}} zmm0 = mem[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15] +; AVX512-NEXT: vpmovqb %zmm0, (%rsi) +; AVX512-NEXT: vzeroupper +; AVX512-NEXT: retq %vec = load <64 x i8>, ptr %L %strided.vec = shufflevector <64 x i8> %vec, <64 x i8> undef, <8 x i32> store <8 x i8> %strided.vec, ptr %S @@ -763,63 +353,31 @@ define void @shuffle_v64i8_to_v8i8_4(ptr %L, ptr %S) nounwind { define void @shuffle_v64i8_to_v8i8_5(ptr %L, ptr %S) nounwind { ; AVX512F-LABEL: shuffle_v64i8_to_v8i8_5: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vmovdqa 48(%rdi), %xmm0 -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm1 = -; AVX512F-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX512F-NEXT: vmovdqa 32(%rdi), %xmm2 -; AVX512F-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512F-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] -; AVX512F-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512F-NEXT: vpsrlq $40, %ymm1, %ymm1 -; AVX512F-NEXT: vpmovqb %zmm1, %xmm1 -; AVX512F-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] +; AVX512F-NEXT: vpsrlq $40, (%rdi), %zmm0 +; AVX512F-NEXT: vpmovqb %zmm0, %xmm0 ; AVX512F-NEXT: vmovq %xmm0, (%rsi) ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v64i8_to_v8i8_5: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512VL-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512VL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512VL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512VL-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512VL-NEXT: vpsrlq $40, (%rdi), %ymm1 -; AVX512VL-NEXT: vpmovqb %ymm1, %xmm1 -; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] +; AVX512VL-NEXT: vpsrlq $40, (%rdi), %zmm0 +; AVX512VL-NEXT: vpmovqb %zmm0, %xmm0 ; AVX512VL-NEXT: vmovq %xmm0, (%rsi) ; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: shuffle_v64i8_to_v8i8_5: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa 48(%rdi), %xmm0 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = -; AVX512BW-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX512BW-NEXT: vmovdqa 32(%rdi), %xmm2 -; AVX512BW-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512BW-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] -; AVX512BW-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512BW-NEXT: vpsrlq $40, %ymm1, %ymm1 -; AVX512BW-NEXT: vpmovqb %zmm1, %xmm1 -; AVX512BW-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] -; AVX512BW-NEXT: vmovq %xmm0, (%rsi) +; AVX512BW-NEXT: vpsrlq $40, (%rdi), %zmm0 +; AVX512BW-NEXT: vpmovqb %zmm0, (%rsi) ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: shuffle_v64i8_to_v8i8_5: ; AVX512BWVL: # %bb.0: -; AVX512BWVL-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512BWVL-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512BWVL-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512BWVL-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512BWVL-NEXT: vpsrlq $40, (%rdi), %ymm1 -; AVX512BWVL-NEXT: vpmovqb %ymm1, %xmm1 -; AVX512BWVL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] -; AVX512BWVL-NEXT: vmovq %xmm0, (%rsi) +; AVX512BWVL-NEXT: vpsrlq $40, (%rdi), %zmm0 +; AVX512BWVL-NEXT: vpmovqb %zmm0, (%rsi) ; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: retq %vec = load <64 x i8>, ptr %L @@ -831,63 +389,35 @@ define void @shuffle_v64i8_to_v8i8_5(ptr %L, ptr %S) nounwind { define void @shuffle_v64i8_to_v8i8_6(ptr %L, ptr %S) nounwind { ; AVX512F-LABEL: shuffle_v64i8_to_v8i8_6: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vmovdqa 48(%rdi), %xmm0 -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm1 = -; AVX512F-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX512F-NEXT: vmovdqa 32(%rdi), %xmm2 -; AVX512F-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512F-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] -; AVX512F-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512F-NEXT: vpsrlq $48, %ymm1, %ymm1 -; AVX512F-NEXT: vpmovqb %zmm1, %xmm1 -; AVX512F-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] +; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512F-NEXT: vinserti64x4 $1, 32(%rdi), %zmm0, %zmm0 +; AVX512F-NEXT: vpsrlq $48, %zmm0, %zmm0 +; AVX512F-NEXT: vpmovqb %zmm0, %xmm0 ; AVX512F-NEXT: vmovq %xmm0, (%rsi) ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v64i8_to_v8i8_6: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512VL-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512VL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512VL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512VL-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512VL-NEXT: vpsrlq $48, (%rdi), %ymm1 -; AVX512VL-NEXT: vpmovqb %ymm1, %xmm1 -; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] +; AVX512VL-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512VL-NEXT: vinserti64x4 $1, 32(%rdi), %zmm0, %zmm0 +; AVX512VL-NEXT: vpsrlq $48, %zmm0, %zmm0 +; AVX512VL-NEXT: vpmovqb %zmm0, %xmm0 ; AVX512VL-NEXT: vmovq %xmm0, (%rsi) ; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: shuffle_v64i8_to_v8i8_6: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa 48(%rdi), %xmm0 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = -; AVX512BW-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX512BW-NEXT: vmovdqa 32(%rdi), %xmm2 -; AVX512BW-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512BW-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] -; AVX512BW-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512BW-NEXT: vpsrlq $48, %ymm1, %ymm1 -; AVX512BW-NEXT: vpmovqb %zmm1, %xmm1 -; AVX512BW-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] -; AVX512BW-NEXT: vmovq %xmm0, (%rsi) +; AVX512BW-NEXT: vpsrlq $48, (%rdi), %zmm0 +; AVX512BW-NEXT: vpmovqb %zmm0, (%rsi) ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: shuffle_v64i8_to_v8i8_6: ; AVX512BWVL: # %bb.0: -; AVX512BWVL-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512BWVL-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512BWVL-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512BWVL-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512BWVL-NEXT: vpsrlq $48, (%rdi), %ymm1 -; AVX512BWVL-NEXT: vpmovqb %ymm1, %xmm1 -; AVX512BWVL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] -; AVX512BWVL-NEXT: vmovq %xmm0, (%rsi) +; AVX512BWVL-NEXT: vpsrlq $48, (%rdi), %zmm0 +; AVX512BWVL-NEXT: vpmovqb %zmm0, (%rsi) ; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: retq %vec = load <64 x i8>, ptr %L @@ -899,63 +429,31 @@ define void @shuffle_v64i8_to_v8i8_6(ptr %L, ptr %S) nounwind { define void @shuffle_v64i8_to_v8i8_7(ptr %L, ptr %S) nounwind { ; AVX512F-LABEL: shuffle_v64i8_to_v8i8_7: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vmovdqa 48(%rdi), %xmm0 -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm1 = -; AVX512F-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX512F-NEXT: vmovdqa 32(%rdi), %xmm2 -; AVX512F-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512F-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] -; AVX512F-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512F-NEXT: vpsrlq $56, %ymm1, %ymm1 -; AVX512F-NEXT: vpmovqb %zmm1, %xmm1 -; AVX512F-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] +; AVX512F-NEXT: vpsrlq $56, (%rdi), %zmm0 +; AVX512F-NEXT: vpmovqb %zmm0, %xmm0 ; AVX512F-NEXT: vmovq %xmm0, (%rsi) ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v64i8_to_v8i8_7: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512VL-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512VL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512VL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512VL-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512VL-NEXT: vpsrlq $56, (%rdi), %ymm1 -; AVX512VL-NEXT: vpmovqb %ymm1, %xmm1 -; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] +; AVX512VL-NEXT: vpsrlq $56, (%rdi), %zmm0 +; AVX512VL-NEXT: vpmovqb %zmm0, %xmm0 ; AVX512VL-NEXT: vmovq %xmm0, (%rsi) ; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: shuffle_v64i8_to_v8i8_7: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa 48(%rdi), %xmm0 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = -; AVX512BW-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX512BW-NEXT: vmovdqa 32(%rdi), %xmm2 -; AVX512BW-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512BW-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] -; AVX512BW-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512BW-NEXT: vpsrlq $56, %ymm1, %ymm1 -; AVX512BW-NEXT: vpmovqb %zmm1, %xmm1 -; AVX512BW-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] -; AVX512BW-NEXT: vmovq %xmm0, (%rsi) +; AVX512BW-NEXT: vpsrlq $56, (%rdi), %zmm0 +; AVX512BW-NEXT: vpmovqb %zmm0, (%rsi) ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: shuffle_v64i8_to_v8i8_7: ; AVX512BWVL: # %bb.0: -; AVX512BWVL-NEXT: vmovdqa 32(%rdi), %xmm0 -; AVX512BWVL-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512BWVL-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512BWVL-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512BWVL-NEXT: vpsrlq $56, (%rdi), %ymm1 -; AVX512BWVL-NEXT: vpmovqb %ymm1, %xmm1 -; AVX512BWVL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] -; AVX512BWVL-NEXT: vmovq %xmm0, (%rsi) +; AVX512BWVL-NEXT: vpsrlq $56, (%rdi), %zmm0 +; AVX512BWVL-NEXT: vpmovqb %zmm0, (%rsi) ; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: retq %vec = load <64 x i8>, ptr %L @@ -964,5 +462,3 @@ define void @shuffle_v64i8_to_v8i8_7(ptr %L, ptr %S) nounwind { ret void } -;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: -; AVX512: {{.*}} diff --git a/llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-2.ll b/llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-2.ll index 8126522..0432c09 100644 --- a/llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-2.ll +++ b/llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-2.ll @@ -117,11 +117,9 @@ define void @load_i16_stride2_vf8(ptr %in.vec, ptr %out.vec0, ptr %out.vec1) nou ; AVX512-LABEL: load_i16_stride2_vf8: ; AVX512: # %bb.0: ; AVX512-NEXT: vmovdqa (%rdi), %ymm0 -; AVX512-NEXT: vpsrld $16, 16(%rdi), %xmm1 -; AVX512-NEXT: vpsrld $16, (%rdi), %xmm2 -; AVX512-NEXT: vpackusdw %xmm1, %xmm2, %xmm1 +; AVX512-NEXT: vpsrld $16, %ymm0, %ymm1 ; AVX512-NEXT: vpmovdw %ymm0, (%rsi) -; AVX512-NEXT: vmovdqa %xmm1, (%rdx) +; AVX512-NEXT: vpmovdw %ymm1, (%rdx) ; AVX512-NEXT: vzeroupper ; AVX512-NEXT: retq %wide.vec = load <16 x i16>, ptr %in.vec, align 64 @@ -245,44 +243,14 @@ define void @load_i16_stride2_vf16(ptr %in.vec, ptr %out.vec0, ptr %out.vec1) no ; AVX2-FAST-PERLANE-NEXT: vzeroupper ; AVX2-FAST-PERLANE-NEXT: retq ; -; AVX512F-SLOW-LABEL: load_i16_stride2_vf16: -; AVX512F-SLOW: # %bb.0: -; AVX512F-SLOW-NEXT: vmovdqa64 (%rdi), %zmm0 -; AVX512F-SLOW-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512F-SLOW-NEXT: vmovdqa 32(%rdi), %ymm2 -; AVX512F-SLOW-NEXT: vpshufb {{.*#+}} ymm2 = ymm2[u,u,u,u,u,u,u,u,2,3,6,7,10,11,14,15,u,u,u,u,u,u,u,u,18,19,22,23,26,27,30,31] -; AVX512F-SLOW-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[2,3,6,7,10,11,14,15,u,u,u,u,u,u,u,u,18,19,22,23,26,27,30,31,u,u,u,u,u,u,u,u] -; AVX512F-SLOW-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1],ymm2[2,3],ymm1[4,5],ymm2[6,7] -; AVX512F-SLOW-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,1,3] -; AVX512F-SLOW-NEXT: vpmovdw %zmm0, (%rsi) -; AVX512F-SLOW-NEXT: vmovdqa %ymm1, (%rdx) -; AVX512F-SLOW-NEXT: vzeroupper -; AVX512F-SLOW-NEXT: retq -; -; AVX512F-FAST-LABEL: load_i16_stride2_vf16: -; AVX512F-FAST: # %bb.0: -; AVX512F-FAST-NEXT: vmovdqa64 (%rdi), %zmm0 -; AVX512F-FAST-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512F-FAST-NEXT: vmovdqa 32(%rdi), %ymm2 -; AVX512F-FAST-NEXT: vpshufb {{.*#+}} ymm2 = ymm2[u,u,u,u,u,u,u,u,2,3,6,7,10,11,14,15,u,u,u,u,u,u,u,u,18,19,22,23,26,27,30,31] -; AVX512F-FAST-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[2,3,6,7,10,11,14,15,u,u,u,u,u,u,u,u,18,19,22,23,26,27,30,31,u,u,u,u,u,u,u,u] -; AVX512F-FAST-NEXT: vmovdqa {{.*#+}} ymm3 = [0,2,5,7] -; AVX512F-FAST-NEXT: vpermi2q %ymm2, %ymm1, %ymm3 -; AVX512F-FAST-NEXT: vpmovdw %zmm0, (%rsi) -; AVX512F-FAST-NEXT: vmovdqa %ymm3, (%rdx) -; AVX512F-FAST-NEXT: vzeroupper -; AVX512F-FAST-NEXT: retq -; -; AVX512BW-LABEL: load_i16_stride2_vf16: -; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa64 (%rdi), %zmm0 -; AVX512BW-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [1,3,5,7,9,11,13,15,17,19,21,23,25,27,29,31] -; AVX512BW-NEXT: vpermi2w 32(%rdi), %ymm1, %ymm2 -; AVX512BW-NEXT: vpmovdw %zmm0, (%rsi) -; AVX512BW-NEXT: vmovdqa %ymm2, (%rdx) -; AVX512BW-NEXT: vzeroupper -; AVX512BW-NEXT: retq +; AVX512-LABEL: load_i16_stride2_vf16: +; AVX512: # %bb.0: +; AVX512-NEXT: vmovdqa64 (%rdi), %zmm0 +; AVX512-NEXT: vpsrld $16, %zmm0, %zmm1 +; AVX512-NEXT: vpmovdw %zmm0, (%rsi) +; AVX512-NEXT: vpmovdw %zmm1, (%rdx) +; AVX512-NEXT: vzeroupper +; AVX512-NEXT: retq %wide.vec = load <32 x i16>, ptr %in.vec, align 64 %strided.vec0 = shufflevector <32 x i16> %wide.vec, <32 x i16> poison, <16 x i32> %strided.vec1 = shufflevector <32 x i16> %wide.vec, <32 x i16> poison, <16 x i32> @@ -1005,8 +973,10 @@ define void @load_i16_stride2_vf64(ptr %in.vec, ptr %out.vec0, ptr %out.vec1) no ; AVX512DQ-SLOW: {{.*}} ; AVX512DQBW-FAST: {{.*}} ; AVX512DQBW-SLOW: {{.*}} +; AVX512F-FAST: {{.*}} ; AVX512F-ONLY-FAST: {{.*}} ; AVX512F-ONLY-SLOW: {{.*}} +; AVX512F-SLOW: {{.*}} ; FALLBACK0: {{.*}} ; FALLBACK1: {{.*}} ; FALLBACK10: {{.*}} diff --git a/llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll b/llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll index 2900a04..dcaac8d 100644 --- a/llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll +++ b/llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll @@ -248,76 +248,18 @@ define void @load_i16_stride4_vf4(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, ptr ; AVX2-FAST-PERLANE-NEXT: vmovq %xmm1, (%r8) ; AVX2-FAST-PERLANE-NEXT: retq ; -; AVX512F-SLOW-LABEL: load_i16_stride4_vf4: -; AVX512F-SLOW: # %bb.0: -; AVX512F-SLOW-NEXT: vmovdqa (%rdi), %ymm0 -; AVX512F-SLOW-NEXT: vmovdqa (%rdi), %xmm1 -; AVX512F-SLOW-NEXT: vmovdqa 16(%rdi), %xmm2 -; AVX512F-SLOW-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[0,2,2,3] -; AVX512F-SLOW-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[1,3,2,3,4,5,6,7] -; AVX512F-SLOW-NEXT: vpshufd {{.*#+}} xmm4 = xmm1[0,2,2,3] -; AVX512F-SLOW-NEXT: vpshuflw {{.*#+}} xmm4 = xmm4[1,3,2,3,4,5,6,7] -; AVX512F-SLOW-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1] -; AVX512F-SLOW-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[3,1,2,3] -; AVX512F-SLOW-NEXT: vpshuflw {{.*#+}} xmm4 = xmm2[2,0,2,3,4,5,6,7] -; AVX512F-SLOW-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[3,1,2,3] -; AVX512F-SLOW-NEXT: vpshuflw {{.*#+}} xmm5 = xmm1[2,0,2,3,4,5,6,7] -; AVX512F-SLOW-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm5[0],xmm4[0],xmm5[1],xmm4[1] -; AVX512F-SLOW-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[3,1,2,3,4,5,6,7] -; AVX512F-SLOW-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[3,1,2,3,4,5,6,7] -; AVX512F-SLOW-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] -; AVX512F-SLOW-NEXT: vpmovqw %ymm0, (%rsi) -; AVX512F-SLOW-NEXT: vmovq %xmm3, (%rdx) -; AVX512F-SLOW-NEXT: vmovq %xmm4, (%rcx) -; AVX512F-SLOW-NEXT: vmovq %xmm1, (%r8) -; AVX512F-SLOW-NEXT: vzeroupper -; AVX512F-SLOW-NEXT: retq -; -; AVX512F-FAST-LABEL: load_i16_stride4_vf4: -; AVX512F-FAST: # %bb.0: -; AVX512F-FAST-NEXT: vmovdqa (%rdi), %ymm0 -; AVX512F-FAST-NEXT: vmovdqa {{.*#+}} xmm1 = [2,3,10,11,8,9,10,11,8,9,10,11,12,13,14,15] -; AVX512F-FAST-NEXT: vmovdqa (%rdi), %xmm2 -; AVX512F-FAST-NEXT: vmovdqa 16(%rdi), %xmm3 -; AVX512F-FAST-NEXT: vpshufb %xmm1, %xmm3, %xmm4 -; AVX512F-FAST-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512F-FAST-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1] -; AVX512F-FAST-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[3,1,2,3] -; AVX512F-FAST-NEXT: vpshuflw {{.*#+}} xmm4 = xmm3[2,0,2,3,4,5,6,7] -; AVX512F-FAST-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[3,1,2,3] -; AVX512F-FAST-NEXT: vpshuflw {{.*#+}} xmm5 = xmm2[2,0,2,3,4,5,6,7] -; AVX512F-FAST-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm5[0],xmm4[0],xmm5[1],xmm4[1] -; AVX512F-FAST-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[3,1,2,3,4,5,6,7] -; AVX512F-FAST-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[3,1,2,3,4,5,6,7] -; AVX512F-FAST-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] -; AVX512F-FAST-NEXT: vpmovqw %ymm0, (%rsi) -; AVX512F-FAST-NEXT: vmovq %xmm1, (%rdx) -; AVX512F-FAST-NEXT: vmovq %xmm4, (%rcx) -; AVX512F-FAST-NEXT: vmovq %xmm2, (%r8) -; AVX512F-FAST-NEXT: vzeroupper -; AVX512F-FAST-NEXT: retq -; -; AVX512BW-LABEL: load_i16_stride4_vf4: -; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = <1,5,9,13,u,u,u,u> -; AVX512BW-NEXT: vmovdqa (%rdi), %xmm2 -; AVX512BW-NEXT: vmovdqa 16(%rdi), %xmm3 -; AVX512BW-NEXT: vpermi2w %xmm3, %xmm2, %xmm1 -; AVX512BW-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[3,1,2,3] -; AVX512BW-NEXT: vpshuflw {{.*#+}} xmm4 = xmm3[2,0,2,3,4,5,6,7] -; AVX512BW-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[3,1,2,3] -; AVX512BW-NEXT: vpshuflw {{.*#+}} xmm5 = xmm2[2,0,2,3,4,5,6,7] -; AVX512BW-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm5[0],xmm4[0],xmm5[1],xmm4[1] -; AVX512BW-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[3,1,2,3,4,5,6,7] -; AVX512BW-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[3,1,2,3,4,5,6,7] -; AVX512BW-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] -; AVX512BW-NEXT: vpmovqw %ymm0, (%rsi) -; AVX512BW-NEXT: vmovq %xmm1, (%rdx) -; AVX512BW-NEXT: vmovq %xmm4, (%rcx) -; AVX512BW-NEXT: vmovq %xmm2, (%r8) -; AVX512BW-NEXT: vzeroupper -; AVX512BW-NEXT: retq +; AVX512-LABEL: load_i16_stride4_vf4: +; AVX512: # %bb.0: +; AVX512-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512-NEXT: vpsrld $16, %ymm0, %ymm1 +; AVX512-NEXT: vpshufd {{.*#+}} ymm2 = ymm0[1,1,3,3,5,5,7,7] +; AVX512-NEXT: vpsrlq $48, %ymm0, %ymm3 +; AVX512-NEXT: vpmovqw %ymm0, (%rsi) +; AVX512-NEXT: vpmovqw %ymm1, (%rdx) +; AVX512-NEXT: vpmovqw %ymm2, (%rcx) +; AVX512-NEXT: vpmovqw %ymm3, (%r8) +; AVX512-NEXT: vzeroupper +; AVX512-NEXT: retq %wide.vec = load <16 x i16>, ptr %in.vec, align 64 %strided.vec0 = shufflevector <16 x i16> %wide.vec, <16 x i16> poison, <4 x i32> %strided.vec1 = shufflevector <16 x i16> %wide.vec, <16 x i16> poison, <4 x i32> @@ -574,90 +516,29 @@ define void @load_i16_stride4_vf8(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, ptr ; AVX2-FAST-PERLANE-NEXT: vzeroupper ; AVX2-FAST-PERLANE-NEXT: retq ; -; AVX512F-SLOW-LABEL: load_i16_stride4_vf8: -; AVX512F-SLOW: # %bb.0: -; AVX512F-SLOW-NEXT: vmovdqa64 (%rdi), %zmm0 -; AVX512F-SLOW-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512F-SLOW-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[0,2,2,3] -; AVX512F-SLOW-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[0,1,1,3,4,5,6,7] -; AVX512F-SLOW-NEXT: vmovdqa 32(%rdi), %xmm3 -; AVX512F-SLOW-NEXT: vpshufd {{.*#+}} xmm4 = xmm3[0,2,2,3] -; AVX512F-SLOW-NEXT: vpshuflw {{.*#+}} xmm4 = xmm4[0,1,1,3,4,5,6,7] -; AVX512F-SLOW-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm4[0],xmm2[0],xmm4[1],xmm2[1] -; AVX512F-SLOW-NEXT: vmovdqa (%rdi), %ymm4 -; AVX512F-SLOW-NEXT: vpsrld $16, %ymm4, %ymm5 -; AVX512F-SLOW-NEXT: vpmovqw %ymm5, %xmm5 -; AVX512F-SLOW-NEXT: vpblendd {{.*#+}} xmm2 = xmm5[0,1],xmm2[2,3] -; AVX512F-SLOW-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[3,1,2,3] -; AVX512F-SLOW-NEXT: vpshuflw {{.*#+}} xmm5 = xmm1[0,1,2,0,4,5,6,7] -; AVX512F-SLOW-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[3,1,2,3] -; AVX512F-SLOW-NEXT: vpshuflw {{.*#+}} xmm6 = xmm3[0,1,2,0,4,5,6,7] -; AVX512F-SLOW-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm6[0],xmm5[0],xmm6[1],xmm5[1] -; AVX512F-SLOW-NEXT: vpshufd {{.*#+}} ymm6 = ymm4[1,1,3,3,5,5,7,7] -; AVX512F-SLOW-NEXT: vpmovqw %ymm6, %xmm6 -; AVX512F-SLOW-NEXT: vpblendd {{.*#+}} xmm5 = xmm6[0,1],xmm5[2,3] -; AVX512F-SLOW-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,1,3,1,4,5,6,7] -; AVX512F-SLOW-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[0,1,3,1,4,5,6,7] -; AVX512F-SLOW-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm3[0],xmm1[0],xmm3[1],xmm1[1] -; AVX512F-SLOW-NEXT: vpsrlq $48, %ymm4, %ymm3 -; AVX512F-SLOW-NEXT: vpmovqw %ymm3, %xmm3 -; AVX512F-SLOW-NEXT: vpblendd {{.*#+}} xmm1 = xmm3[0,1],xmm1[2,3] -; AVX512F-SLOW-NEXT: vpmovqw %zmm0, (%rsi) -; AVX512F-SLOW-NEXT: vmovdqa %xmm2, (%rdx) -; AVX512F-SLOW-NEXT: vmovdqa %xmm5, (%rcx) -; AVX512F-SLOW-NEXT: vmovdqa %xmm1, (%r8) -; AVX512F-SLOW-NEXT: vzeroupper -; AVX512F-SLOW-NEXT: retq -; -; AVX512F-FAST-LABEL: load_i16_stride4_vf8: -; AVX512F-FAST: # %bb.0: -; AVX512F-FAST-NEXT: vmovdqa64 (%rdi), %zmm0 -; AVX512F-FAST-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512F-FAST-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,2,3,2,3,10,11,8,9,10,11,12,13,14,15] -; AVX512F-FAST-NEXT: vpshufb %xmm2, %xmm1, %xmm3 -; AVX512F-FAST-NEXT: vmovdqa 32(%rdi), %xmm4 -; AVX512F-FAST-NEXT: vpshufb %xmm2, %xmm4, %xmm2 -; AVX512F-FAST-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] -; AVX512F-FAST-NEXT: vmovdqa (%rdi), %ymm3 -; AVX512F-FAST-NEXT: vpsrld $16, %ymm3, %ymm5 -; AVX512F-FAST-NEXT: vpmovqw %ymm5, %xmm5 -; AVX512F-FAST-NEXT: vpblendd {{.*#+}} xmm2 = xmm5[0,1],xmm2[2,3] -; AVX512F-FAST-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[3,1,2,3] -; AVX512F-FAST-NEXT: vpshuflw {{.*#+}} xmm5 = xmm1[0,1,2,0,4,5,6,7] -; AVX512F-FAST-NEXT: vpshufd {{.*#+}} xmm4 = xmm4[3,1,2,3] -; AVX512F-FAST-NEXT: vpshuflw {{.*#+}} xmm6 = xmm4[0,1,2,0,4,5,6,7] -; AVX512F-FAST-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm6[0],xmm5[0],xmm6[1],xmm5[1] -; AVX512F-FAST-NEXT: vpshufd {{.*#+}} ymm6 = ymm3[1,1,3,3,5,5,7,7] -; AVX512F-FAST-NEXT: vpmovqw %ymm6, %xmm6 -; AVX512F-FAST-NEXT: vpblendd {{.*#+}} xmm5 = xmm6[0,1],xmm5[2,3] -; AVX512F-FAST-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,1,3,1,4,5,6,7] -; AVX512F-FAST-NEXT: vpshuflw {{.*#+}} xmm4 = xmm4[0,1,3,1,4,5,6,7] -; AVX512F-FAST-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm4[0],xmm1[0],xmm4[1],xmm1[1] -; AVX512F-FAST-NEXT: vpsrlq $48, %ymm3, %ymm3 -; AVX512F-FAST-NEXT: vpmovqw %ymm3, %xmm3 -; AVX512F-FAST-NEXT: vpblendd {{.*#+}} xmm1 = xmm3[0,1],xmm1[2,3] -; AVX512F-FAST-NEXT: vpmovqw %zmm0, (%rsi) -; AVX512F-FAST-NEXT: vmovdqa %xmm2, (%rdx) -; AVX512F-FAST-NEXT: vmovdqa %xmm5, (%rcx) -; AVX512F-FAST-NEXT: vmovdqa %xmm1, (%r8) -; AVX512F-FAST-NEXT: vzeroupper -; AVX512F-FAST-NEXT: retq +; AVX512F-LABEL: load_i16_stride4_vf8: +; AVX512F: # %bb.0: +; AVX512F-NEXT: vpsrld $16, (%rdi), %zmm0 +; AVX512F-NEXT: vmovdqa64 (%rdi), %zmm1 +; AVX512F-NEXT: vpshufd {{.*#+}} zmm2 = zmm1[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15] +; AVX512F-NEXT: vpsrlq $48, (%rdi), %zmm3 +; AVX512F-NEXT: vpmovqw %zmm1, (%rsi) +; AVX512F-NEXT: vpmovqw %zmm0, (%rdx) +; AVX512F-NEXT: vpmovqw %zmm2, (%rcx) +; AVX512F-NEXT: vpmovqw %zmm3, (%r8) +; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: retq ; ; AVX512BW-LABEL: load_i16_stride4_vf8: ; AVX512BW: # %bb.0: ; AVX512BW-NEXT: vmovdqa64 (%rdi), %zmm0 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = [1,5,9,13,17,21,25,29] -; AVX512BW-NEXT: vmovdqa (%rdi), %ymm2 -; AVX512BW-NEXT: vmovdqa 32(%rdi), %ymm3 -; AVX512BW-NEXT: vpermi2w %ymm3, %ymm2, %ymm1 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm4 = [2,6,10,14,18,22,26,30] -; AVX512BW-NEXT: vpermi2w %ymm3, %ymm2, %ymm4 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm5 = [3,7,11,15,19,23,27,31] -; AVX512BW-NEXT: vpermi2w %ymm3, %ymm2, %ymm5 +; AVX512BW-NEXT: vpsrld $16, %zmm0, %zmm1 +; AVX512BW-NEXT: vpshufd {{.*#+}} zmm2 = zmm0[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15] +; AVX512BW-NEXT: vpsrlq $48, %zmm0, %zmm3 ; AVX512BW-NEXT: vpmovqw %zmm0, (%rsi) -; AVX512BW-NEXT: vmovdqa %xmm1, (%rdx) -; AVX512BW-NEXT: vmovdqa %xmm4, (%rcx) -; AVX512BW-NEXT: vmovdqa %xmm5, (%r8) +; AVX512BW-NEXT: vpmovqw %zmm1, (%rdx) +; AVX512BW-NEXT: vpmovqw %zmm2, (%rcx) +; AVX512BW-NEXT: vpmovqw %zmm3, (%r8) ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq %wide.vec = load <32 x i16>, ptr %in.vec, align 64 @@ -5579,14 +5460,12 @@ define void @load_i16_stride4_vf64(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, pt ; AVX: {{.*}} ; AVX2: {{.*}} ; AVX2-ONLY: {{.*}} -; AVX512: {{.*}} ; AVX512BW-ONLY-FAST: {{.*}} ; AVX512BW-ONLY-SLOW: {{.*}} ; AVX512DQ-FAST: {{.*}} ; AVX512DQ-SLOW: {{.*}} ; AVX512DQBW-FAST: {{.*}} ; AVX512DQBW-SLOW: {{.*}} -; AVX512F: {{.*}} ; AVX512F-ONLY-FAST: {{.*}} ; AVX512F-ONLY-SLOW: {{.*}} ; FALLBACK0: {{.*}} diff --git a/llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-2.ll b/llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-2.ll index 686c9a6..23f2667 100644 --- a/llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-2.ll +++ b/llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-2.ll @@ -209,14 +209,9 @@ define void @load_i8_stride2_vf16(ptr %in.vec, ptr %out.vec0, ptr %out.vec1) nou ; AVX512BW-LABEL: load_i8_stride2_vf16: ; AVX512BW: # %bb.0: ; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0 -; AVX512BW-NEXT: vmovdqa (%rdi), %xmm1 -; AVX512BW-NEXT: vmovdqa 16(%rdi), %xmm2 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm3 = <1,3,5,7,9,11,13,15,u,u,u,u,u,u,u,u> -; AVX512BW-NEXT: vpshufb %xmm3, %xmm2, %xmm2 -; AVX512BW-NEXT: vpshufb %xmm3, %xmm1, %xmm1 -; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] +; AVX512BW-NEXT: vpsrlw $8, %ymm0, %ymm1 ; AVX512BW-NEXT: vpmovwb %ymm0, (%rsi) -; AVX512BW-NEXT: vmovdqa %xmm1, (%rdx) +; AVX512BW-NEXT: vpmovwb %ymm1, (%rdx) ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq %wide.vec = load <32 x i8>, ptr %in.vec, align 64 @@ -333,33 +328,14 @@ define void @load_i8_stride2_vf32(ptr %in.vec, ptr %out.vec0, ptr %out.vec1) nou ; AVX512F-FAST-NEXT: vzeroupper ; AVX512F-FAST-NEXT: retq ; -; AVX512BW-SLOW-LABEL: load_i8_stride2_vf32: -; AVX512BW-SLOW: # %bb.0: -; AVX512BW-SLOW-NEXT: vmovdqa64 (%rdi), %zmm0 -; AVX512BW-SLOW-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512BW-SLOW-NEXT: vmovdqa 32(%rdi), %ymm2 -; AVX512BW-SLOW-NEXT: vpshufb {{.*#+}} ymm2 = ymm2[u,u,u,u,u,u,u,u,1,3,5,7,9,11,13,15,u,u,u,u,u,u,u,u,17,19,21,23,25,27,29,31] -; AVX512BW-SLOW-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[1,3,5,7,9,11,13,15,u,u,u,u,u,u,u,u,17,19,21,23,25,27,29,31,u,u,u,u,u,u,u,u] -; AVX512BW-SLOW-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1],ymm2[2,3],ymm1[4,5],ymm2[6,7] -; AVX512BW-SLOW-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,1,3] -; AVX512BW-SLOW-NEXT: vpmovwb %zmm0, (%rsi) -; AVX512BW-SLOW-NEXT: vmovdqa %ymm1, (%rdx) -; AVX512BW-SLOW-NEXT: vzeroupper -; AVX512BW-SLOW-NEXT: retq -; -; AVX512BW-FAST-LABEL: load_i8_stride2_vf32: -; AVX512BW-FAST: # %bb.0: -; AVX512BW-FAST-NEXT: vmovdqa64 (%rdi), %zmm0 -; AVX512BW-FAST-NEXT: vmovdqa (%rdi), %ymm1 -; AVX512BW-FAST-NEXT: vmovdqa 32(%rdi), %ymm2 -; AVX512BW-FAST-NEXT: vpshufb {{.*#+}} ymm2 = ymm2[u,u,u,u,u,u,u,u,1,3,5,7,9,11,13,15,u,u,u,u,u,u,u,u,17,19,21,23,25,27,29,31] -; AVX512BW-FAST-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[1,3,5,7,9,11,13,15,u,u,u,u,u,u,u,u,17,19,21,23,25,27,29,31,u,u,u,u,u,u,u,u] -; AVX512BW-FAST-NEXT: vmovdqa {{.*#+}} ymm3 = [0,2,5,7] -; AVX512BW-FAST-NEXT: vpermi2q %ymm2, %ymm1, %ymm3 -; AVX512BW-FAST-NEXT: vpmovwb %zmm0, (%rsi) -; AVX512BW-FAST-NEXT: vmovdqa %ymm3, (%rdx) -; AVX512BW-FAST-NEXT: vzeroupper -; AVX512BW-FAST-NEXT: retq +; AVX512BW-LABEL: load_i8_stride2_vf32: +; AVX512BW: # %bb.0: +; AVX512BW-NEXT: vmovdqa64 (%rdi), %zmm0 +; AVX512BW-NEXT: vpsrlw $8, %zmm0, %zmm1 +; AVX512BW-NEXT: vpmovwb %zmm0, (%rsi) +; AVX512BW-NEXT: vpmovwb %zmm1, (%rdx) +; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: retq %wide.vec = load <64 x i8>, ptr %in.vec, align 64 %strided.vec0 = shufflevector <64 x i8> %wide.vec, <64 x i8> poison, <32 x i32> %strided.vec1 = shufflevector <64 x i8> %wide.vec, <64 x i8> poison, <32 x i32> @@ -591,8 +567,10 @@ define void @load_i8_stride2_vf64(ptr %in.vec, ptr %out.vec0, ptr %out.vec1) nou ; AVX2-FAST-PERLANE: {{.*}} ; AVX2-SLOW: {{.*}} ; AVX512: {{.*}} +; AVX512BW-FAST: {{.*}} ; AVX512BW-ONLY-FAST: {{.*}} ; AVX512BW-ONLY-SLOW: {{.*}} +; AVX512BW-SLOW: {{.*}} ; AVX512DQ-FAST: {{.*}} ; AVX512DQ-SLOW: {{.*}} ; AVX512DQBW-FAST: {{.*}} diff --git a/llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll b/llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll index 56cd552..7cb62c1 100644 --- a/llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll +++ b/llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll @@ -245,24 +245,13 @@ define void @load_i8_stride4_vf8(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, ptr ; AVX512-LABEL: load_i8_stride4_vf8: ; AVX512: # %bb.0: ; AVX512-NEXT: vmovdqa (%rdi), %ymm0 -; AVX512-NEXT: vmovdqa {{.*#+}} xmm1 = <1,5,9,13,u,u,u,u,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vmovdqa (%rdi), %xmm2 -; AVX512-NEXT: vmovdqa 16(%rdi), %xmm3 -; AVX512-NEXT: vpshufb %xmm1, %xmm3, %xmm4 -; AVX512-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1] -; AVX512-NEXT: vmovdqa {{.*#+}} xmm4 = <2,6,10,14,u,u,u,u,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vpshufb %xmm4, %xmm3, %xmm5 -; AVX512-NEXT: vpshufb %xmm4, %xmm2, %xmm4 -; AVX512-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1] -; AVX512-NEXT: vmovdqa {{.*#+}} xmm5 = <3,7,11,15,u,u,u,u,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vpshufb %xmm5, %xmm3, %xmm3 -; AVX512-NEXT: vpshufb %xmm5, %xmm2, %xmm2 -; AVX512-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] +; AVX512-NEXT: vpsrlw $8, %ymm0, %ymm1 +; AVX512-NEXT: vpsrld $16, %ymm0, %ymm2 +; AVX512-NEXT: vpsrld $24, %ymm0, %ymm3 ; AVX512-NEXT: vpmovdb %ymm0, (%rsi) -; AVX512-NEXT: vmovq %xmm1, (%rdx) -; AVX512-NEXT: vmovq %xmm4, (%rcx) -; AVX512-NEXT: vmovq %xmm2, (%r8) +; AVX512-NEXT: vpmovdb %ymm1, (%rdx) +; AVX512-NEXT: vpmovdb %ymm2, (%rcx) +; AVX512-NEXT: vpmovdb %ymm3, (%r8) ; AVX512-NEXT: vzeroupper ; AVX512-NEXT: retq %wide.vec = load <32 x i8>, ptr %in.vec, align 64 @@ -486,39 +475,35 @@ define void @load_i8_stride4_vf16(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, ptr ; AVX2-ONLY-NEXT: vmovdqa %xmm0, (%r8) ; AVX2-ONLY-NEXT: retq ; -; AVX512-LABEL: load_i8_stride4_vf16: -; AVX512: # %bb.0: -; AVX512-NEXT: vmovdqa64 (%rdi), %zmm0 -; AVX512-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512-NEXT: vpshufb %xmm2, %xmm1, %xmm3 -; AVX512-NEXT: vmovdqa 32(%rdi), %xmm4 -; AVX512-NEXT: vpshufb %xmm2, %xmm4, %xmm2 -; AVX512-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] -; AVX512-NEXT: vmovdqa (%rdi), %ymm3 -; AVX512-NEXT: vpsrlw $8, %ymm3, %ymm5 -; AVX512-NEXT: vpmovdb %ymm5, %xmm5 -; AVX512-NEXT: vpblendd {{.*#+}} xmm2 = xmm5[0,1],xmm2[2,3] -; AVX512-NEXT: vmovdqa {{.*#+}} xmm5 = -; AVX512-NEXT: vpshufb %xmm5, %xmm1, %xmm6 -; AVX512-NEXT: vpshufb %xmm5, %xmm4, %xmm5 -; AVX512-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1] -; AVX512-NEXT: vpsrld $16, %ymm3, %ymm6 -; AVX512-NEXT: vpmovdb %ymm6, %xmm6 -; AVX512-NEXT: vpblendd {{.*#+}} xmm5 = xmm6[0,1],xmm5[2,3] -; AVX512-NEXT: vmovdqa {{.*#+}} xmm6 = -; AVX512-NEXT: vpshufb %xmm6, %xmm1, %xmm1 -; AVX512-NEXT: vpshufb %xmm6, %xmm4, %xmm4 -; AVX512-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm4[0],xmm1[0],xmm4[1],xmm1[1] -; AVX512-NEXT: vpsrld $24, %ymm3, %ymm3 -; AVX512-NEXT: vpmovdb %ymm3, %xmm3 -; AVX512-NEXT: vpblendd {{.*#+}} xmm1 = xmm3[0,1],xmm1[2,3] -; AVX512-NEXT: vpmovdb %zmm0, (%rsi) -; AVX512-NEXT: vmovdqa %xmm2, (%rdx) -; AVX512-NEXT: vmovdqa %xmm5, (%rcx) -; AVX512-NEXT: vmovdqa %xmm1, (%r8) -; AVX512-NEXT: vzeroupper -; AVX512-NEXT: retq +; AVX512F-LABEL: load_i8_stride4_vf16: +; AVX512F: # %bb.0: +; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 +; AVX512F-NEXT: vmovdqa 32(%rdi), %ymm1 +; AVX512F-NEXT: vpsrlw $8, %ymm0, %ymm0 +; AVX512F-NEXT: vpsrlw $8, %ymm1, %ymm1 +; AVX512F-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 +; AVX512F-NEXT: vmovdqa64 (%rdi), %zmm1 +; AVX512F-NEXT: vpsrld $16, %zmm1, %zmm2 +; AVX512F-NEXT: vpsrld $24, %zmm1, %zmm3 +; AVX512F-NEXT: vpmovdb %zmm1, (%rsi) +; AVX512F-NEXT: vpmovdb %zmm0, (%rdx) +; AVX512F-NEXT: vpmovdb %zmm2, (%rcx) +; AVX512F-NEXT: vpmovdb %zmm3, (%r8) +; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: retq +; +; AVX512BW-LABEL: load_i8_stride4_vf16: +; AVX512BW: # %bb.0: +; AVX512BW-NEXT: vmovdqa64 (%rdi), %zmm0 +; AVX512BW-NEXT: vpsrlw $8, %zmm0, %zmm1 +; AVX512BW-NEXT: vpsrld $16, %zmm0, %zmm2 +; AVX512BW-NEXT: vpsrld $24, %zmm0, %zmm3 +; AVX512BW-NEXT: vpmovdb %zmm0, (%rsi) +; AVX512BW-NEXT: vpmovdb %zmm1, (%rdx) +; AVX512BW-NEXT: vpmovdb %zmm2, (%rcx) +; AVX512BW-NEXT: vpmovdb %zmm3, (%r8) +; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: retq %wide.vec = load <64 x i8>, ptr %in.vec, align 64 %strided.vec0 = shufflevector <64 x i8> %wide.vec, <64 x i8> poison, <16 x i32> %strided.vec1 = shufflevector <64 x i8> %wide.vec, <64 x i8> poison, <16 x i32> diff --git a/llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll b/llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll index e703b0a..455b77c 100644 --- a/llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll +++ b/llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll @@ -290,44 +290,21 @@ define void @load_i8_stride8_vf4(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, ptr ; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %r10 ; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %r11 ; AVX512-NEXT: vmovdqa (%rdi), %ymm0 -; AVX512-NEXT: vmovdqa {{.*#+}} xmm1 = <1,9,u,u,u,u,u,u,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vmovdqa (%rdi), %xmm2 -; AVX512-NEXT: vmovdqa 16(%rdi), %xmm3 -; AVX512-NEXT: vpshufb %xmm1, %xmm3, %xmm4 -; AVX512-NEXT: vpshufb %xmm1, %xmm2, %xmm1 -; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3] -; AVX512-NEXT: vmovdqa {{.*#+}} xmm4 = <2,10,u,u,u,u,u,u,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vpshufb %xmm4, %xmm3, %xmm5 -; AVX512-NEXT: vpshufb %xmm4, %xmm2, %xmm4 -; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1],xmm4[2],xmm5[2],xmm4[3],xmm5[3] -; AVX512-NEXT: vmovdqa {{.*#+}} xmm5 = <3,11,u,u,u,u,u,u,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vpshufb %xmm5, %xmm3, %xmm6 -; AVX512-NEXT: vpshufb %xmm5, %xmm2, %xmm5 -; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1],xmm5[2],xmm6[2],xmm5[3],xmm6[3] -; AVX512-NEXT: vmovdqa {{.*#+}} xmm6 = <4,12,u,u,u,u,u,u,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vpshufb %xmm6, %xmm3, %xmm7 -; AVX512-NEXT: vpshufb %xmm6, %xmm2, %xmm6 -; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[1],xmm7[1],xmm6[2],xmm7[2],xmm6[3],xmm7[3] -; AVX512-NEXT: vmovdqa {{.*#+}} xmm7 = <5,13,u,u,u,u,u,u,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vpshufb %xmm7, %xmm3, %xmm8 -; AVX512-NEXT: vpshufb %xmm7, %xmm2, %xmm7 -; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm7[0],xmm8[0],xmm7[1],xmm8[1],xmm7[2],xmm8[2],xmm7[3],xmm8[3] -; AVX512-NEXT: vmovdqa {{.*#+}} xmm8 = <6,14,u,u,u,u,u,u,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vpshufb %xmm8, %xmm3, %xmm9 -; AVX512-NEXT: vpshufb %xmm8, %xmm2, %xmm8 -; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm8 = xmm8[0],xmm9[0],xmm8[1],xmm9[1],xmm8[2],xmm9[2],xmm8[3],xmm9[3] -; AVX512-NEXT: vmovdqa {{.*#+}} xmm9 = <7,15,u,u,u,u,u,u,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vpshufb %xmm9, %xmm3, %xmm3 -; AVX512-NEXT: vpshufb %xmm9, %xmm2, %xmm2 -; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3] +; AVX512-NEXT: vpsrlw $8, %ymm0, %ymm1 +; AVX512-NEXT: vpsrld $16, %ymm0, %ymm2 +; AVX512-NEXT: vpsrld $24, %ymm0, %ymm3 +; AVX512-NEXT: vpshufd {{.*#+}} ymm4 = ymm0[1,1,3,3,5,5,7,7] +; AVX512-NEXT: vpsrlq $40, %ymm0, %ymm5 +; AVX512-NEXT: vpsrlq $48, %ymm0, %ymm6 +; AVX512-NEXT: vpsrlq $56, %ymm0, %ymm7 ; AVX512-NEXT: vpmovqb %ymm0, (%rsi) -; AVX512-NEXT: vmovd %xmm1, (%rdx) -; AVX512-NEXT: vmovd %xmm4, (%rcx) -; AVX512-NEXT: vmovd %xmm5, (%r8) -; AVX512-NEXT: vmovd %xmm6, (%r9) -; AVX512-NEXT: vmovd %xmm7, (%r11) -; AVX512-NEXT: vmovd %xmm8, (%r10) -; AVX512-NEXT: vmovd %xmm2, (%rax) +; AVX512-NEXT: vpmovqb %ymm1, (%rdx) +; AVX512-NEXT: vpmovqb %ymm2, (%rcx) +; AVX512-NEXT: vpmovqb %ymm3, (%r8) +; AVX512-NEXT: vpmovqb %ymm4, (%r9) +; AVX512-NEXT: vpmovqb %ymm5, (%r11) +; AVX512-NEXT: vpmovqb %ymm6, (%r10) +; AVX512-NEXT: vpmovqb %ymm7, (%rax) ; AVX512-NEXT: vzeroupper ; AVX512-NEXT: retq %wide.vec = load <32 x i8>, ptr %in.vec, align 64 @@ -748,67 +725,36 @@ define void @load_i8_stride8_vf8(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, ptr ; AVX512F-NEXT: movq {{[0-9]+}}(%rsp), %rax ; AVX512F-NEXT: movq {{[0-9]+}}(%rsp), %r10 ; AVX512F-NEXT: movq {{[0-9]+}}(%rsp), %r11 +; AVX512F-NEXT: vmovdqa64 (%rdi), %zmm0 +; AVX512F-NEXT: vpmovqb %zmm0, %xmm1 +; AVX512F-NEXT: vmovdqa (%rdi), %ymm2 +; AVX512F-NEXT: vmovdqa 32(%rdi), %ymm3 +; AVX512F-NEXT: vpsrlw $8, %ymm2, %ymm2 +; AVX512F-NEXT: vpsrlw $8, %ymm3, %ymm3 +; AVX512F-NEXT: vinserti64x4 $1, %ymm3, %zmm2, %zmm2 +; AVX512F-NEXT: vpmovqb %zmm2, %xmm2 +; AVX512F-NEXT: vmovdqa64 (%rdi), %zmm3 +; AVX512F-NEXT: vpsrld $16, %zmm3, %zmm4 +; AVX512F-NEXT: vpmovqb %zmm4, %xmm4 +; AVX512F-NEXT: vpsrld $24, %zmm3, %zmm3 +; AVX512F-NEXT: vpmovqb %zmm3, %xmm3 +; AVX512F-NEXT: vpshufd {{.*#+}} zmm0 = zmm0[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15] +; AVX512F-NEXT: vpmovqb %zmm0, %xmm0 ; AVX512F-NEXT: vmovdqa64 (%rdi), %zmm5 -; AVX512F-NEXT: vmovdqa 48(%rdi), %xmm0 -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512F-NEXT: vpshufb %xmm2, %xmm0, %xmm3 -; AVX512F-NEXT: vmovdqa 32(%rdi), %xmm1 -; AVX512F-NEXT: vpshufb %xmm2, %xmm1, %xmm2 -; AVX512F-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3] -; AVX512F-NEXT: vmovdqa (%rdi), %ymm3 -; AVX512F-NEXT: vpsrlw $8, %ymm3, %ymm4 -; AVX512F-NEXT: vpmovqb %ymm4, %xmm4 -; AVX512F-NEXT: vpblendd {{.*#+}} xmm2 = xmm4[0],xmm2[1],xmm4[2,3] -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm4 = -; AVX512F-NEXT: vpshufb %xmm4, %xmm0, %xmm6 -; AVX512F-NEXT: vpshufb %xmm4, %xmm1, %xmm4 -; AVX512F-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm4[0],xmm6[0],xmm4[1],xmm6[1],xmm4[2],xmm6[2],xmm4[3],xmm6[3] -; AVX512F-NEXT: vpsrld $16, %ymm3, %ymm6 -; AVX512F-NEXT: vpmovqb %ymm6, %xmm6 -; AVX512F-NEXT: vpblendd {{.*#+}} xmm4 = xmm6[0],xmm4[1],xmm6[2,3] -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm6 = -; AVX512F-NEXT: vpshufb %xmm6, %xmm0, %xmm7 -; AVX512F-NEXT: vpshufb %xmm6, %xmm1, %xmm6 -; AVX512F-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[1],xmm7[1],xmm6[2],xmm7[2],xmm6[3],xmm7[3] -; AVX512F-NEXT: vpsrld $24, %ymm3, %ymm7 -; AVX512F-NEXT: vpmovqb %ymm7, %xmm7 -; AVX512F-NEXT: vpblendd {{.*#+}} xmm6 = xmm7[0],xmm6[1],xmm7[2,3] -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm7 = -; AVX512F-NEXT: vpshufb %xmm7, %xmm0, %xmm8 -; AVX512F-NEXT: vpshufb %xmm7, %xmm1, %xmm7 -; AVX512F-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm7[0],xmm8[0],xmm7[1],xmm8[1],xmm7[2],xmm8[2],xmm7[3],xmm8[3] -; AVX512F-NEXT: vpshufd {{.*#+}} ymm8 = ymm3[1,1,3,3,5,5,7,7] -; AVX512F-NEXT: vpmovqb %ymm8, %xmm8 -; AVX512F-NEXT: vpblendd {{.*#+}} xmm7 = xmm8[0],xmm7[1],xmm8[2,3] -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm8 = -; AVX512F-NEXT: vpshufb %xmm8, %xmm0, %xmm9 -; AVX512F-NEXT: vpshufb %xmm8, %xmm1, %xmm8 -; AVX512F-NEXT: vpunpcklwd {{.*#+}} xmm8 = xmm8[0],xmm9[0],xmm8[1],xmm9[1],xmm8[2],xmm9[2],xmm8[3],xmm9[3] -; AVX512F-NEXT: vpsrlq $40, %ymm3, %ymm9 -; AVX512F-NEXT: vpmovqb %ymm9, %xmm9 -; AVX512F-NEXT: vpblendd {{.*#+}} xmm8 = xmm9[0],xmm8[1],xmm9[2,3] -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm9 = -; AVX512F-NEXT: vpshufb %xmm9, %xmm0, %xmm10 -; AVX512F-NEXT: vpshufb %xmm9, %xmm1, %xmm9 -; AVX512F-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm9[0],xmm10[0],xmm9[1],xmm10[1],xmm9[2],xmm10[2],xmm9[3],xmm10[3] -; AVX512F-NEXT: vpsrlq $48, %ymm3, %ymm10 -; AVX512F-NEXT: vpmovqb %ymm10, %xmm10 -; AVX512F-NEXT: vpblendd {{.*#+}} xmm9 = xmm10[0],xmm9[1],xmm10[2,3] -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm10 = -; AVX512F-NEXT: vpshufb %xmm10, %xmm0, %xmm0 -; AVX512F-NEXT: vpshufb %xmm10, %xmm1, %xmm1 -; AVX512F-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] -; AVX512F-NEXT: vpsrlq $56, %ymm3, %ymm1 -; AVX512F-NEXT: vpmovqb %ymm1, %xmm1 -; AVX512F-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] -; AVX512F-NEXT: vpmovqb %zmm5, (%rsi) +; AVX512F-NEXT: vpsrlq $40, %zmm5, %zmm6 +; AVX512F-NEXT: vpmovqb %zmm6, %xmm6 +; AVX512F-NEXT: vpsrlq $48, %zmm5, %zmm7 +; AVX512F-NEXT: vpmovqb %zmm7, %xmm7 +; AVX512F-NEXT: vpsrlq $56, %zmm5, %zmm5 +; AVX512F-NEXT: vpmovqb %zmm5, %xmm5 +; AVX512F-NEXT: vmovq %xmm1, (%rsi) ; AVX512F-NEXT: vmovq %xmm2, (%rdx) ; AVX512F-NEXT: vmovq %xmm4, (%rcx) -; AVX512F-NEXT: vmovq %xmm6, (%r8) -; AVX512F-NEXT: vmovq %xmm7, (%r9) -; AVX512F-NEXT: vmovq %xmm8, (%r11) -; AVX512F-NEXT: vmovq %xmm9, (%r10) -; AVX512F-NEXT: vmovq %xmm0, (%rax) +; AVX512F-NEXT: vmovq %xmm3, (%r8) +; AVX512F-NEXT: vmovq %xmm0, (%r9) +; AVX512F-NEXT: vmovq %xmm6, (%r11) +; AVX512F-NEXT: vmovq %xmm7, (%r10) +; AVX512F-NEXT: vmovq %xmm5, (%rax) ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; @@ -817,67 +763,22 @@ define void @load_i8_stride8_vf8(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, ptr ; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %rax ; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %r10 ; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %r11 -; AVX512BW-NEXT: vmovdqa64 (%rdi), %zmm2 -; AVX512BW-NEXT: vmovdqa 48(%rdi), %xmm3 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm0 = -; AVX512BW-NEXT: vpshufb %xmm0, %xmm3, %xmm1 -; AVX512BW-NEXT: vmovdqa 32(%rdi), %xmm4 -; AVX512BW-NEXT: vpshufb %xmm0, %xmm4, %xmm0 -; AVX512BW-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] -; AVX512BW-NEXT: vmovdqa (%rdi), %ymm5 -; AVX512BW-NEXT: vpsrlw $8, %ymm5, %ymm1 -; AVX512BW-NEXT: vpmovqb %ymm1, %xmm1 -; AVX512BW-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = -; AVX512BW-NEXT: vpshufb %xmm1, %xmm3, %xmm6 -; AVX512BW-NEXT: vpshufb %xmm1, %xmm4, %xmm1 -; AVX512BW-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm1[0],xmm6[0],xmm1[1],xmm6[1],xmm1[2],xmm6[2],xmm1[3],xmm6[3] -; AVX512BW-NEXT: vpsrld $16, %ymm5, %ymm6 -; AVX512BW-NEXT: vpmovqb %ymm6, %xmm6 -; AVX512BW-NEXT: vpblendd {{.*#+}} xmm1 = xmm6[0],xmm1[1],xmm6[2,3] -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm6 = -; AVX512BW-NEXT: vpshufb %xmm6, %xmm3, %xmm7 -; AVX512BW-NEXT: vpshufb %xmm6, %xmm4, %xmm6 -; AVX512BW-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[1],xmm7[1],xmm6[2],xmm7[2],xmm6[3],xmm7[3] -; AVX512BW-NEXT: vpsrld $24, %ymm5, %ymm7 -; AVX512BW-NEXT: vpmovqb %ymm7, %xmm7 -; AVX512BW-NEXT: vpblendd {{.*#+}} xmm6 = xmm7[0],xmm6[1],xmm7[2,3] -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm7 = -; AVX512BW-NEXT: vpshufb %xmm7, %xmm3, %xmm8 -; AVX512BW-NEXT: vpshufb %xmm7, %xmm4, %xmm7 -; AVX512BW-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm7[0],xmm8[0],xmm7[1],xmm8[1],xmm7[2],xmm8[2],xmm7[3],xmm8[3] -; AVX512BW-NEXT: vpshufd {{.*#+}} ymm8 = ymm5[1,1,3,3,5,5,7,7] -; AVX512BW-NEXT: vpmovqb %ymm8, %xmm8 -; AVX512BW-NEXT: vpblendd {{.*#+}} xmm7 = xmm8[0],xmm7[1],xmm8[2,3] -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm8 = -; AVX512BW-NEXT: vpshufb %xmm8, %xmm3, %xmm9 -; AVX512BW-NEXT: vpshufb %xmm8, %xmm4, %xmm8 -; AVX512BW-NEXT: vpunpcklwd {{.*#+}} xmm8 = xmm8[0],xmm9[0],xmm8[1],xmm9[1],xmm8[2],xmm9[2],xmm8[3],xmm9[3] -; AVX512BW-NEXT: vpsrlq $40, %ymm5, %ymm9 -; AVX512BW-NEXT: vpmovqb %ymm9, %xmm9 -; AVX512BW-NEXT: vpblendd {{.*#+}} xmm8 = xmm9[0],xmm8[1],xmm9[2,3] -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm9 = -; AVX512BW-NEXT: vpshufb %xmm9, %xmm3, %xmm10 -; AVX512BW-NEXT: vpshufb %xmm9, %xmm4, %xmm9 -; AVX512BW-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm9[0],xmm10[0],xmm9[1],xmm10[1],xmm9[2],xmm10[2],xmm9[3],xmm10[3] -; AVX512BW-NEXT: vpsrlq $48, %ymm5, %ymm10 -; AVX512BW-NEXT: vpmovqb %ymm10, %xmm10 -; AVX512BW-NEXT: vpblendd {{.*#+}} xmm9 = xmm10[0],xmm9[1],xmm10[2,3] -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm10 = -; AVX512BW-NEXT: vpshufb %xmm10, %xmm3, %xmm3 -; AVX512BW-NEXT: vpshufb %xmm10, %xmm4, %xmm4 -; AVX512BW-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3] -; AVX512BW-NEXT: vpsrlq $56, %ymm5, %ymm4 -; AVX512BW-NEXT: vpmovqb %ymm4, %xmm4 -; AVX512BW-NEXT: vpblendd {{.*#+}} xmm3 = xmm4[0],xmm3[1],xmm4[2,3] -; AVX512BW-NEXT: vpmovqb %zmm2, (%rsi) -; AVX512BW-NEXT: vmovq %xmm0, (%rdx) -; AVX512BW-NEXT: vmovq %xmm1, (%rcx) -; AVX512BW-NEXT: vmovq %xmm6, (%r8) -; AVX512BW-NEXT: vmovq %xmm7, (%r9) -; AVX512BW-NEXT: vmovq %xmm8, (%r11) -; AVX512BW-NEXT: vmovq %xmm9, (%r10) -; AVX512BW-NEXT: vmovq %xmm3, (%rax) +; AVX512BW-NEXT: vmovdqa64 (%rdi), %zmm0 +; AVX512BW-NEXT: vpsrlw $8, %zmm0, %zmm1 +; AVX512BW-NEXT: vpsrld $16, %zmm0, %zmm2 +; AVX512BW-NEXT: vpsrld $24, %zmm0, %zmm3 +; AVX512BW-NEXT: vpshufd {{.*#+}} zmm4 = zmm0[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15] +; AVX512BW-NEXT: vpsrlq $40, %zmm0, %zmm5 +; AVX512BW-NEXT: vpsrlq $48, %zmm0, %zmm6 +; AVX512BW-NEXT: vpsrlq $56, %zmm0, %zmm7 +; AVX512BW-NEXT: vpmovqb %zmm0, (%rsi) +; AVX512BW-NEXT: vpmovqb %zmm1, (%rdx) +; AVX512BW-NEXT: vpmovqb %zmm2, (%rcx) +; AVX512BW-NEXT: vpmovqb %zmm3, (%r8) +; AVX512BW-NEXT: vpmovqb %zmm4, (%r9) +; AVX512BW-NEXT: vpmovqb %zmm5, (%r11) +; AVX512BW-NEXT: vpmovqb %zmm6, (%r10) +; AVX512BW-NEXT: vpmovqb %zmm7, (%rax) ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq %wide.vec = load <64 x i8>, ptr %in.vec, align 64 diff --git a/llvm/test/CodeGen/X86/x86-interleaved-access.ll b/llvm/test/CodeGen/X86/x86-interleaved-access.ll index e5d6508..490bd21 100644 --- a/llvm/test/CodeGen/X86/x86-interleaved-access.ll +++ b/llvm/test/CodeGen/X86/x86-interleaved-access.ll @@ -402,18 +402,17 @@ define <8 x i8> @interleaved_load_vf8_i8_stride4(ptr %ptr) nounwind { ; AVX512-NEXT: vpshufb %xmm2, %xmm1, %xmm3 ; AVX512-NEXT: vpshufb %xmm2, %xmm0, %xmm2 ; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0] -; AVX512-NEXT: vpsrld $16, %xmm1, %xmm3 -; AVX512-NEXT: vpsrld $16, %xmm0, %xmm4 -; AVX512-NEXT: vpackusdw %xmm3, %xmm4, %xmm3 -; AVX512-NEXT: vpaddb %xmm3, %xmm2, %xmm2 -; AVX512-NEXT: vmovdqa {{.*#+}} xmm3 = <1,u,5,u,9,u,13,u,13,u,5,u,12,u,13,u> -; AVX512-NEXT: vpshufb %xmm3, %xmm1, %xmm1 -; AVX512-NEXT: vpshufb %xmm3, %xmm0, %xmm0 -; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] +; AVX512-NEXT: vpsrld $16, %xmm1, %xmm1 +; AVX512-NEXT: vpsrld $16, %xmm0, %xmm0 +; AVX512-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 +; AVX512-NEXT: vpaddb %xmm0, %xmm2, %xmm0 ; AVX512-NEXT: vmovdqu (%rdi), %ymm1 ; AVX512-NEXT: vpmovdw %zmm1, %ymm1 -; AVX512-NEXT: vpaddb %xmm0, %xmm1, %xmm0 -; AVX512-NEXT: vpmullw %xmm2, %xmm0, %xmm0 +; AVX512-NEXT: vmovdqu (%rdi), %ymm2 +; AVX512-NEXT: vpsrlw $8, %ymm2, %ymm2 +; AVX512-NEXT: vpmovwb %zmm2, %ymm2 +; AVX512-NEXT: vpaddb %xmm2, %xmm1, %xmm1 +; AVX512-NEXT: vpmullw %xmm0, %xmm1, %xmm0 ; AVX512-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] ; AVX512-NEXT: vzeroupper ; AVX512-NEXT: retq @@ -529,33 +528,15 @@ define <16 x i1> @interleaved_load_vf16_i8_stride4(ptr %ptr) nounwind { ; AVX512-LABEL: interleaved_load_vf16_i8_stride4: ; AVX512: # %bb.0: ; AVX512-NEXT: vmovdqa64 (%rdi), %zmm0 -; AVX512-NEXT: vpmovdb %zmm0, %xmm0 -; AVX512-NEXT: vmovdqa 48(%rdi), %xmm1 -; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = -; AVX512-NEXT: vpshufb %xmm2, %xmm1, %xmm3 -; AVX512-NEXT: vmovdqa 32(%rdi), %xmm4 -; AVX512-NEXT: vpshufb %xmm2, %xmm4, %xmm2 -; AVX512-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] -; AVX512-NEXT: vmovdqa (%rdi), %ymm3 -; AVX512-NEXT: vpsrlw $8, %ymm3, %ymm5 -; AVX512-NEXT: vpmovdb %zmm5, %xmm5 -; AVX512-NEXT: vpblendd {{.*#+}} xmm2 = xmm5[0,1],xmm2[2,3] -; AVX512-NEXT: vmovdqa {{.*#+}} xmm5 = -; AVX512-NEXT: vpshufb %xmm5, %xmm1, %xmm6 -; AVX512-NEXT: vpshufb %xmm5, %xmm4, %xmm5 -; AVX512-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1] -; AVX512-NEXT: vpsrld $16, %ymm3, %ymm6 -; AVX512-NEXT: vpmovdb %zmm6, %xmm6 -; AVX512-NEXT: vpblendd {{.*#+}} xmm5 = xmm6[0,1],xmm5[2,3] -; AVX512-NEXT: vmovdqa {{.*#+}} xmm6 = -; AVX512-NEXT: vpshufb %xmm6, %xmm1, %xmm1 -; AVX512-NEXT: vpshufb %xmm6, %xmm4, %xmm4 -; AVX512-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm4[0],xmm1[0],xmm4[1],xmm1[1] -; AVX512-NEXT: vpsrld $24, %ymm3, %ymm3 +; AVX512-NEXT: vpmovdb %zmm0, %xmm1 +; AVX512-NEXT: vpsrlw $8, %zmm0, %zmm2 +; AVX512-NEXT: vpmovdb %zmm2, %xmm2 +; AVX512-NEXT: vpsrld $16, %zmm0, %zmm3 ; AVX512-NEXT: vpmovdb %zmm3, %xmm3 -; AVX512-NEXT: vpblendd {{.*#+}} xmm1 = xmm3[0,1],xmm1[2,3] -; AVX512-NEXT: vpcmpeqb %zmm2, %zmm0, %k0 -; AVX512-NEXT: vpcmpeqb %zmm1, %zmm5, %k1 +; AVX512-NEXT: vpsrld $24, %zmm0, %zmm0 +; AVX512-NEXT: vpmovdb %zmm0, %xmm0 +; AVX512-NEXT: vpcmpeqb %zmm2, %zmm1, %k0 +; AVX512-NEXT: vpcmpeqb %zmm0, %zmm3, %k1 ; AVX512-NEXT: kxnorw %k1, %k0, %k0 ; AVX512-NEXT: vpmovm2b %k0, %zmm0 ; AVX512-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 -- 2.7.4