From b3c66c7be6ca62568e610f4d534f2b91a3591d28 Mon Sep 17 00:00:00 2001 From: Dezhi Kong Date: Wed, 28 Aug 2019 16:11:53 +0800 Subject: [PATCH] osd: add osd blend reg config check. [1/4] PD#SWPL-2049 Problem: osd3 din blend config may be incorrect when viu2 is enable Solution: add osd blend reg config check Verify: verify by AC202(sm1) Change-Id: I3d8ff0d247226d4df1386808caba2a21a34f0b10 Signed-off-by: Dezhi Kong --- drivers/amlogic/media/osd/osd_hw.c | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/drivers/amlogic/media/osd/osd_hw.c b/drivers/amlogic/media/osd/osd_hw.c index dbe8ffe..ad095b8 100644 --- a/drivers/amlogic/media/osd/osd_hw.c +++ b/drivers/amlogic/media/osd/osd_hw.c @@ -8363,18 +8363,13 @@ static void set_blend_reg(struct layer_blend_reg_s *blend_reg) VSYNCOSD_WR_MPEG_REG( VIU_OSD_BLEND_DIN0_SCOPE_H + reg_offset * i, blend_reg->osd_blend_din_scope_h[i]); + } + if ((blend_reg->osd_blend_din_scope_v[i] & 0xffff0000) == 0) + blend_reg->osd_blend_din_scope_v[i] = + 0xffffffff; VSYNCOSD_WR_MPEG_REG( VIU_OSD_BLEND_DIN0_SCOPE_V + reg_offset * i, blend_reg->osd_blend_din_scope_v[i]); - } - else { - if ((blend_reg->osd_blend_din_scope_v[i] & 0xffff) == 0) - blend_reg->osd_blend_din_scope_v[i] = - 0xffffffff; - VSYNCOSD_WR_MPEG_REG( - VIU_OSD_BLEND_DIN0_SCOPE_V + reg_offset * i, - blend_reg->osd_blend_din_scope_v[i]); - } } dv_core2_vsize = (blend_reg->osd_blend_blend0_size >> 16) & 0xfff; -- 2.7.4