From b3a1a8c617efc254b8fedf9c74888c735232a5bf Mon Sep 17 00:00:00 2001
From: Hyunjun Ko <zzoon@igalia.com>
Date: Fri, 21 Apr 2023 11:16:08 +0900
Subject: [PATCH] intel/genxml: conform some fields to each other gen.

There are same fields across gens but the existing xmls are not exactly same,
which needs to be fixed.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
---
 src/intel/genxml/gen11.xml  |  9 ++++++---
 src/intel/genxml/gen12.xml  |  9 ++++++---
 src/intel/genxml/gen125.xml |  9 ++++++---
 src/intel/genxml/gen9.xml   | 26 +++++++++++---------------
 4 files changed, 29 insertions(+), 24 deletions(-)

diff --git a/src/intel/genxml/gen11.xml b/src/intel/genxml/gen11.xml
index dd8e485..a20f72c 100644
--- a/src/intel/genxml/gen11.xml
+++ b/src/intel/genxml/gen11.xml
@@ -346,7 +346,10 @@
     <field name="Arbitration Priority Control" start="7" end="8" type="HEVC_ARBITRATION_PRIORITY" />
     <field name="Memory Compression Enable" start="9" end="9" type="bool" />
     <field name="Memory Compression Mode" start="10" end="10" type="uint" />
-    <field name="Row Store Scratch Buffer Cache Select" start="12" end="12" type="uint" />
+    <field name="Row Store Scratch Buffer Cache Select" start="12" end="12" type="uint">
+      <value name="LLC" value="0" />
+      <value name="Internal Media Storage" value="1" />
+    </field>
     <field name="Tiled Resource Mode" start="13" end="14" type="uint">
       <value name="TRMODE_NONE" value="0" />
       <value name="TRMODE_TILEYF" value="1" />
@@ -3242,8 +3245,8 @@
     <field name="Reference Picture - Memory Address Attributes" start="1696" end="1727" type="MEMORYADDRESSATTRIBUTES" />
     <field name="Original Uncompressed Picture Source - Address" start="1728" end="1791" type="address" />
     <field name="Original Uncompressed Picture Source - Memory Address Attributes" start="1792" end="1823" type="MEMORYADDRESSATTRIBUTES" />
-    <field name="SAO Row Store Buffer - Address" start="1824" end="1887" type="address" />
-    <field name="SAO Row Store Buffer - Memory Address Attributes" start="1888" end="1919" type="MEMORYADDRESSATTRIBUTES" />
+    <field name="Stream-Out Data Destination - Address" start="1824" end="1887" type="address" />
+    <field name="Stream-Out Data Destination - Memory Address Attributes" start="1888" end="1919" type="MEMORYADDRESSATTRIBUTES" />
     <field name="Decoded Picture Status Buffer - Address" start="1920" end="1983" type="address" />
     <field name="Decoded Picture Status Buffer - Memory Address Attributes" start="1984" end="2015" type="MEMORYADDRESSATTRIBUTES" />
     <field name="LCU ILDB Stream-Out Buffer - Address" start="2016" end="2079" type="address" />
diff --git a/src/intel/genxml/gen12.xml b/src/intel/genxml/gen12.xml
index 840d24c..cb5993d 100644
--- a/src/intel/genxml/gen12.xml
+++ b/src/intel/genxml/gen12.xml
@@ -382,7 +382,10 @@
     <field name="Arbitration Priority Control" start="7" end="8" type="HEVC_ARBITRATION_PRIORITY" />
     <field name="Memory Compression Enable" start="9" end="9" type="bool" />
     <field name="Memory Compression Mode" start="10" end="10" type="uint" />
-    <field name="Row Store Scratch Buffer Cache Select" start="12" end="12" type="uint" />
+    <field name="Row Store Scratch Buffer Cache Select" start="12" end="12" type="uint">
+      <value name="LLC" value="0" />
+      <value name="Internal Media Storage" value="1" />
+    </field>
     <field name="Tiled Resource Mode" start="13" end="14" type="uint">
       <value name="TRMODE_NONE" value="0" />
       <value name="TRMODE_TILEYF" value="1" />
@@ -3410,8 +3413,8 @@
     <field name="Reference Picture - Memory Address Attributes" start="1696" end="1727" type="MEMORYADDRESSATTRIBUTES" />
     <field name="Original Uncompressed Picture Source - Address" start="1728" end="1791" type="address" />
     <field name="Original Uncompressed Picture Source - Memory Address Attributes" start="1792" end="1823" type="MEMORYADDRESSATTRIBUTES" />
-    <field name="SAO Row Store Buffer - Address" start="1824" end="1887" type="address" />
-    <field name="SAO Row Store Buffer - Memory Address Attributes" start="1888" end="1919" type="MEMORYADDRESSATTRIBUTES" />
+    <field name="Stream-Out Data Destination - Address" start="1824" end="1887" type="address" />
+    <field name="Stream-Out Data Destination - Memory Address Attributes" start="1888" end="1919" type="MEMORYADDRESSATTRIBUTES" />
     <field name="Decoded Picture Status Buffer - Address" start="1920" end="1983" type="address" />
     <field name="Decoded Picture Status Buffer - Memory Address Attributes" start="1984" end="2015" type="MEMORYADDRESSATTRIBUTES" />
     <field name="LCU ILDB Stream-Out Buffer - Address" start="2016" end="2079" type="address" />
diff --git a/src/intel/genxml/gen125.xml b/src/intel/genxml/gen125.xml
index 7be1019..62de2fa 100644
--- a/src/intel/genxml/gen125.xml
+++ b/src/intel/genxml/gen125.xml
@@ -406,7 +406,10 @@
     <field name="Arbitration Priority Control" start="7" end="8" type="HEVC_ARBITRATION_PRIORITY" />
     <field name="Memory Compression Enable" start="9" end="9" type="bool" />
     <field name="Memory Compression Mode" start="10" end="10" type="uint" />
-    <field name="Row Store Scratch Buffer Cache Select" start="12" end="12" type="uint" />
+    <field name="Row Store Scratch Buffer Cache Select" start="12" end="12" type="uint">
+      <value name="LLC" value="0" />
+      <value name="Internal Media Storage" value="1" />
+    </field>
     <field name="Tiled Resource Mode" start="13" end="14" type="uint">
       <value name="TRMODE_NONE" value="0" />
       <value name="TRMODE_TILEYF" value="1" />
@@ -3936,8 +3939,8 @@
     <field name="Reference Picture - Memory Address Attributes" start="1696" end="1727" type="MEMORYADDRESSATTRIBUTES" />
     <field name="Original Uncompressed Picture Source - Address" start="1728" end="1791" type="address" />
     <field name="Original Uncompressed Picture Source - Memory Address Attributes" start="1792" end="1823" type="MEMORYADDRESSATTRIBUTES" />
-    <field name="SAO Row Store Buffer - Address" start="1824" end="1887" type="address" />
-    <field name="SAO Row Store Buffer - Memory Address Attributes" start="1888" end="1919" type="MEMORYADDRESSATTRIBUTES" />
+    <field name="Stream-Out Data Destination - Address" start="1824" end="1887" type="address" />
+    <field name="Stream-Out Data Destination - Memory Address Attributes" start="1888" end="1919" type="MEMORYADDRESSATTRIBUTES" />
     <field name="Decoded Picture Status Buffer - Address" start="1920" end="1983" type="address" />
     <field name="Decoded Picture Status Buffer - Memory Address Attributes" start="1984" end="2015" type="MEMORYADDRESSATTRIBUTES" />
     <field name="LCU ILDB Stream-Out Buffer - Address" start="2016" end="2079" type="address" />
diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index 7277e8b..66d2ae6 100644
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -315,15 +315,19 @@
     <field name="Channel Mask" start="4" end="7" type="uint" />
     <field name="Constant Buffer Offset" start="8" end="15" type="offset" />
   </struct>
-  <struct name="MEMORYADDRESSATTRIBUTES" length="1">
-    <field name="MOCS" start="0" end="6" type="uint" nonzero="true" />
-    <field name="Arbitration Priority Control" start="7" end="8" type="uint">
+  <struct name="HEVC_ARBITRATION_PRIORITY" length="1">
+    <field name="Priority" start="0" end="1" type="uint">
       <value name="Highest priority" value="0" />
       <value name="Second highest priority" value="1" />
       <value name="Third highest priority" value="2" />
       <value name="Lowest priority" value="3" />
     </field>
+  </struct>
+  <struct name="MEMORYADDRESSATTRIBUTES" length="1">
+    <field name="MOCS" start="0" end="6" type="uint" nonzero="true" />
+    <field name="Arbitration Priority Control" start="7" end="8" type="HEVC_ARBITRATION_PRIORITY" />
     <field name="Memory Compression Enable" start="9" end="9" type="bool" />
+    <field name="Memory Compression Mode" start="10" end="10" type="uint" />
     <field name="Row Store Scratch Buffer Cache Select" start="12" end="12" type="uint">
       <value name="LLC" value="0" />
       <value name="Internal Media Storage" value="1" />
@@ -370,14 +374,6 @@
     <field name="Delta Luma Weight LX" start="0" end="7" type="int" />
     <field name="Luma Offset LX" start="8" end="15" type="uint" />
   </struct>
-  <struct name="HEVC_ARBITRATION_PRIORITY" length="1">
-    <field name="Priority" start="0" end="1" type="uint">
-      <value name="Highest priority" value="0" />
-      <value name="Second highest priority" value="1" />
-      <value name="Third highest priority" value="2" />
-      <value name="Lowest priority" value="3" />
-    </field>
-  </struct>
   <struct name="HEVC_VP9_RDOQ_LAMBDA_FIELDS" length="1">
     <field name="Lambda Value 0" start="0" end="15" type="uint" />
     <field name="Lambda Value 1" start="16" end="31" type="uint" />
@@ -2957,10 +2953,10 @@
     <field name="VP9 Probability Buffer - Memory Address Attributes" start="2720" end="2751" type="MEMORYADDRESSATTRIBUTES" />
     <field name="VP9 Segment ID Buffer - Address" start="2752" end="2815" type="uint" />
     <field name="VP9 Segment ID Buffer - Memory Address Attributes" start="2816" end="2847" type="MEMORYADDRESSATTRIBUTES" />
-    <field name="VP9 HVD Line Rowstore Buffer - Address" start="2848" end="2911" type="address" />
-    <field name="VP9 HVD Line Rowstore Buffer - Memory Address Attributes" start="2912" end="2943" type="MEMORYADDRESSATTRIBUTES" />
-    <field name="VP9 HVD Tile Rowstore Buffer - Address" start="2944" end="3007" type="address" />
-    <field name="VP9 HVD Tile Rowstore Buffer - Memory Address Attributes" start="3008" end="3039" type="MEMORYADDRESSATTRIBUTES" />
+    <field name="VP9 HVD Line Row Store Buffer - Address" start="2848" end="2911" type="address" />
+    <field name="VP9 HVD Line Row Store Buffer - Memory Address Attributes" start="2912" end="2943" type="MEMORYADDRESSATTRIBUTES" />
+    <field name="VP9 HVD Tile Row Store Buffer - Address" start="2944" end="3007" type="address" />
+    <field name="VP9 HVD Tile Row Store Buffer - Memory Address Attributes" start="3008" end="3039" type="MEMORYADDRESSATTRIBUTES" />
   </instruction>
   <instruction name="HCP_PIPE_MODE_SELECT" bias="2" length="4" engine="video">
     <field name="DWord Length" start="0" end="11" type="uint" />
-- 
2.7.4