From b3327b700747d02ddc9e33cc47754e995b15717c Mon Sep 17 00:00:00 2001 From: Junmo Park Date: Thu, 28 Jan 2016 06:23:33 +0000 Subject: [PATCH] [DAGCombiner] Don't add volatile or indexed stores to ChainedStores Summary: findBetterNeighborChains does not handle volatile or indexed stores. However, it did not check when adding stores to ChainedStores. Reviewers: arsenm Differential Revision: http://reviews.llvm.org/D16463 llvm-svn: 259024 --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 ++ ...64-DAGCombine-findBetterNeighborChains-crash.ll | 43 ++++++++++++++++++++++ 2 files changed, 47 insertions(+) create mode 100644 llvm/test/CodeGen/AArch64/aarch64-DAGCombine-findBetterNeighborChains-crash.ll diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 3580147..fea77d0 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -14756,6 +14756,10 @@ bool DAGCombiner::findBetterNeighborChains(StoreSDNode* St) { while (true) { if (StoreSDNode *STn = dyn_cast(NextInChain)) { // We found a store node. Use it for the next iteration. + if (STn->isVolatile() || STn->isIndexed()) { + Index = nullptr; + break; + } ChainedStores.push_back(STn); Index = STn; break; diff --git a/llvm/test/CodeGen/AArch64/aarch64-DAGCombine-findBetterNeighborChains-crash.ll b/llvm/test/CodeGen/AArch64/aarch64-DAGCombine-findBetterNeighborChains-crash.ll new file mode 100644 index 0000000..73200b5 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/aarch64-DAGCombine-findBetterNeighborChains-crash.ll @@ -0,0 +1,43 @@ +; RUN: llc < %s -march=arm64 +; Make sure we are not crashing on this test. + +target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128" +target triple = "aarch64-unknown-linux-gnu" + +declare void @extern(i8*) + +; Function Attrs: argmemonly nounwind +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) #0 + +; Function Attrs: nounwind +define void @func(float* noalias %arg, i32* noalias %arg1, i8* noalias %arg2, i8* noalias %arg3) #1 { +bb: + %tmp = getelementptr inbounds i8, i8* %arg2, i64 88 + tail call void @llvm.memset.p0i8.i64(i8* noalias %arg2, i8 0, i64 40, i32 8, i1 false) + store i8 0, i8* %arg3 + store i8 2, i8* %arg2 + store float 0.000000e+00, float* %arg + %tmp4 = bitcast i8* %tmp to <4 x float>* + store volatile <4 x float> zeroinitializer, <4 x float>* %tmp4 + store i32 5, i32* %arg1 + tail call void @extern(i8* %tmp) + ret void +} + +; Function Attrs: nounwind +define void @func2(float* noalias %arg, i32* noalias %arg1, i8* noalias %arg2, i8* noalias %arg3) #1 { +bb: + %tmp = getelementptr inbounds i8, i8* %arg2, i64 88 + tail call void @llvm.memset.p0i8.i64(i8* noalias %arg2, i8 0, i64 40, i32 8, i1 false) + store i8 0, i8* %arg3 + store i8 2, i8* %arg2 + store float 0.000000e+00, float* %arg + %tmp4 = bitcast i8* %tmp to <4 x float>* + store <4 x float> zeroinitializer, <4 x float>* %tmp4 + store i32 5, i32* %arg1 + tail call void @extern(i8* %tmp) + ret void +} + +attributes #0 = { argmemonly nounwind } +attributes #1 = { nounwind "target-cpu"="cortex-a53" } -- 2.7.4