From b32556b058a9fb04355fb68d53c29c6e541b6990 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Timur=20Krist=C3=B3f?= Date: Tue, 18 Apr 2023 13:26:19 +0200 Subject: [PATCH] radv: Fix dword alignment in SDMA buffer copy. MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Also add a comment that explains the dword aligned mode. Note that the SDMA shader uploads are always dword aligned so this commit doesn't fix any issues but just prepares this function for more general use. Signed-off-by: Timur Kristóf Reviewed-by: Tatsuyuki Ishi Part-of: --- src/amd/vulkan/radv_sdma_copy_image.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_sdma_copy_image.c b/src/amd/vulkan/radv_sdma_copy_image.c index 20cc2c0..ae92ede 100644 --- a/src/amd/vulkan/radv_sdma_copy_image.c +++ b/src/amd/vulkan/radv_sdma_copy_image.c @@ -159,8 +159,14 @@ radv_sdma_copy_buffer(struct radv_device *device, struct radeon_cmdbuf *cs, uint assert(gfx_level >= GFX7); - /* Align copy size to dw if src/dst address are dw aligned */ - if ((src_va & 0x3) == 0 && (src_va & 0x3) == 0 && size > 4 && (size & 3) != 0) { + /* SDMA FW automatically enables a faster dword copy mode when + * source, destination and size are all dword-aligned. + * + * When source and destination are dword-aligned, round down the size to + * take advantage of faster dword copy, and copy the remaining few bytes + * with the last copy packet. + */ + if ((src_va & 0x3) == 0 && (dst_va & 0x3) == 0 && size > 4 && (size & 0x3) != 0) { align = ~0x3u; ncopy++; } -- 2.7.4