From b246ca79fa577ac0c441971e53f73ccec6a36327 Mon Sep 17 00:00:00 2001 From: Nikita Popov Date: Fri, 28 Oct 2022 17:29:07 +0200 Subject: [PATCH] [GVN] Regenerate test checks (NFC) --- llvm/test/Transforms/GVN/PRE/phi-translate-2.ll | 186 +++++++++++++++++------- 1 file changed, 134 insertions(+), 52 deletions(-) diff --git a/llvm/test/Transforms/GVN/PRE/phi-translate-2.ll b/llvm/test/Transforms/GVN/PRE/phi-translate-2.ll index b40c745..c2bb8eb 100644 --- a/llvm/test/Transforms/GVN/PRE/phi-translate-2.ll +++ b/llvm/test/Transforms/GVN/PRE/phi-translate-2.ll @@ -1,4 +1,5 @@ -; RUN: opt < %s -debugify -gvn -S | FileCheck %s +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -gvn -S | FileCheck %s target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" @a = common global [100 x i64] zeroinitializer, align 16 @@ -9,6 +10,24 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" declare i64 @goo(...) local_unnamed_addr #1 define void @test1(i64 %a, i64 %b, i64 %c, i64 %d) { +; CHECK-LABEL: @test1( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[MUL:%.*]] = mul nsw i64 [[B:%.*]], [[A:%.*]] +; CHECK-NEXT: store i64 [[MUL]], i64* @g1, align 8 +; CHECK-NEXT: [[T0:%.*]] = load i64, i64* @g2, align 8 +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[T0]], 3 +; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] +; CHECK: if.then: +; CHECK-NEXT: [[MUL2:%.*]] = mul nsw i64 [[D:%.*]], [[C:%.*]] +; CHECK-NEXT: store i64 [[MUL2]], i64* @g2, align 8 +; CHECK-NEXT: br label [[IF_END]] +; CHECK: if.end: +; CHECK-NEXT: [[MUL3_PRE_PHI:%.*]] = phi i64 [ [[MUL2]], [[IF_THEN]] ], [ [[MUL]], [[ENTRY:%.*]] ] +; CHECK-NEXT: [[B_ADDR_0:%.*]] = phi i64 [ [[D]], [[IF_THEN]] ], [ [[B]], [[ENTRY]] ] +; CHECK-NEXT: [[A_ADDR_0:%.*]] = phi i64 [ [[C]], [[IF_THEN]] ], [ [[A]], [[ENTRY]] ] +; CHECK-NEXT: store i64 [[MUL3_PRE_PHI]], i64* @g3, align 8 +; CHECK-NEXT: ret void +; entry: %mul = mul nsw i64 %b, %a store i64 %mul, i64* @g1, align 8 @@ -22,11 +41,6 @@ if.then: ; preds = %entry br label %if.end ; Check phi-translate works and mul is removed. -; CHECK-LABEL: @test1( -; CHECK: if.end: -; CHECK: %[[MULPHI:.*]] = phi i64 [ {{.*}}, %if.then ], [ %mul, %entry ] -; CHECK-NOT: = mul -; CHECK: store i64 %[[MULPHI]], i64* @g3, align 8 if.end: ; preds = %if.then, %entry %b.addr.0 = phi i64 [ %d, %if.then ], [ %b, %entry ] %a.addr.0 = phi i64 [ %c, %if.then ], [ %a, %entry ] @@ -36,6 +50,33 @@ if.end: ; preds = %if.then, %entry } define void @test2(i64 %i) { +; CHECK-LABEL: @test2( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i64], [100 x i64]* @a, i64 0, i64 [[I:%.*]] +; CHECK-NEXT: [[T0:%.*]] = load i64, i64* [[ARRAYIDX]], align 8 +; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [100 x i64], [100 x i64]* @b, i64 0, i64 [[I]] +; CHECK-NEXT: [[T1:%.*]] = load i64, i64* [[ARRAYIDX1]], align 8 +; CHECK-NEXT: [[MUL:%.*]] = mul nsw i64 [[T1]], [[T0]] +; CHECK-NEXT: store i64 [[MUL]], i64* @g1, align 8 +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[MUL]], 3 +; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] +; CHECK: if.then: +; CHECK-NEXT: [[CALL:%.*]] = tail call i64 (...) @goo() +; CHECK-NEXT: store i64 [[CALL]], i64* @g2, align 8 +; CHECK-NEXT: [[T2_PRE:%.*]] = load i64, i64* getelementptr inbounds ([100 x i64], [100 x i64]* @a, i64 0, i64 3), align 8 +; CHECK-NEXT: [[T3_PRE:%.*]] = load i64, i64* getelementptr inbounds ([100 x i64], [100 x i64]* @b, i64 0, i64 3), align 8 +; CHECK-NEXT: [[DOTPRE:%.*]] = mul nsw i64 [[T3_PRE]], [[T2_PRE]] +; CHECK-NEXT: br label [[IF_END]] +; CHECK: if.end: +; CHECK-NEXT: [[MUL5_PRE_PHI:%.*]] = phi i64 [ [[DOTPRE]], [[IF_THEN]] ], [ [[MUL]], [[ENTRY:%.*]] ] +; CHECK-NEXT: [[T3:%.*]] = phi i64 [ [[T3_PRE]], [[IF_THEN]] ], [ [[T1]], [[ENTRY]] ] +; CHECK-NEXT: [[T2:%.*]] = phi i64 [ [[T2_PRE]], [[IF_THEN]] ], [ [[T0]], [[ENTRY]] ] +; CHECK-NEXT: [[I_ADDR_0:%.*]] = phi i64 [ 3, [[IF_THEN]] ], [ [[I]], [[ENTRY]] ] +; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [100 x i64], [100 x i64]* @a, i64 0, i64 [[I_ADDR_0]] +; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [100 x i64], [100 x i64]* @b, i64 0, i64 [[I_ADDR_0]] +; CHECK-NEXT: store i64 [[MUL5_PRE_PHI]], i64* @g3, align 8 +; CHECK-NEXT: ret void +; entry: %arrayidx = getelementptr inbounds [100 x i64], [100 x i64]* @a, i64 0, i64 %i %t0 = load i64, i64* %arrayidx, align 8 @@ -48,19 +89,11 @@ entry: ; Check phi-translate works for the phi generated by loadpre. A new mul will be ; inserted in if.then block. -; CHECK-LABEL: @test2( -; CHECK: if.then: -; CHECK: %[[MUL_THEN:.*]] = mul -; CHECK: br label %if.end if.then: ; preds = %entry %call = tail call i64 (...) @goo() #2 store i64 %call, i64* @g2, align 8 br label %if.end -; CHECK: if.end: -; CHECK: %[[MULPHI:.*]] = phi i64 [ %[[MUL_THEN]], %if.then ], [ %mul, %entry ] -; CHECK-NOT: = mul -; CHECK: store i64 %[[MULPHI]], i64* @g3, align 8 if.end: ; preds = %if.then, %entry %i.addr.0 = phi i64 [ 3, %if.then ], [ %i, %entry ] %arrayidx3 = getelementptr inbounds [100 x i64], [100 x i64]* @a, i64 0, i64 %i.addr.0 @@ -74,10 +107,28 @@ if.end: ; preds = %if.then, %entry ; Check phi-translate doesn't go through backedge, which may lead to incorrect ; pre transformation. -; CHECK: for.end: -; CHECK-NOT: %{{.*pre-phi}} = phi -; CHECK: ret void define void @test3(i64 %N, i64* nocapture readonly %a) { +; CHECK-LABEL: @test3( +; CHECK-NEXT: entry: +; CHECK-NEXT: br label [[FOR_COND:%.*]] +; CHECK: for.cond: +; CHECK-NEXT: [[I_0:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[ADD:%.*]], [[FOR_BODY:%.*]] ] +; CHECK-NEXT: [[ADD]] = add nuw nsw i64 [[I_0]], 1 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i64, i64* [[A:%.*]], i64 [[ADD]] +; CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* [[ARRAYIDX]], align 8 +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[I_0]], [[N:%.*]] +; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]] +; CHECK: for.body: +; CHECK-NEXT: [[CALL:%.*]] = tail call i64 (...) @goo() +; CHECK-NEXT: [[ADD1:%.*]] = sub nsw i64 0, [[CALL]] +; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[TMP0]], [[ADD1]] +; CHECK-NEXT: br i1 [[TOBOOL]], label [[FOR_COND]], label [[FOR_END]] +; CHECK: for.end: +; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i64, i64* [[A]], i64 [[I_0]] +; CHECK-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARRAYIDX2]], align 8 +; CHECK-NEXT: store i64 [[TMP1]], i64* @g1, align 8 +; CHECK-NEXT: ret void +; entry: br label %for.cond @@ -105,12 +156,23 @@ for.end: ; preds = %for.body, %for.cond ; It is incorrect to use the value of %andres in last loop iteration ; to do pre. -; CHECK-LABEL: @test4( -; CHECK: for.body: -; CHECK-NOT: %andres.pre-phi = phi i32 -; CHECK: br i1 %tobool1 - define i32 @test4(i32 %cond, i32 %SectionAttrs.0231.ph, i32 *%AttrFlag) { +; CHECK-LABEL: @test4( +; CHECK-NEXT: for.body.preheader: +; CHECK-NEXT: [[T514:%.*]] = load volatile i32, i32* [[ATTRFLAG:%.*]], align 4 +; CHECK-NEXT: br label [[FOR_BODY:%.*]] +; CHECK: for.body: +; CHECK-NEXT: [[T320:%.*]] = phi i32 [ [[T334:%.*]], [[BB343:%.*]] ], [ [[T514]], [[FOR_BODY_PREHEADER:%.*]] ] +; CHECK-NEXT: [[ANDRES:%.*]] = and i32 [[T320]], [[SECTIONATTRS_0231_PH:%.*]] +; CHECK-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[ANDRES]], 0 +; CHECK-NEXT: br i1 [[TOBOOL1]], label [[BB343]], label [[CRITEDGE_LOOPEXIT:%.*]] +; CHECK: bb343: +; CHECK-NEXT: [[T334]] = load volatile i32, i32* [[ATTRFLAG]], align 4 +; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp eq i32 [[COND:%.*]], 0 +; CHECK-NEXT: br i1 [[TOBOOL2]], label [[CRITEDGE_LOOPEXIT]], label [[FOR_BODY]] +; CHECK: critedge.loopexit: +; CHECK-NEXT: unreachable +; for.body.preheader: %t514 = load volatile i32, i32* %AttrFlag br label %for.body @@ -130,26 +192,35 @@ critedge.loopexit: unreachable } -; Check sub expression will be pre transformed. -; CHECK-LABEL: @test5( -; CHECK: entry: -; CHECK: %sub.ptr.sub = sub i64 %sub.ptr.lhs.cast, %sub.ptr.rhs.cast -; CHECK: br i1 %cmp -; CHECK: if.then2: -; CHECK: %[[PTRTOINT:.*]] = ptrtoint i32* %add.ptr to i64 -; CHECK: %[[SUB:.*]] = sub i64 %sub.ptr.lhs.cast, %[[PTRTOINT]] -; CHECK: br label %if.end3 -; CHECK: if.end3: -; CHECK: %[[PREPHI:.*]] = phi i64 [ %sub.ptr.sub, %if.else ], [ %[[SUB]], %if.then2 ], [ %sub.ptr.sub, %entry ] -; CHECK: call void @llvm.dbg.value(metadata i32* %p.0, metadata [[var_p0:![0-9]+]], metadata !DIExpression()) -; CHECK: call void @llvm.dbg.value(metadata i64 %sub.ptr.rhs.cast5.pre-phi, metadata [[var_sub_ptr:![0-9]+]], metadata !DIExpression()) -; CHECK: %[[DIV:.*]] = ashr exact i64 %[[PREPHI]], 2 -; CHECK: ret i64 %[[DIV]] - declare void @bar(...) local_unnamed_addr #1 -; Function Attrs: nounwind uwtable +; Check sub expression will be pre transformed. define i64 @test5(i32* %start, i32* %e, i32 %n1, i32 %n2) local_unnamed_addr #0 { +; CHECK-LABEL: @test5( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint i32* [[E:%.*]] to i64 +; CHECK-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint i32* [[START:%.*]] to i64 +; CHECK-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]] +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[SUB_PTR_SUB]], 4000 +; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END3:%.*]] +; CHECK: if.then: +; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[N1:%.*]], [[N2:%.*]] +; CHECK-NEXT: br i1 [[CMP1]], label [[IF_THEN2:%.*]], label [[IF_ELSE:%.*]] +; CHECK: if.then2: +; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[START]], i64 800 +; CHECK-NEXT: [[DOTPRE:%.*]] = ptrtoint i32* [[ADD_PTR]] to i64 +; CHECK-NEXT: [[DOTPRE1:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[DOTPRE]] +; CHECK-NEXT: br label [[IF_END3]] +; CHECK: if.else: +; CHECK-NEXT: tail call void (...) @bar() +; CHECK-NEXT: br label [[IF_END3]] +; CHECK: if.end3: +; CHECK-NEXT: [[SUB_PTR_SUB6_PRE_PHI:%.*]] = phi i64 [ [[SUB_PTR_SUB]], [[IF_ELSE]] ], [ [[DOTPRE1]], [[IF_THEN2]] ], [ [[SUB_PTR_SUB]], [[ENTRY:%.*]] ] +; CHECK-NEXT: [[SUB_PTR_RHS_CAST5_PRE_PHI:%.*]] = phi i64 [ [[SUB_PTR_RHS_CAST]], [[IF_ELSE]] ], [ [[DOTPRE]], [[IF_THEN2]] ], [ [[SUB_PTR_RHS_CAST]], [[ENTRY]] ] +; CHECK-NEXT: [[P_0:%.*]] = phi i32* [ [[ADD_PTR]], [[IF_THEN2]] ], [ [[START]], [[IF_ELSE]] ], [ [[START]], [[ENTRY]] ] +; CHECK-NEXT: [[SUB_PTR_DIV7:%.*]] = ashr exact i64 [[SUB_PTR_SUB6_PRE_PHI]], 2 +; CHECK-NEXT: ret i64 [[SUB_PTR_DIV7]] +; entry: %sub.ptr.lhs.cast = ptrtoint i32* %e to i64 %sub.ptr.rhs.cast = ptrtoint i32* %start to i64 @@ -180,18 +251,34 @@ if.end3: ; preds = %if.then2, %if.else, ; Here the load from arrayidx1 is partially redundant, but its value is ; available in if.then. Check that we correctly phi-translate to the phi that ; the load has been replaced with. -; CHECK-LABEL: @test6 define void @test6(i32* %ptr) { -; CHECK: entry: -; CHECK: %[[PREGEP:.*]] = getelementptr inbounds i32, i32* %ptr, i64 1 -; CHECK: %[[PRE:.*]] = load i32, i32* %[[PREGEP]] +; CHECK-LABEL: @test6( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[ARRAYIDX1_PHI_TRANS_INSERT:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1 +; CHECK-NEXT: [[DOTPRE:%.*]] = load i32, i32* [[ARRAYIDX1_PHI_TRANS_INSERT]], align 4 +; CHECK-NEXT: br label [[WHILE:%.*]] +; CHECK: while: +; CHECK-NEXT: [[TMP0:%.*]] = phi i32 [ [[DOTPRE]], [[ENTRY:%.*]] ], [ [[TMP2:%.*]], [[IF_END:%.*]] ] +; CHECK-NEXT: [[I:%.*]] = phi i64 [ 1, [[ENTRY]] ], [ [[I_NEXT:%.*]], [[IF_END]] ] +; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[PTR]], i64 [[I]] +; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 +; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, i32* [[PTR]], i64 [[I_NEXT]] +; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4 +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP0]], [[TMP1]] +; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END]] +; CHECK: if.then: +; CHECK-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX1]], align 4 +; CHECK-NEXT: store i32 [[TMP0]], i32* [[ARRAYIDX2]], align 4 +; CHECK-NEXT: br label [[IF_END]] +; CHECK: if.end: +; CHECK-NEXT: [[TMP2]] = phi i32 [ [[TMP0]], [[IF_THEN]] ], [ [[TMP1]], [[WHILE]] ] +; CHECK-NEXT: br i1 undef, label [[WHILE_END:%.*]], label [[WHILE]] +; CHECK: while.end: +; CHECK-NEXT: ret void +; entry: br label %while -; CHECK: while: -; CHECK: %[[PHI1:.*]] = phi i32 [ %[[PRE]], %entry ], [ %[[PHI2:.*]], %if.end ] -; CHECK-NOT: load i32, i32* %arrayidx1 -; CHECK: %[[LOAD:.*]] = load i32, i32* %arrayidx2 while: %i = phi i64 [ 1, %entry ], [ %i.next, %if.end ] %arrayidx1 = getelementptr inbounds i32, i32* %ptr, i64 %i @@ -207,14 +294,9 @@ if.then: store i32 %0, i32* %arrayidx2, align 4 br label %if.end -; CHECK: if.then: -; CHECK: %[[PHI2]] = phi i32 [ %[[PHI1]], %if.then ], [ %[[LOAD]], %while ] if.end: br i1 undef, label %while.end, label %while while.end: ret void } - -; CHECK: [[var_p0]] = !DILocalVariable -; CHECK: [[var_sub_ptr]] = !DILocalVariable -- 2.7.4