From b2420c67e4b00d8eca7fb1af54aa520ea43c21d2 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Thu, 4 May 2023 17:48:30 -0700 Subject: [PATCH] [RISCV] Restrict valid indices for cm.jalt to be in [32,255]. Reviewed By: jrtc27 Differential Revision: https://reviews.llvm.org/D149901 --- llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 12 ++++++++++++ llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h | 1 + llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 3 +++ llvm/lib/Target/RISCV/RISCVInstrInfoZc.td | 9 ++++++++- llvm/test/MC/RISCV/rv32zcmt-invalid.s | 5 ++++- llvm/test/MC/RISCV/rv32zcmt-valid.s | 10 ++-------- 6 files changed, 30 insertions(+), 10 deletions(-) diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp index 0d38cc3..4731892 100644 --- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp +++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp @@ -596,6 +596,16 @@ public: bool isUImm7() const { return IsUImm<7>(); } bool isUImm8() const { return IsUImm<8>(); } + bool isUImm8GE32() const { + int64_t Imm; + RISCVMCExpr::VariantKind VK = RISCVMCExpr::VK_RISCV_None; + if (!isImm()) + return false; + bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK); + return IsConstantImm && isUInt<8>(Imm) && Imm >= 32 && + VK == RISCVMCExpr::VK_RISCV_None; + } + bool isRnumArg() const { int64_t Imm; RISCVMCExpr::VariantKind VK = RISCVMCExpr::VK_RISCV_None; @@ -1291,6 +1301,8 @@ bool RISCVAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, return generateImmOutOfRangeError(Operands, ErrorInfo, 0, (1 << 7) - 1); case Match_InvalidUImm8: return generateImmOutOfRangeError(Operands, ErrorInfo, 0, (1 << 8) - 1); + case Match_InvalidUImm8GE32: + return generateImmOutOfRangeError(Operands, ErrorInfo, 32, (1 << 8) - 1); case Match_InvalidSImm5: return generateImmOutOfRangeError(Operands, ErrorInfo, -(1 << 4), (1 << 4) - 1); diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h index 6b3024e..c2a1596 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h @@ -242,6 +242,7 @@ enum OperandType : unsigned { OPERAND_UIMM8_LSB00, OPERAND_UIMM8, OPERAND_UIMM8_LSB000, + OPERAND_UIMM8_GE32, OPERAND_UIMM9_LSB000, OPERAND_UIMM10_LSB00_NONZERO, OPERAND_UIMM12, diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp index dbde872..a57c4af 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp +++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp @@ -1708,6 +1708,9 @@ bool RISCVInstrInfo::verifyInstruction(const MachineInstr &MI, case RISCVOp::OPERAND_UIMM8_LSB000: Ok = isShiftedUInt<5, 3>(Imm); break; + case RISCVOp::OPERAND_UIMM8_GE32: + Ok = isUInt<8>(Imm) && Imm >= 32; + break; case RISCVOp::OPERAND_UIMM9_LSB000: Ok = isShiftedUInt<6, 3>(Imm); break; diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoZc.td b/llvm/lib/Target/RISCV/RISCVInstrInfoZc.td index 2f2c347..7d70188 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfoZc.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoZc.td @@ -32,6 +32,13 @@ def uimm2_lsb0 : Operand, }]; } +def uimm8ge32 : Operand { + let ParserMatchClass = UImmAsmOperand<8, "GE32">; + let DecoderMethod = "decodeUImmOperand<8>"; + let OperandType = "OPERAND_UIMM8_GE32"; + let OperandNamespace = "RISCVOp"; +} + //===----------------------------------------------------------------------===// // Instruction Class Templates //===----------------------------------------------------------------------===// @@ -135,7 +142,7 @@ def CM_JT : RVInst16CJ<0b101, 0b10, (outs), (ins uimm5:$index), let Inst{6-2} = index; } -def CM_JALT : RVInst16CJ<0b101, 0b10, (outs), (ins uimm8:$index), +def CM_JALT : RVInst16CJ<0b101, 0b10, (outs), (ins uimm8ge32:$index), "cm.jalt", "$index">{ bits<8> index; diff --git a/llvm/test/MC/RISCV/rv32zcmt-invalid.s b/llvm/test/MC/RISCV/rv32zcmt-invalid.s index c8f8c4f..d784dc4 100644 --- a/llvm/test/MC/RISCV/rv32zcmt-invalid.s +++ b/llvm/test/MC/RISCV/rv32zcmt-invalid.s @@ -6,5 +6,8 @@ # CHECK-ERROR: error: immediate must be an integer in the range [0, 31] cm.jt 64 -# CHECK-ERROR: error: immediate must be an integer in the range [0, 255] +# CHECK-ERROR: error: immediate must be an integer in the range [32, 255] cm.jalt 256 + +# CHECK-ERROR: error: immediate must be an integer in the range [32, 255] +cm.jalt 31 diff --git a/llvm/test/MC/RISCV/rv32zcmt-valid.s b/llvm/test/MC/RISCV/rv32zcmt-valid.s index 795c07a..75f6442 100644 --- a/llvm/test/MC/RISCV/rv32zcmt-valid.s +++ b/llvm/test/MC/RISCV/rv32zcmt-valid.s @@ -5,7 +5,7 @@ # RUN: -mattr=m < %s \ # RUN: | llvm-objdump --mattr=+experimental-zcmt\ # RUN: -M no-aliases -d -r - \ -# RUN: | FileCheck --check-prefixes=CHECK-OBJ,CHECK-ASM-AND-OBJ %s +# RUN: | FileCheck --check-prefixes=CHECK-ASM-AND-OBJ %s # RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zcmt\ # RUN: -riscv-no-aliases -show-encoding \ # RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s @@ -13,7 +13,7 @@ # RUN: -mattr=m < %s \ # RUN: | llvm-objdump --mattr=+experimental-zcmt\ # RUN: -M no-aliases -d -r - \ -# RUN: | FileCheck --check-prefixes=CHECK-OBJ,CHECK-ASM-AND-OBJ %s +# RUN: | FileCheck --check-prefixes=CHECK-ASM-AND-OBJ %s # # RUN: not llvm-mc -triple riscv32 \ # RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \ @@ -27,12 +27,6 @@ # CHECK-NO-EXT: error: instruction requires the following: 'Zcmt' (table jump instuctions for code-size reduction){{$}} cm.jt 1 -# CHECK-ASM: cm.jalt 1 -# CHECK-OBJ: cm.jt 1 -# CHECK-ASM: encoding: [0x06,0xa0] -# CHECK-NO-EXT: error: instruction requires the following: 'Zcmt' (table jump instuctions for code-size reduction){{$}} -cm.jalt 1 - # CHECK-ASM-AND-OBJ: cm.jalt 32 # CHECK-ASM: encoding: [0x82,0xa0] # CHECK-NO-EXT: error: instruction requires the following: 'Zcmt' (table jump instuctions for code-size reduction){{$}} -- 2.7.4