From b23041ad4d3a5a045fad0be10e6aa15db135f91a Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 2 Mar 2018 02:19:11 +0000 Subject: [PATCH] AMDGPU/GlobalISel: Define instruction mapping for G_FPTOUI Patch by Tom Stellard llvm-svn: 326533 --- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 1 + .../AMDGPU/GlobalISel/regbankselect-fptoui.mir | 31 ++++++++++++++++++++++ 2 files changed, 32 insertions(+) create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptoui.mir diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp index 7bae7ca..958d113 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp @@ -293,6 +293,7 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { // Fall-through case AMDGPU::G_FADD: + case AMDGPU::G_FPTOUI: case AMDGPU::G_FMUL: return getDefaultMappingVOP(MI); case AMDGPU::G_IMPLICIT_DEF: { diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptoui.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptoui.mir new file mode 100644 index 0000000..0f5f268 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptoui.mir @@ -0,0 +1,31 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s +# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s + +--- +name: fptoui_s +legalized: true + +body: | + bb.0: + liveins: $sgpr0 + ; CHECK-LABEL: name: fptoui_s + ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 + ; CHECK: [[FPTOUI:%[0-9]+]]:vgpr(s32) = G_FPTOUI [[COPY]](s32) + %0:_(s32) = COPY $sgpr0 + %1:_(s32) = G_FPTOUI %0 +... + +--- +name: fptoui_v +legalized: true + +body: | + bb.0: + liveins: $vgpr0 + ; CHECK-LABEL: name: fptoui_v + ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 + ; CHECK: [[FPTOUI:%[0-9]+]]:vgpr(s32) = G_FPTOUI [[COPY]](s32) + %0:_(s32) = COPY $vgpr0 + %1:_(s32) = G_FPTOUI %0 +... -- 2.7.4