From b2206e71e1e32a29b6d3509d55b26f066bf26390 Mon Sep 17 00:00:00 2001 From: Akira Hatanaka Date: Fri, 18 Jan 2013 21:58:11 +0000 Subject: [PATCH] [mips] Enable inlining of atomic ops on mips32 and mips64. llvm-svn: 172855 --- clang/lib/Basic/Targets.cpp | 2 ++ clang/test/CodeGen/atomics-inlining.c | 49 +++++++++++++++++++++++++++++++++++ clang/test/CodeGen/ppc-atomics.c | 35 ------------------------- 3 files changed, 51 insertions(+), 35 deletions(-) create mode 100644 clang/test/CodeGen/atomics-inlining.c delete mode 100644 clang/test/CodeGen/ppc-atomics.c diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp index 8e45804..c83165f 100644 --- a/clang/lib/Basic/Targets.cpp +++ b/clang/lib/Basic/Targets.cpp @@ -4130,6 +4130,7 @@ public: MipsTargetInfoBase(triple, "o32", "mips32") { SizeType = UnsignedInt; PtrDiffType = SignedInt; + MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32; } virtual bool setABI(const std::string &Name) { if ((Name == "o32") || (Name == "eabi")) { @@ -4235,6 +4236,7 @@ public: LongDoubleFormat = &llvm::APFloat::IEEEdouble; } SuitableAlign = 128; + MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; } virtual bool setABI(const std::string &Name) { SetDescriptionString(Name); diff --git a/clang/test/CodeGen/atomics-inlining.c b/clang/test/CodeGen/atomics-inlining.c new file mode 100644 index 0000000..9b0d413 --- /dev/null +++ b/clang/test/CodeGen/atomics-inlining.c @@ -0,0 +1,49 @@ +// RUN: %clang_cc1 -triple powerpc-linux-gnu -emit-llvm %s -o - | FileCheck %s -check-prefix=PPC32 +// RUN: %clang_cc1 -triple powerpc64-linux-gnu -emit-llvm %s -o - | FileCheck %s -check-prefix=PPC64 +// RUN: %clang_cc1 -triple mipsel-linux-gnu -emit-llvm %s -o - | FileCheck %s -check-prefix=MIPS32 +// RUN: %clang_cc1 -triple mips64el-linux-gnu -emit-llvm %s -o - | FileCheck %s -check-prefix=MIPS64 + +unsigned char c1, c2; +unsigned short s1, s2; +unsigned int i1, i2; +unsigned long long ll1, ll2; + +enum memory_order { + memory_order_relaxed, + memory_order_consume, + memory_order_acquire, + memory_order_release, + memory_order_acq_rel, + memory_order_seq_cst +}; + +void test1(void) { + (void)__atomic_load(&c1, &c2, memory_order_seq_cst); + (void)__atomic_load(&s1, &s2, memory_order_seq_cst); + (void)__atomic_load(&i1, &i2, memory_order_seq_cst); + (void)__atomic_load(&ll1, &ll2, memory_order_seq_cst); + +// PPC32: define void @test1 +// PPC32: load atomic i8* @c1 seq_cst +// PPC32: load atomic i16* @s1 seq_cst +// PPC32: load atomic i32* @i1 seq_cst +// PPC32: call void @__atomic_load(i32 8, i8* bitcast (i64* @ll1 to i8*) + +// PPC64: define void @test1 +// PPC64: load atomic i8* @c1 seq_cst +// PPC64: load atomic i16* @s1 seq_cst +// PPC64: load atomic i32* @i1 seq_cst +// PPC64: load atomic i64* @ll1 seq_cst + +// MIPS32: define void @test1 +// MIPS32: load atomic i8* @c1 seq_cst +// MIPS32: load atomic i16* @s1 seq_cst +// MIPS32: load atomic i32* @i1 seq_cst +// MIPS32: call void @__atomic_load(i32 8, i8* bitcast (i64* @ll1 to i8*) + +// MIPS64: define void @test1 +// MIPS64: load atomic i8* @c1 seq_cst +// MIPS64: load atomic i16* @s1 seq_cst +// MIPS64: load atomic i32* @i1 seq_cst +// MIPS64: load atomic i64* @ll1 seq_cst +} diff --git a/clang/test/CodeGen/ppc-atomics.c b/clang/test/CodeGen/ppc-atomics.c deleted file mode 100644 index 3fcb0fb..0000000 --- a/clang/test/CodeGen/ppc-atomics.c +++ /dev/null @@ -1,35 +0,0 @@ -// RUN: %clang_cc1 -triple powerpc-linux-gnu -emit-llvm %s -o - | FileCheck %s -check-prefix=32 -// RUN: %clang_cc1 -triple powerpc64-linux-gnu -emit-llvm %s -o - | FileCheck %s -check-prefix=64 - -unsigned char c1, c2; -unsigned short s1, s2; -unsigned int i1, i2; -unsigned long long ll1, ll2; - -enum memory_order { - memory_order_relaxed, - memory_order_consume, - memory_order_acquire, - memory_order_release, - memory_order_acq_rel, - memory_order_seq_cst -}; - -void test1(void) { - (void)__atomic_load(&c1, &c2, memory_order_seq_cst); - (void)__atomic_load(&s1, &s2, memory_order_seq_cst); - (void)__atomic_load(&i1, &i2, memory_order_seq_cst); - (void)__atomic_load(&ll1, &ll2, memory_order_seq_cst); - -// 32: define void @test1 -// 32: load atomic i8* @c1 seq_cst -// 32: load atomic i16* @s1 seq_cst -// 32: load atomic i32* @i1 seq_cst -// 32: call void @__atomic_load(i32 8, i8* bitcast (i64* @ll1 to i8*) - -// 64: define void @test1 -// 64: load atomic i8* @c1 seq_cst -// 64: load atomic i16* @s1 seq_cst -// 64: load atomic i32* @i1 seq_cst -// 64: load atomic i64* @ll1 seq_cst -} -- 2.7.4