From b20d385926d84f7daa8cd7c54f748f3d6a81bfc6 Mon Sep 17 00:00:00 2001 From: Barnaby Wilks Date: Thu, 22 Aug 2019 11:13:23 +0100 Subject: [PATCH] Implement a float16 directive for assembling 16 bit IEEE 754 floating point numbers for the AArch64 assembler. The syntax of the directive is: .float16 <0-n decimal numbers> e.g. .float16 0.5 .float16 10.2, NaN, 452.09 The floats will always be encoded using the binary16 format as described in the IEEE 754-2008 standard. There is no need to support Arm's alternative half-precision format since AArch64 only supports the IEEE format. gas * config/tc-aarch64.c: Add float16 directive and add "Hh" to acceptable float characters. * doc/c-aarch64.texi: Documentation for float16 directive. * testsuite/gas/aarch64/float16-be.d: New test. * testsuite/gas/aarch64/float16-le.d: New test. * testsuite/gas/aarch64/float16.s: New test. * NEWS: Add NEWS entry. --- gas/ChangeLog | 10 ++++++++++ gas/NEWS | 13 +++++++++---- gas/config/tc-aarch64.c | 3 ++- gas/doc/c-aarch64.texi | 8 ++++++++ gas/testsuite/gas/aarch64/float16-be.d | 11 +++++++++++ gas/testsuite/gas/aarch64/float16-le.d | 11 +++++++++++ gas/testsuite/gas/aarch64/float16.s | 19 +++++++++++++++++++ 7 files changed, 70 insertions(+), 5 deletions(-) create mode 100644 gas/testsuite/gas/aarch64/float16-be.d create mode 100644 gas/testsuite/gas/aarch64/float16-le.d create mode 100644 gas/testsuite/gas/aarch64/float16.s diff --git a/gas/ChangeLog b/gas/ChangeLog index 080f2fe..655c8ad 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,13 @@ +2019-08-22 Barnaby Wilks + + * config/tc-aarch64.c: Add float16 directive and add "Hh" to + acceptable float characters. + * doc/c-aarch64.texi: Documentation for float16 directive. + * testsuite/gas/aarch64/float16-be.d: New test. + * testsuite/gas/aarch64/float16-le.d: New test. + * testsuite/gas/aarch64/float16.s: New test. + * NEWS: Add NEWS entry. + 2019-08-22 Kyrylo Tkachov * testsuite/gas/aarch64/sysreg-4.d: Update expected disassembly for diff --git a/gas/NEWS b/gas/NEWS index 45ca34f..2d8415f 100644 --- a/gas/NEWS +++ b/gas/NEWS @@ -3,10 +3,10 @@ * Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE) instructions. -* For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3 LLSC - Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure time option - to set the default behavior. Set the default if the configure option is not used - to "no". +* For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3 + LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure + time option to set the default behavior. Set the default if the configure + option is not used to "no". * Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P processors. @@ -14,6 +14,11 @@ * Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE, Cortex-A76AE, and Cortex-A77 processors. +* Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit + floating point literals. Add .float16_format directive and + -mfp16-format=[ieee|alternative] option for Arm to control the format of the + encoding. + Changes in 2.32: * Add -mvexwig=[0|1] option to x86 assembler to control encoding of diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 136297a..735ecd6 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -529,7 +529,7 @@ const char EXP_CHARS[] = "eE"; /* As in 0f12.456 */ /* or 0d1.2345e12 */ -const char FLT_CHARS[] = "rRsSfFdDxXeEpP"; +const char FLT_CHARS[] = "rRsSfFdDxXeEpPhH"; /* Prefix character that indicates the start of an immediate value. */ #define is_immediate_prefix(C) ((C) == '#') @@ -2106,6 +2106,7 @@ const pseudo_typeS md_pseudo_table[] = { {"dword", s_aarch64_elf_cons, 8}, {"variant_pcs", s_variant_pcs, 0}, #endif + {"float16", float_cons, 'h'}, {0, 0, 0} }; diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index 5c66fa6..2c236e2 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -358,6 +358,14 @@ The @code{.even} directive aligns the output on the next even byte boundary. @c FFFFFFFFFFFFFFFFFFFFFFFFFF + +@cindex @code{.float16} directive, AArch64 +@item .float16 @var{value [,...,value_n]} +Place the half precision floating point representation of one or more +floating-point values into the current section. +The format used to encode the floating point values is always the +IEEE 754-2008 half precision floating point format. + @c GGGGGGGGGGGGGGGGGGGGGGGGGG @c HHHHHHHHHHHHHHHHHHHHHHHHHH @c IIIIIIIIIIIIIIIIIIIIIIIIII diff --git a/gas/testsuite/gas/aarch64/float16-be.d b/gas/testsuite/gas/aarch64/float16-be.d new file mode 100644 index 0000000..f47962f --- /dev/null +++ b/gas/testsuite/gas/aarch64/float16-be.d @@ -0,0 +1,11 @@ +# name: Big endian float16 literals (IEEE 754 format) +# source: float16.s +# objdump: -s --section=.data +# as: -mbig-endian + +.*: +file format .* + +Contents of section \.data: + 0000 4a002fdf 1c197bff 000103ff 04003c00.* + 0010 3c017fff 7c00fc00 00008000 bc00bbe7.* + 0020 fbff4200 4a00603e.* diff --git a/gas/testsuite/gas/aarch64/float16-le.d b/gas/testsuite/gas/aarch64/float16-le.d new file mode 100644 index 0000000..873d967 --- /dev/null +++ b/gas/testsuite/gas/aarch64/float16-le.d @@ -0,0 +1,11 @@ +# name: Little endian float16 literals (IEEE 754 format) +# source: float16.s +# objdump: -s --section=.data +# as: -mlittle-endian + +.*: +file format .* + +Contents of section \.data: + 0000 004adf2f 191cff7b 0100ff03 0004003c.* + 0010 013cff7f 007c00fc 00000080 00bce7bb.* + 0020 fffb0042 004a3e60.* diff --git a/gas/testsuite/gas/aarch64/float16.s b/gas/testsuite/gas/aarch64/float16.s new file mode 100644 index 0000000..d2cf6b5 --- /dev/null +++ b/gas/testsuite/gas/aarch64/float16.s @@ -0,0 +1,19 @@ +.data + .float16 12.0 + .float16 0.123 + .float16 0.004 + .float16 65504 + .float16 5.9605e-8 + .float16 6.0976e-5 + .float16 6.1035e-5 + .float16 1 + .float16 1.001 + .float16 NaN + .float16 +Inf + .float16 -Inf + .float16 +0 + .float16 -0 + .float16 -1 + .float16 -0.98765 + .float16 -65504 + .float16 3.0, 12.0, 543.123 -- 2.7.4