From b1dffe82afffdf224aa244483465c7280fc1828f Mon Sep 17 00:00:00 2001 From: Fei Peng Date: Thu, 13 Dec 2018 09:00:16 -0800 Subject: [PATCH] Fix hardware intrinsc API XML comments (dotnet/coreclr#21515) * Fix AVX2 and SSE2 XML comments * Fix ARM intrinsic XML comments Commit migrated from https://github.com/dotnet/coreclr/commit/fdef855fa1df3540ba632bfae850279d627bde66 --- .../Arm/Arm64/Aes.PlatformNotSupported.cs | 8 ++--- .../src/System/Runtime/Intrinsics/Arm/Arm64/Aes.cs | 16 ++++----- .../Arm/Arm64/Sha1.PlatformNotSupported.cs | 12 +++---- .../System/Runtime/Intrinsics/Arm/Arm64/Sha1.cs | 24 +++++++------- .../Arm/Arm64/Sha256.PlatformNotSupported.cs | 8 ++--- .../System/Runtime/Intrinsics/Arm/Arm64/Sha256.cs | 16 ++++----- .../System/Runtime/Intrinsics/Arm/Arm64/Simd.cs | 38 +++++++++++----------- .../Intrinsics/X86/Avx2.PlatformNotSupported.cs | 2 +- .../Intrinsics/X86/Sse2.PlatformNotSupported.cs | 2 +- 9 files changed, 63 insertions(+), 63 deletions(-) diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Aes.PlatformNotSupported.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Aes.PlatformNotSupported.cs index ed73e7e..7451b4b 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Aes.PlatformNotSupported.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Aes.PlatformNotSupported.cs @@ -16,25 +16,25 @@ namespace System.Runtime.Intrinsics.Arm.Arm64 /// /// Performs AES single round decryption /// vaesdq_u8 (uint8x16_t data, uint8x16_t key) - /// + /// public static Vector128 Decrypt(Vector128 value, Vector128 roundKey) { throw new PlatformNotSupportedException(); } /// /// Performs AES single round encryption /// vaeseq_u8 (uint8x16_t data, uint8x16_t key) - /// + /// public static Vector128 Encrypt(Vector128 value, Vector128 roundKey) { throw new PlatformNotSupportedException(); } /// /// Performs AES Mix Columns /// vaesmcq_u8 (uint8x16_t data) - /// + /// public static Vector128 MixColumns(Vector128 value) { throw new PlatformNotSupportedException(); } /// /// Performs AES inverse mix columns /// vaesimcq_u8 (uint8x16_t data) - /// + /// public static Vector128 InverseMixColumns(Vector128 value) { throw new PlatformNotSupportedException(); } } } diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Aes.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Aes.cs index 24c9342..8a04478 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Aes.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Aes.cs @@ -13,28 +13,28 @@ namespace System.Runtime.Intrinsics.Arm.Arm64 public static class Aes { public static bool IsSupported { get => IsSupported; } - // + /// /// Performs AES single round decryption /// vaesdq_u8 (uint8x16_t data, uint8x16_t key) - /// + /// public static Vector128 Decrypt(Vector128 value, Vector128 roundKey) => Decrypt(value, roundKey); - // + /// /// Performs AES single round encryption /// vaeseq_u8 (uint8x16_t data, uint8x16_t key) - /// + /// public static Vector128 Encrypt(Vector128 value, Vector128 roundKey) => Encrypt(value, roundKey); - // + /// /// Performs AES Mix Columns /// vaesmcq_u8 (uint8x16_t data) - /// + /// public static Vector128 MixColumns(Vector128 value) => MixColumns(value); - // + /// /// Performs AES inverse mix columns /// vaesimcq_u8 (uint8x16_t data) - /// + /// public static Vector128 InverseMixColumns(Vector128 value) => InverseMixColumns(value); } } diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Sha1.PlatformNotSupported.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Sha1.PlatformNotSupported.cs index f44d281..ece7e44 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Sha1.PlatformNotSupported.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Sha1.PlatformNotSupported.cs @@ -18,37 +18,37 @@ namespace System.Runtime.Intrinsics.Arm.Arm64 /// /// Performs SHA1 hash update choose form. /// vsha1cq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) - /// + /// public static Vector128 HashChoose(Vector128 hash_abcd, uint hash_e, Vector128wk) { throw new PlatformNotSupportedException(); } /// /// Performs SHA1 hash update majority form. /// vsha1mq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) - /// + /// public static Vector128 HashMajority(Vector128 hash_abcd, uint hash_e, Vector128wk) { throw new PlatformNotSupportedException(); } /// /// Performs SHA1 hash update parity form. /// vsha1pq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) - /// + /// public static Vector128 HashParity(Vector128 hash_abcd, uint hash_e, Vector128wk) { throw new PlatformNotSupportedException(); } /// /// Performs SHA1 fixed rotate /// vsha1h_u32 (uint32_t hash_e) - /// + /// public static uint FixedRotate(uint hash_e) { throw new PlatformNotSupportedException(); } /// /// Performs SHA1 schedule update 0 /// vsha1su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7, uint32x4_t w8_11) - /// + /// public static Vector128 SchedulePart1(Vector128 w0_3, Vector128 w4_7, Vector128 w8_11) { throw new PlatformNotSupportedException(); } /// /// Performs SHA1 schedule update 1 /// vsha1su1q_u32 (uint32x4_t tw0_3, uint32x4_t w12_15) - /// + /// public static Vector128 SchedulePart2(Vector128 tw0_3, Vector128 w12_15) { throw new PlatformNotSupportedException(); } } } diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Sha1.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Sha1.cs index 28cc397..fe90478 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Sha1.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Sha1.cs @@ -14,40 +14,40 @@ namespace System.Runtime.Intrinsics.Arm.Arm64 { public static bool IsSupported { get => IsSupported; } - // + /// /// Performs SHA1 hash update choose form. /// vsha1cq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) - /// + /// public static Vector128 HashChoose(Vector128 hash_abcd, uint hash_e, Vector128wk) => HashChoose(hash_abcd, hash_e, wk); - // + /// /// Performs SHA1 hash update majority form. /// vsha1mq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) - /// + /// public static Vector128 HashMajority(Vector128 hash_abcd, uint hash_e, Vector128wk) => HashMajority(hash_abcd, hash_e, wk); - // + /// /// Performs SHA1 hash update parity form. /// vsha1pq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) - /// + /// public static Vector128 HashParity(Vector128 hash_abcd, uint hash_e, Vector128wk) => HashParity(hash_abcd, hash_e, wk); - // + /// /// Performs SHA1 fixed rotate /// vsha1h_u32 (uint32_t hash_e) - /// + /// public static uint FixedRotate(uint hash_e) => FixedRotate(hash_e); - // + /// /// Performs SHA1 schedule update 0 /// vsha1su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7, uint32x4_t w8_11) - /// + /// public static Vector128 SchedulePart1(Vector128 w0_3, Vector128 w4_7, Vector128 w8_11) => SchedulePart1(w0_3, w4_7, w8_11); - // + /// /// Performs SHA1 schedule update 1 /// vsha1su1q_u32 (uint32x4_t tw0_3, uint32x4_t w12_15) - /// + /// public static Vector128 SchedulePart2(Vector128 tw0_3, Vector128 w12_15) => SchedulePart2(tw0_3, w12_15); } } diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Sha256.PlatformNotSupported.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Sha256.PlatformNotSupported.cs index 5aee77e..89d5f72 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Sha256.PlatformNotSupported.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Sha256.PlatformNotSupported.cs @@ -17,25 +17,25 @@ namespace System.Runtime.Intrinsics.Arm.Arm64 /// /// Performs SHA256 hash update (part 1). /// vsha256hq_u32 (uint32x4_t hash_abcd, uint32x4_t hash_efgh, uint32x4_t wk) - /// + /// public static Vector128 HashLower(Vector128 hash_abcd, Vector128 hash_efgh, Vector128 wk) { throw new PlatformNotSupportedException(); } /// /// Performs SHA256 hash update (part 2). /// vsha256h2q_u32 (uint32x4_t hash_efgh, uint32x4_t hash_abcd, uint32x4_t wk) - /// + /// public static Vector128 HashUpper(Vector128 hash_efgh, Vector128 hash_abcd, Vector128 wk) { throw new PlatformNotSupportedException(); } /// /// Performs SHA256 schedule update 0 /// vsha256su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7) - /// + /// public static Vector128 SchedulePart1(Vector128 w0_3, Vector128 w4_7) { throw new PlatformNotSupportedException(); } /// /// Performs SHA256 schedule update 1 /// vsha256su1q_u32 (uint32x4_t w0_3, uint32x4_t w8_11, uint32x4_t w12_15) - /// + /// public static Vector128 SchedulePart2(Vector128 w0_3, Vector128 w8_11, Vector128 w12_15) { throw new PlatformNotSupportedException(); } } } diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Sha256.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Sha256.cs index 4e7e51d..bebacbc 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Sha256.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Sha256.cs @@ -14,28 +14,28 @@ namespace System.Runtime.Intrinsics.Arm.Arm64 { public static bool IsSupported { get => IsSupported; } - // + /// /// Performs SHA256 hash update (part 1). /// vsha256hq_u32 (uint32x4_t hash_abcd, uint32x4_t hash_efgh, uint32x4_t wk) - /// + /// public static Vector128 HashLower(Vector128 hash_abcd, Vector128 hash_efgh, Vector128 wk) => HashLower(hash_abcd, hash_efgh, wk); - // + /// /// Performs SHA256 hash update (part 2). /// vsha256h2q_u32 (uint32x4_t hash_efgh, uint32x4_t hash_abcd, uint32x4_t wk) - /// + /// public static Vector128 HashUpper(Vector128 hash_efgh, Vector128 hash_abcd, Vector128 wk) => HashUpper(hash_efgh, hash_abcd, wk); - // + /// /// Performs SHA256 schedule update 0 /// vsha256su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7) - /// + /// public static Vector128 SchedulePart1(Vector128 w0_3, Vector128 w4_7) => SchedulePart1(w0_3, w4_7); - // + /// /// Performs SHA256 schedule update 1 /// vsha256su1q_u32 (uint32x4_t tw0_3, uint32x4_t w8_11, uint32x4_t w12_15) - /// + /// public static Vector128 SchedulePart2(Vector128 w0_3, Vector128 w8_11, Vector128 w12_15) => SchedulePart2(w0_3, w8_11, w12_15); } } diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Simd.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Simd.cs index f162483..c10c3ff 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Simd.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Simd.cs @@ -21,7 +21,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64 /// /// Vector abs - /// Corresponds to vector forms of ARM64 ABS & FABS + /// Corresponds to vector forms of ARM64 ABS & FABS /// public static Vector64 Abs(Vector64 value) => Abs(value); public static Vector64 Abs(Vector64 value) => Abs(value); @@ -36,7 +36,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64 /// /// Vector add - /// Corresponds to vector forms of ARM64 ADD & FADD + /// Corresponds to vector forms of ARM64 ADD & FADD /// public static Vector64 Add(Vector64 left, Vector64 right) where T : struct => Add(left, right); public static Vector128 Add(Vector128 left, Vector128 right) where T : struct => Add(left, right); @@ -58,7 +58,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64 /// /// Vector BitwiseSelect /// For each bit in the vector result[bit] = sel[bit] ? left[bit] : right[bit] - /// Corresponds to vector forms of ARM64 BSL (Also BIF & BIT) + /// Corresponds to vector forms of ARM64 BSL (Also BIF & BIT) /// public static Vector64 BitwiseSelect(Vector64 sel, Vector64 left, Vector64 right) where T : struct => BitwiseSelect(sel, left, right); public static Vector128 BitwiseSelect(Vector128 sel, Vector128 left, Vector128 right) where T : struct => BitwiseSelect(sel, left, right); @@ -66,7 +66,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64 /// /// Vector CompareEqual /// For each element result[elem] = (left[elem] == right[elem]) ? ~0 : 0 - /// Corresponds to vector forms of ARM64 CMEQ & FCMEQ + /// Corresponds to vector forms of ARM64 CMEQ & FCMEQ /// public static Vector64 CompareEqual(Vector64 left, Vector64 right) where T : struct => CompareEqual(left, right); public static Vector128 CompareEqual(Vector128 left, Vector128 right) where T : struct => CompareEqual(left, right); @@ -74,7 +74,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64 /// /// Vector CompareEqualZero /// For each element result[elem] = (left[elem] == 0) ? ~0 : 0 - /// Corresponds to vector forms of ARM64 CMEQ & FCMEQ + /// Corresponds to vector forms of ARM64 CMEQ & FCMEQ /// public static Vector64 CompareEqualZero(Vector64 value) where T : struct => CompareEqualZero(value); public static Vector128 CompareEqualZero(Vector128 value) where T : struct => CompareEqualZero(value); @@ -82,7 +82,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64 /// /// Vector CompareGreaterThan /// For each element result[elem] = (left[elem] > right[elem]) ? ~0 : 0 - /// Corresponds to vector forms of ARM64 CMGT/CMHI & FCMGT + /// Corresponds to vector forms of ARM64 CMGT/CMHI & FCMGT /// public static Vector64 CompareGreaterThan(Vector64 left, Vector64 right) where T : struct => CompareGreaterThan(left, right); public static Vector128 CompareGreaterThan(Vector128 left, Vector128 right) where T : struct => CompareGreaterThan(left, right); @@ -90,7 +90,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64 /// /// Vector CompareGreaterThanZero /// For each element result[elem] = (left[elem] > 0) ? ~0 : 0 - /// Corresponds to vector forms of ARM64 CMGT & FCMGT + /// Corresponds to vector forms of ARM64 CMGT & FCMGT /// public static Vector64 CompareGreaterThanZero(Vector64 value) where T : struct => CompareGreaterThanZero(value); public static Vector128 CompareGreaterThanZero(Vector128 value) where T : struct => CompareGreaterThanZero(value); @@ -98,7 +98,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64 /// /// Vector CompareGreaterThanOrEqual /// For each element result[elem] = (left[elem] >= right[elem]) ? ~0 : 0 - /// Corresponds to vector forms of ARM64 CMGE/CMHS & FCMGE + /// Corresponds to vector forms of ARM64 CMGE/CMHS & FCMGE /// public static Vector64 CompareGreaterThanOrEqual(Vector64 left, Vector64 right) where T : struct => CompareGreaterThanOrEqual(left, right); public static Vector128 CompareGreaterThanOrEqual(Vector128 left, Vector128 right) where T : struct => CompareGreaterThanOrEqual(left, right); @@ -106,30 +106,30 @@ namespace System.Runtime.Intrinsics.Arm.Arm64 /// /// Vector CompareGreaterThanOrEqualZero /// For each element result[elem] = (left[elem] >= 0) ? ~0 : 0 - /// Corresponds to vector forms of ARM64 CMGE & FCMGE + /// Corresponds to vector forms of ARM64 CMGE & FCMGE /// public static Vector64 CompareGreaterThanOrEqualZero(Vector64 value) where T : struct => CompareGreaterThanOrEqualZero(value); public static Vector128 CompareGreaterThanOrEqualZero(Vector128 value) where T : struct => CompareGreaterThanOrEqualZero(value); /// /// Vector CompareLessThanZero - /// For each element result[elem] = (left[elem] < 0) ? ~0 : 0 - /// Corresponds to vector forms of ARM64 CMGT & FCMGT + /// For each element result[elem] = (left[elem] < 0) ? ~0 : 0 + /// Corresponds to vector forms of ARM64 CMGT & FCMGT /// public static Vector64 CompareLessThanZero(Vector64 value) where T : struct => CompareLessThanZero(value); public static Vector128 CompareLessThanZero(Vector128 value) where T : struct => CompareLessThanZero(value); /// /// Vector CompareLessThanOrEqualZero - /// For each element result[elem] = (left[elem] < 0) ? ~0 : 0 - /// Corresponds to vector forms of ARM64 CMGT & FCMGT + /// For each element result[elem] = (left[elem] < 0) ? ~0 : 0 + /// Corresponds to vector forms of ARM64 CMGT & FCMGT /// public static Vector64 CompareLessThanOrEqualZero(Vector64 value) where T : struct => CompareLessThanOrEqualZero(value); public static Vector128 CompareLessThanOrEqualZero(Vector128 value) where T : struct => CompareLessThanOrEqualZero(value); /// /// Vector CompareTest - /// For each element result[elem] = (left[elem] & right[elem]) ? ~0 : 0 + /// For each element result[elem] = (left[elem] & right[elem]) ? ~0 : 0 /// Corresponds to vector forms of ARM64 CMTST /// public static Vector64 CompareTest(Vector64 left, Vector64 right) where T : struct => CompareTest(left, right); @@ -202,7 +202,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64 /// /// Vector max - /// Corresponds to vector forms of ARM64 SMAX, UMAX & FMAX + /// Corresponds to vector forms of ARM64 SMAX, UMAX & FMAX /// public static Vector64 Max(Vector64 left, Vector64 right) => Max(left, right); public static Vector64 Max(Vector64 left, Vector64 right) => Max(left, right); @@ -222,7 +222,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64 /// /// Vector min - /// Corresponds to vector forms of ARM64 SMIN, UMIN & FMIN + /// Corresponds to vector forms of ARM64 SMIN, UMIN & FMIN /// public static Vector64 Min(Vector64 left, Vector64 right) => Min(left, right); public static Vector64 Min(Vector64 left, Vector64 right) => Min(left, right); @@ -247,7 +247,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64 /// /// For each element result[elem] = left[elem] * right[elem] /// - /// Corresponds to vector forms of ARM64 MUL & FMUL + /// Corresponds to vector forms of ARM64 MUL & FMUL /// public static Vector64 Multiply(Vector64 left, Vector64 right) => Multiply(left, right); public static Vector64 Multiply(Vector64 left, Vector64 right) => Multiply(left, right); @@ -267,7 +267,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64 /// /// Vector negate - /// Corresponds to vector forms of ARM64 NEG & FNEG + /// Corresponds to vector forms of ARM64 NEG & FNEG /// public static Vector64 Negate(Vector64 value) => Negate(value); public static Vector64 Negate(Vector64 value) => Negate(value); @@ -328,7 +328,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64 /// /// Vector subtract - /// Corresponds to vector forms of ARM64 SUB & FSUB + /// Corresponds to vector forms of ARM64 SUB & FSUB /// public static Vector64 Subtract(Vector64 left, Vector64 right) where T : struct => Subtract(left, right); public static Vector128 Subtract(Vector128 left, Vector128 right) where T : struct => Subtract(left, right); diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/X86/Avx2.PlatformNotSupported.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/X86/Avx2.PlatformNotSupported.cs index e723d13..6f444bb 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/X86/Avx2.PlatformNotSupported.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/X86/Avx2.PlatformNotSupported.cs @@ -736,7 +736,7 @@ namespace System.Runtime.Intrinsics.X86 /// VEXTRACTI128 xmm, ymm, imm8 /// public new static Vector128 ExtractVector128(Vector256 value, byte index) { throw new PlatformNotSupportedException(); } - // + /// /// __m128i _mm256_extracti128_si256 (__m256i a, const int imm8) /// VEXTRACTI128 m128, ymm, imm8 /// diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/X86/Sse2.PlatformNotSupported.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/X86/Sse2.PlatformNotSupported.cs index eb0a081..70290b3 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/X86/Sse2.PlatformNotSupported.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/X86/Sse2.PlatformNotSupported.cs @@ -1556,7 +1556,7 @@ namespace System.Runtime.Intrinsics.X86 /// /// __m128i _mm_unpackhi_epi16 (__m128i a, __m128i b) /// PUNPCKHWD xmm, xmm/m128 - /// public static Vector128 UnpackHigh(Vector128 left, Vector128 right) { throw new PlatformNotSupportedException(); } /// /// __m128i _mm_unpackhi_epi32 (__m128i a, __m128i b) -- 2.7.4