From b054aadfb0030b9717bb22f4283bfe5aec13440b Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 4 Jul 2013 11:01:34 +1000 Subject: [PATCH] drm/nvf0/gr: magic sequence that makes PGRAPH come out of hiding Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/core/engine/device/nve0.c | 2 - drivers/gpu/drm/nouveau/core/engine/graph/nvf0.c | 50 ++++++++++++++++++++++- 2 files changed, 48 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/nouveau/core/engine/device/nve0.c b/drivers/gpu/drm/nouveau/core/engine/device/nve0.c index 9077912..7aca187 100644 --- a/drivers/gpu/drm/nouveau/core/engine/device/nve0.c +++ b/drivers/gpu/drm/nouveau/core/engine/device/nve0.c @@ -164,10 +164,8 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = &nve0_fifo_oclass; -#if 0 device->oclass[NVDEV_ENGINE_SW ] = &nvc0_software_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvf0_graph_oclass; -#endif device->oclass[NVDEV_ENGINE_DISP ] = &nvf0_disp_oclass; device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass; device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass; diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvf0.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvf0.c index 1d6ebd0..d7dff11 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nvf0.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvf0.c @@ -25,6 +25,15 @@ #include "nvc0.h" /******************************************************************************* + * Graphics object classes + ******************************************************************************/ + +static struct nouveau_oclass +nvf0_graph_sclass[] = { + {} +}; + +/******************************************************************************* * PGRAPH engine/subdev functions ******************************************************************************/ @@ -142,6 +151,43 @@ nvf0_graph_init_tpc[] = { {} }; +static int +nvf0_graph_fini(struct nouveau_object *object, bool suspend) +{ + struct nvc0_graph_priv *priv = (void *)object; + static const struct { + u32 addr; + u32 data; + } magic[] = { + { 0x020520, 0xfffffffc }, + { 0x020524, 0xfffffffe }, + { 0x020524, 0xfffffffc }, + { 0x020524, 0xfffffff8 }, + { 0x020524, 0xffffffe0 }, + { 0x020530, 0xfffffffe }, + { 0x02052c, 0xfffffffa }, + { 0x02052c, 0xfffffff0 }, + { 0x02052c, 0xffffffc0 }, + { 0x02052c, 0xffffff00 }, + { 0x02052c, 0xfffffc00 }, + { 0x02052c, 0xfffcfc00 }, + { 0x02052c, 0xfff0fc00 }, + { 0x02052c, 0xff80fc00 }, + { 0x020528, 0xfffffffe }, + { 0x020528, 0xfffffffc }, + }; + int i; + + nv_mask(priv, 0x000200, 0x08001000, 0x00000000); + nv_mask(priv, 0x0206b4, 0x00000000, 0x00000000); + for (i = 0; i < ARRAY_SIZE(magic); i++) { + nv_wr32(priv, magic[i].addr, magic[i].data); + nv_wait(priv, magic[i].addr, 0x80000000, 0x00000000); + } + + return nouveau_graph_fini(&priv->base, suspend); +} + static struct nvc0_graph_init * nvf0_graph_init_mmio[] = { nve4_graph_init_regs, @@ -168,9 +214,9 @@ nvf0_graph_oclass = &(struct nvc0_graph_oclass) { .ctor = nvc0_graph_ctor, .dtor = nvc0_graph_dtor, .init = nve4_graph_init, - .fini = _nouveau_graph_fini, + .fini = nvf0_graph_fini, }, .cclass = &nvf0_grctx_oclass, - .sclass = NULL, + .sclass = nvf0_graph_sclass, .mmio = nvf0_graph_init_mmio, }.base; -- 2.7.4