From b051a19aa02dddb554d913941868a9dd0837d554 Mon Sep 17 00:00:00 2001 From: Simon Atanasyan Date: Fri, 11 Oct 2019 12:33:12 +0000 Subject: [PATCH] [mips] Fix loading "double" immediate into a GPR and FPR If a "double" (64-bit) value has zero low 32-bits, it's possible to load such value into a GP/FP registers as an instruction immediate. But now assembler loads only high 32-bits of the value. For example, if a target register is GPR the `li.d $4, 1.0` instruction converts into the `lui $4, 16368` one. As a result, we get `0x3FF00000` in the register. While a correct representation of the `1.0` value is `0x3FF0000000000000`. The patch fixes that. Differential Revision: https://reviews.llvm.org/D68776 llvm-svn: 374544 --- llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 20 +++++++++----- llvm/test/MC/Mips/macro-li.d.s | 34 +++++++++++++++--------- 2 files changed, 36 insertions(+), 18 deletions(-) diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index 8d567d4..51bcf79 100644 --- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -3403,8 +3403,8 @@ bool MipsAsmParser::expandLoadDoubleImmToGPR(MCInst &Inst, SMLoc IDLoc, if (LoImmOp64 == 0) { if (isABI_N32() || isABI_N64()) { - if (loadImmediate(HiImmOp64, FirstReg, Mips::NoRegister, false, true, - IDLoc, Out, STI)) + if (loadImmediate(ImmOp64, FirstReg, Mips::NoRegister, false, true, IDLoc, + Out, STI)) return true; } else { if (loadImmediate(HiImmOp64, FirstReg, Mips::NoRegister, true, true, @@ -3477,12 +3477,20 @@ bool MipsAsmParser::expandLoadDoubleImmToFPR(MCInst &Inst, bool Is64FPU, !((HiImmOp64 & 0xffff0000) && (HiImmOp64 & 0x0000ffff))) { // FIXME: In the case where the constant is zero, we can load the // register directly from the zero register. - if (loadImmediate(HiImmOp64, TmpReg, Mips::NoRegister, true, true, IDLoc, + + if (isABI_N32() || isABI_N64()) { + if (loadImmediate(ImmOp64, TmpReg, Mips::NoRegister, false, false, IDLoc, + Out, STI)) + return true; + TOut.emitRR(Mips::DMTC1, FirstReg, TmpReg, IDLoc, STI); + return false; + } + + if (loadImmediate(HiImmOp64, TmpReg, Mips::NoRegister, true, false, IDLoc, Out, STI)) return true; - if (isABI_N32() || isABI_N64()) - TOut.emitRR(Mips::DMTC1, FirstReg, TmpReg, IDLoc, STI); - else if (hasMips32r2()) { + + if (hasMips32r2()) { TOut.emitRR(Mips::MTC1, FirstReg, Mips::ZERO, IDLoc, STI); TOut.emitRRR(Mips::MTHC1_D32, FirstReg, FirstReg, TmpReg, IDLoc, STI); } else { diff --git a/llvm/test/MC/Mips/macro-li.d.s b/llvm/test/MC/Mips/macro-li.d.s index e54b69e..206198e 100644 --- a/llvm/test/MC/Mips/macro-li.d.s +++ b/llvm/test/MC/Mips/macro-li.d.s @@ -49,12 +49,16 @@ li.d $4, 1.12345 # N32-N64: ld $4, 0($1) # encoding: [0x00,0x00,0x24,0xdc] li.d $4, 1 -# ALL: lui $4, 16368 # encoding: [0xf0,0x3f,0x04,0x3c] -# O32: addiu $5, $zero, 0 # encoding: [0x00,0x00,0x05,0x24] +# O32: lui $4, 16368 # encoding: [0xf0,0x3f,0x04,0x3c] +# O32: addiu $5, $zero, 0 # encoding: [0x00,0x00,0x05,0x24] +# N32-N64: ori $4, $zero, 65472 # encoding: [0xc0,0xff,0x04,0x34] +# N32-N64: dsll $4, $4, 46 # encoding: [0xbc,0x23,0x04,0x00] li.d $4, 1.0 -# ALL: lui $4, 16368 # encoding: [0xf0,0x3f,0x04,0x3c] -# O32: addiu $5, $zero, 0 # encoding: [0x00,0x00,0x05,0x24] +# O32: lui $4, 16368 # encoding: [0xf0,0x3f,0x04,0x3c] +# O32: addiu $5, $zero, 0 # encoding: [0x00,0x00,0x05,0x24] +# N32-N64: ori $4, $zero, 65472 # encoding: [0xc0,0xff,0x04,0x34] +# N32-N64: dsll $4, $4, 46 # encoding: [0xbc,0x23,0x04,0x00] li.d $4, 12345678910 # ALL: .section .rodata,"a",@progbits @@ -153,8 +157,10 @@ li.d $4, 0.4 # N32-N64: ld $4, 0($1) # encoding: [0x00,0x00,0x24,0xdc] li.d $4, 1.5 -# ALL: lui $4, 16376 # encoding: [0xf8,0x3f,0x04,0x3c] -# O32: addiu $5, $zero, 0 # encoding: [0x00,0x00,0x05,0x24] +# O32: lui $4, 16376 # encoding: [0xf8,0x3f,0x04,0x3c] +# O32: addiu $5, $zero, 0 # encoding: [0x00,0x00,0x05,0x24] +# N32-N64: ori $4, $zero, 65504 # encoding: [0xe0,0xff,0x04,0x34] +# N32-N64: dsll $4, $4, 46 # encoding: [0xbc,0x23,0x04,0x00] li.d $4, 12345678910.12345678910 # ALL: .section .rodata,"a",@progbits @@ -228,7 +234,7 @@ li.d $f4, 0 # CHECK-MIPS32r2: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24] # CHECK-MIPS32r2: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44] # CHECK-MIPS32r2: mthc1 $1, $f4 # encoding: [0x00,0x20,0xe1,0x44] -# N32-N64: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24] +# N32-N64: daddiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x64] # N32-N64: dmtc1 $1, $f4 # encoding: [0x00,0x20,0xa1,0x44] li.d $f4, 0.0 @@ -238,7 +244,7 @@ li.d $f4, 0.0 # CHECK-MIPS32r2: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24] # CHECK-MIPS32r2: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44] # CHECK-MIPS32r2: mthc1 $1, $f4 # encoding: [0x00,0x20,0xe1,0x44] -# N32-N64: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24] +# N32-N64: daddiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x64] # N32-N64: dmtc1 $1, $f4 # encoding: [0x00,0x20,0xa1,0x44] li.d $f4, 1.12345 @@ -271,7 +277,8 @@ li.d $f4, 1 # CHECK-MIPS32r2: lui $1, 16368 # encoding: [0xf0,0x3f,0x01,0x3c] # CHECK-MIPS32r2: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44] # CHECK-MIPS32r2: mthc1 $1, $f4 # encoding: [0x00,0x20,0xe1,0x44] -# N32-N64: lui $1, 16368 # encoding: [0xf0,0x3f,0x01,0x3c] +# N32-N64: ori $1, $zero, 65472 # encoding: [0xc0,0xff,0x01,0x34] +# N32-N64: dsll $1, $1, 46 # encoding: [0xbc,0x0b,0x01,0x00] # N32-N64: dmtc1 $1, $f4 # encoding: [0x00,0x20,0xa1,0x44] li.d $f4, 1.0 @@ -281,7 +288,8 @@ li.d $f4, 1.0 # CHECK-MIPS32r2: lui $1, 16368 # encoding: [0xf0,0x3f,0x01,0x3c] # CHECK-MIPS32r2: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44] # CHECK-MIPS32r2: mthc1 $1, $f4 # encoding: [0x00,0x20,0xe1,0x44] -# N32-N64: lui $1, 16368 # encoding: [0xf0,0x3f,0x01,0x3c] +# N32-N64: ori $1, $zero, 65472 # encoding: [0xc0,0xff,0x01,0x34] +# N32-N64: dsll $1, $1, 46 # encoding: [0xbc,0x0b,0x01,0x00] # N32-N64: dmtc1 $1, $f4 # encoding: [0x00,0x20,0xa1,0x44] li.d $f4, 12345678910 @@ -360,7 +368,8 @@ li.d $f4, 1.5 # CHECK-MIPS32r2: lui $1, 16376 # encoding: [0xf8,0x3f,0x01,0x3c] # CHECK-MIPS32r2: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44] # CHECK-MIPS32r2: mthc1 $1, $f4 # encoding: [0x00,0x20,0xe1,0x44] -# N32-N64: lui $1, 16376 # encoding: [0xf8,0x3f,0x01,0x3c] +# N32-N64: ori $1, $zero, 65504 # encoding: [0xe0,0xff,0x01,0x34] +# N32-N64: dsll $1, $1, 46 # encoding: [0xbc,0x0b,0x01,0x00] # N32-N64: dmtc1 $1, $f4 # encoding: [0x00,0x20,0xa1,0x44] li.d $f4, 2.5 @@ -370,7 +379,8 @@ li.d $f4, 2.5 # CHECK-MIPS32r2: lui $1, 16388 # encoding: [0x04,0x40,0x01,0x3c] # CHECK-MIPS32r2: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44] # CHECK-MIPS32r2: mthc1 $1, $f4 # encoding: [0x00,0x20,0xe1,0x44] -# N32-N64: lui $1, 16388 # encoding: [0x04,0x40,0x01,0x3c] +# N32-N64: ori $1, $zero, 32776 # encoding: [0x08,0x80,0x01,0x34] +# N32-N64: dsll $1, $1, 47 # encoding: [0xfc,0x0b,0x01,0x00] # N32-N64: dmtc1 $1, $f4 # encoding: [0x00,0x20,0xa1,0x44] li.d $f4, 2.515625 -- 2.7.4