From aff679a48c438924c4fca4e9eaa38f91c022ffe3 Mon Sep 17 00:00:00 2001 From: Thomas Lively Date: Wed, 8 Jun 2022 10:32:10 -0700 Subject: [PATCH] [WebAssembly] Implement remaining relaxed SIMD instructions Add codegen, intrinsics, and builtins for the i16x8.relaxed_q15mulr_s, i16x8.dot_i8x16_i7x16_s, and i32x4.dot_i8x16_i7x16_add_s instructions. These are the last instructions from the relaxed SIMD proposal[1] that had not been implemented. [1]: https://github.com/WebAssembly/relaxed-simd/blob/main/proposals/relaxed-simd/Overview.md. Differential Revision: https://reviews.llvm.org/D127170 --- clang/include/clang/Basic/BuiltinsWebAssembly.def | 5 +++ clang/lib/CodeGen/CGBuiltin.cpp | 20 ++++++++++++ clang/test/CodeGen/builtins-wasm.c | 21 ++++++++++++ llvm/include/llvm/IR/IntrinsicsWebAssembly.td | 14 ++++++++ .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 28 +++++++++++++++- llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll | 38 ++++++++++++++++++++++ llvm/test/MC/WebAssembly/simd-encodings.s | 11 +++++-- 7 files changed, 133 insertions(+), 4 deletions(-) diff --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def b/clang/include/clang/Basic/BuiltinsWebAssembly.def index 24fb24f..03c6162 100644 --- a/clang/include/clang/Basic/BuiltinsWebAssembly.def +++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def @@ -184,5 +184,10 @@ TARGET_BUILTIN(__builtin_wasm_relaxed_trunc_u_i32x4_f32x4, "V4UiV4f", "nc", "rel TARGET_BUILTIN(__builtin_wasm_relaxed_trunc_s_zero_i32x4_f64x2, "V4iV2d", "nc", "relaxed-simd") TARGET_BUILTIN(__builtin_wasm_relaxed_trunc_u_zero_i32x4_f64x2, "V4UiV2d", "nc", "relaxed-simd") +TARGET_BUILTIN(__builtin_wasm_relaxed_q15mulr_s_i16x8, "V8sV8sV8s", "nc", "relaxed-simd") + +TARGET_BUILTIN(__builtin_wasm_dot_i8x16_i7x16_s_i16x8, "V8sV16ScV16Sc", "nc", "relaxed-simd") +TARGET_BUILTIN(__builtin_wasm_dot_i8x16_i7x16_add_s_i32x4, "V4iV16ScV16ScV4i", "nc", "relaxed-simd") + #undef BUILTIN #undef TARGET_BUILTIN diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index 1c10d32..9d2e6df 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -18684,6 +18684,26 @@ Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID, Function *Callee = CGM.getIntrinsic(IntNo); return Builder.CreateCall(Callee, {Vec}); } + case WebAssembly::BI__builtin_wasm_relaxed_q15mulr_s_i16x8: { + Value *LHS = EmitScalarExpr(E->getArg(0)); + Value *RHS = EmitScalarExpr(E->getArg(1)); + Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_relaxed_q15mulr_signed); + return Builder.CreateCall(Callee, {LHS, RHS}); + } + case WebAssembly::BI__builtin_wasm_dot_i8x16_i7x16_s_i16x8: { + Value *LHS = EmitScalarExpr(E->getArg(0)); + Value *RHS = EmitScalarExpr(E->getArg(1)); + Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_dot_i8x16_i7x16_signed); + return Builder.CreateCall(Callee, {LHS, RHS}); + } + case WebAssembly::BI__builtin_wasm_dot_i8x16_i7x16_add_s_i32x4: { + Value *LHS = EmitScalarExpr(E->getArg(0)); + Value *RHS = EmitScalarExpr(E->getArg(1)); + Value *Acc = EmitScalarExpr(E->getArg(2)); + Function *Callee = + CGM.getIntrinsic(Intrinsic::wasm_dot_i8x16_i7x16_add_signed); + return Builder.CreateCall(Callee, {LHS, RHS, Acc}); + } default: return nullptr; } diff --git a/clang/test/CodeGen/builtins-wasm.c b/clang/test/CodeGen/builtins-wasm.c index 6ea97e2..d9ea753 100644 --- a/clang/test/CodeGen/builtins-wasm.c +++ b/clang/test/CodeGen/builtins-wasm.c @@ -777,3 +777,24 @@ u32x4 relaxed_trunc_u_zero_i32x4_f64x2(f64x2 x) { // WEBASSEMBLY: call <4 x i32> @llvm.wasm.relaxed.trunc.unsigned.zero(<2 x double> %x) // WEBASSEMBLY-NEXT: ret } + +i16x8 relaxed_q15mulr_s_i16x8(i16x8 a, i16x8 b) { + return __builtin_wasm_relaxed_q15mulr_s_i16x8(a, b); + // WEBASSEMBLY: call <8 x i16> @llvm.wasm.relaxed.q15mulr.signed( + // WEBASSEMBLY-SAME: <8 x i16> %a, <8 x i16> %b) + // WEBASSEMBLY-NEXT: ret +} + +i16x8 dot_i8x16_i7x16_s_i16x8(i8x16 a, i8x16 b) { + return __builtin_wasm_dot_i8x16_i7x16_s_i16x8(a, b); + // WEBASSEMBLY: call <8 x i16> @llvm.wasm.dot.i8x16.i7x16.signed( + // WEBASSEMBLY-SAME: <16 x i8> %a, <16 x i8> %b) + // WEBASSEMBLY-NEXT: ret +} + +i32x4 dot_i8x16_i7x16_add_s_i32x4(i8x16 a, i8x16 b, i32x4 c) { + return __builtin_wasm_dot_i8x16_i7x16_add_s_i32x4(a, b, c); + // WEBASSEMBLY: call <4 x i32> @llvm.wasm.dot.i8x16.i7x16.add.signed( + // WEBASSEMBLY-SAME: <16 x i8> %a, <16 x i8> %b, <4 x i32> %c) + // WEBASSEMBLY-NEXT: ret +} diff --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td index 2f3edfe..f313be1 100644 --- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td +++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td @@ -270,6 +270,20 @@ def int_wasm_relaxed_trunc_unsigned_zero: [llvm_v2f64_ty], [IntrNoMem, IntrSpeculatable]>; +def int_wasm_relaxed_q15mulr_signed: + Intrinsic<[llvm_v8i16_ty], + [llvm_v8i16_ty, llvm_v8i16_ty], + [IntrNoMem, IntrSpeculatable]>; + +def int_wasm_dot_i8x16_i7x16_signed: + Intrinsic<[llvm_v8i16_ty], + [llvm_v16i8_ty, llvm_v16i8_ty], + [IntrNoMem, IntrSpeculatable]>; + +def int_wasm_dot_i8x16_i7x16_add_signed: + Intrinsic<[llvm_v4i32_ty], + [llvm_v16i8_ty, llvm_v16i8_ty, llvm_v4i32_ty], + [IntrNoMem, IntrSpeculatable]>; //===----------------------------------------------------------------------===// // Thread-local storage intrinsics diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td index 6fcf91e..ed3cc7e 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td @@ -1403,7 +1403,6 @@ defm "" : SIMDLANESELECT; defm "" : SIMDLANESELECT; defm "" : SIMDLANESELECT; - //===----------------------------------------------------------------------===// // Relaxed floating-point min and max. //===----------------------------------------------------------------------===// @@ -1426,3 +1425,30 @@ defm SIMD_RELAXED_FMIN : RelaxedBinary; defm SIMD_RELAXED_FMAX : RelaxedBinary; + +//===----------------------------------------------------------------------===// +// Relaxed rounding q15 multiplication +//===----------------------------------------------------------------------===// + +defm RELAXED_Q15MULR_S : + RelaxedBinary; + +//===----------------------------------------------------------------------===// +// Relaxed integer dot product +//===----------------------------------------------------------------------===// + +defm RELAXED_DOT : + RELAXED_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs), (outs), (ins), + [(set (v8i16 V128:$dst), (int_wasm_dot_i8x16_i7x16_signed + (v16i8 V128:$lhs), (v16i8 V128:$rhs)))], + "i16x8.dot_i8x16_i7x16_s\t$dst, $lhs, $rhs", + "i16x8.dot_i8x16_i7x16_s", 0x112>; + +defm RELAXED_DOT_ADD : + RELAXED_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs, V128:$acc), + (outs), (ins), + [(set (v4i32 V128:$dst), (int_wasm_dot_i8x16_i7x16_add_signed + (v16i8 V128:$lhs), (v16i8 V128:$rhs), (v4i32 V128:$acc)))], + "i32x4.dot_i8x16_i7x16_add_s\t$dst, $lhs, $rhs, $acc", + "i32x4.dot_i8x16_i7x16_add_s", 0x113>; diff --git a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll index 9da303d..5cbc7bf 100644 --- a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll +++ b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll @@ -368,6 +368,30 @@ define <8 x i16> @laneselect_v8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) { ret <8 x i16> %v } +; CHECK-LABEL: relaxed_q15mulr_s_i16x8: +; CHECK-NEXT: .functype relaxed_q15mulr_s_i16x8 (v128, v128) -> (v128){{$}} +; CHECK-NEXT: i16x8.relaxed_q15mulr_s $push[[R:[0-9]+]]=, $0, $1{{$}} +; CHECK-NEXT: return $pop[[R]]{{$}} +declare <8 x i16> @llvm.wasm.relaxed.q15mulr.signed(<8 x i16>, <8 x i16>) +define <8 x i16> @relaxed_q15mulr_s_i16x8(<8 x i16> %a, <8 x i16> %b) { + %v = call <8 x i16> @llvm.wasm.relaxed.q15mulr.signed( + <8 x i16> %a, <8 x i16> %b + ) + ret <8 x i16> %v +} + +; CHECK-LABEL: dot_i8x16_i7x16_s_i16x8: +; CHECK-NEXT: .functype dot_i8x16_i7x16_s_i16x8 (v128, v128) -> (v128){{$}} +; CHECK-NEXT: i16x8.dot_i8x16_i7x16_s $push[[R:[0-9]+]]=, $0, $1{{$}} +; CHECK-NEXT: return $pop[[R]]{{$}} +declare <8 x i16> @llvm.wasm.dot.i8x16.i7x16.signed(<16 x i8>, <16 x i8>) +define <8 x i16> @dot_i8x16_i7x16_s_i16x8(<16 x i8> %a, <16 x i8> %b) { + %v = call <8 x i16> @llvm.wasm.dot.i8x16.i7x16.signed( + <16 x i8> %a, <16 x i8> %b + ) + ret <8 x i16> %v +} + ; ============================================================================== ; 4 x i32 ; ============================================================================== @@ -568,6 +592,20 @@ define <4 x i32> @relaxed_trunc_u_zero(<2 x double> %x) { ret <4 x i32> %a } +; CHECK-LABEL: dot_i8x16_i7x16_add_s_i32x4: +; CHECK-NEXT: .functype dot_i8x16_i7x16_add_s_i32x4 (v128, v128, v128) -> (v128){{$}} +; CHECK-NEXT: i32x4.dot_i8x16_i7x16_add_s $push[[R:[0-9]+]]=, $0, $1, $2{{$}} +; CHECK-NEXT: return $pop[[R]]{{$}} +declare <4 x i32> @llvm.wasm.dot.i8x16.i7x16.add.signed(<16 x i8>, <16 x i8>, + <4 x i32>) +define <4 x i32> @dot_i8x16_i7x16_add_s_i32x4(<16 x i8> %a, <16 x i8> %b, + <4 x i32> %c) { + %v = call <4 x i32> @llvm.wasm.dot.i8x16.i7x16.add.signed( + <16 x i8> %a, <16 x i8> %b, <4 x i32> %c + ) + ret <4 x i32> %v +} + ; ============================================================================== ; 2 x i64 ; ============================================================================== diff --git a/llvm/test/MC/WebAssembly/simd-encodings.s b/llvm/test/MC/WebAssembly/simd-encodings.s index 626b235f..e50e56b 100644 --- a/llvm/test/MC/WebAssembly/simd-encodings.s +++ b/llvm/test/MC/WebAssembly/simd-encodings.s @@ -830,8 +830,13 @@ main: # CHECK: f64x2.relaxed_max # encoding: [0xfd,0x90,0x02] f64x2.relaxed_max - # TODO: i16x8.relaxed_q15mulr_s # encoding: [0xfd,0x91,0x02] - # TODO: i16x8.dot_i8x16_i7x16_s # encoding: [0xfd,0x92,0x02] - # TODO: i32x4.dot_i8x16_i7x16_add_s # encoding: [0xfd,0x93,0x02] + # CHECK: i16x8.relaxed_q15mulr_s # encoding: [0xfd,0x91,0x02] + i16x8.relaxed_q15mulr_s + + # CHECK: i16x8.dot_i8x16_i7x16_s # encoding: [0xfd,0x92,0x02] + i16x8.dot_i8x16_i7x16_s + + # CHECK: i32x4.dot_i8x16_i7x16_add_s # encoding: [0xfd,0x93,0x02] + i32x4.dot_i8x16_i7x16_add_s end_function -- 2.7.4