From afd81d5ace4565270dab68198b76c7a31038bd20 Mon Sep 17 00:00:00 2001 From: Konstantin Seurer Date: Mon, 26 Jun 2023 14:16:17 +0200 Subject: [PATCH] microsoft: Use nir_ instead of nir_build_ helpers Reviewed-by: Alyssa Rosenzweig Reviewed-by: Jesse Natalie Part-of: --- src/microsoft/clc/clc_nir.c | 18 +++++++++--------- src/microsoft/compiler/dxil_nir.c | 22 +++++++++++----------- src/microsoft/spirv_to_dxil/dxil_spirv_nir.c | 18 +++++++++--------- src/microsoft/vulkan/dzn_nir.c | 2 +- 4 files changed, 30 insertions(+), 30 deletions(-) diff --git a/src/microsoft/clc/clc_nir.c b/src/microsoft/clc/clc_nir.c index 423a2e1..fc8937a 100644 --- a/src/microsoft/clc/clc_nir.c +++ b/src/microsoft/clc/clc_nir.c @@ -34,15 +34,15 @@ static nir_ssa_def * load_ubo(nir_builder *b, nir_intrinsic_instr *intr, nir_variable *var, unsigned offset) { - return nir_build_load_ubo(b, - nir_dest_num_components(intr->dest), - nir_dest_bit_size(intr->dest), - nir_imm_int(b, var->data.binding), - nir_imm_int(b, offset), - .align_mul = 256, - .align_offset = offset, - .range_base = offset, - .range = nir_dest_bit_size(intr->dest) * nir_dest_num_components(intr->dest) / 8); + return nir_load_ubo(b, + nir_dest_num_components(intr->dest), + nir_dest_bit_size(intr->dest), + nir_imm_int(b, var->data.binding), + nir_imm_int(b, offset), + .align_mul = 256, + .align_offset = offset, + .range_base = offset, + .range = nir_dest_bit_size(intr->dest) * nir_dest_num_components(intr->dest) / 8); } static bool diff --git a/src/microsoft/compiler/dxil_nir.c b/src/microsoft/compiler/dxil_nir.c index c3156ff..6a74f7c 100644 --- a/src/microsoft/compiler/dxil_nir.c +++ b/src/microsoft/compiler/dxil_nir.c @@ -141,8 +141,8 @@ lower_masked_store_vec32(nir_builder *b, nir_ssa_def *offset, nir_ssa_def *index if (var->data.mode == nir_var_mem_shared) { /* Use the dedicated masked intrinsic */ nir_deref_instr *deref = nir_build_deref_array(b, nir_build_deref_var(b, var), index); - nir_build_deref_atomic(b, 32, &deref->dest.ssa, nir_inot(b, mask), .atomic_op = nir_atomic_op_iand); - nir_build_deref_atomic(b, 32, &deref->dest.ssa, vec32, .atomic_op = nir_atomic_op_ior); + nir_deref_atomic(b, 32, &deref->dest.ssa, nir_inot(b, mask), .atomic_op = nir_atomic_op_iand); + nir_deref_atomic(b, 32, &deref->dest.ssa, vec32, .atomic_op = nir_atomic_op_ior); } else { /* For scratch, since we don't need atomics, just generate the read-modify-write in NIR */ nir_ssa_def *load = nir_load_array_var(b, var, index); @@ -635,11 +635,11 @@ lower_shared_atomic(nir_builder *b, nir_intrinsic_instr *intr, nir_variable *var nir_deref_instr *deref = nir_build_deref_array(b, nir_build_deref_var(b, var), index); nir_ssa_def *result; if (intr->intrinsic == nir_intrinsic_shared_atomic_swap) - result = nir_build_deref_atomic_swap(b, 32, &deref->dest.ssa, intr->src[1].ssa, intr->src[2].ssa, - .atomic_op = nir_intrinsic_atomic_op(intr)); + result = nir_deref_atomic_swap(b, 32, &deref->dest.ssa, intr->src[1].ssa, intr->src[2].ssa, + .atomic_op = nir_intrinsic_atomic_op(intr)); else - result = nir_build_deref_atomic(b, 32, &deref->dest.ssa, intr->src[1].ssa, - .atomic_op = nir_intrinsic_atomic_op(intr)); + result = nir_deref_atomic(b, 32, &deref->dest.ssa, intr->src[1].ssa, + .atomic_op = nir_intrinsic_atomic_op(intr)); nir_ssa_def_rewrite_uses(&intr->dest.ssa, result); nir_instr_remove(&intr->instr); @@ -1444,7 +1444,7 @@ lower_sysval_to_load_input_impl(nir_builder *b, nir_instr *instr, void *data) ? 32 : intr->dest.ssa.bit_size; b->cursor = nir_before_instr(instr); - nir_ssa_def *result = nir_build_load_input(b, intr->dest.ssa.num_components, bit_size, nir_imm_int(b, 0), + nir_ssa_def *result = nir_load_input(b, intr->dest.ssa.num_components, bit_size, nir_imm_int(b, 0), .base = var->data.driver_location, .dest_type = dest_type); /* The nir_type_uint32 is really a nir_type_bool32, but that type is very @@ -2195,8 +2195,8 @@ lower_subgroup_scan(nir_builder *b, nir_instr *instr, void *data) b->cursor = nir_before_instr(instr); nir_op op = nir_intrinsic_reduction_op(intr); - nir_ssa_def *subgroup_id = nir_build_load_subgroup_invocation(b); - nir_ssa_def *active_threads = nir_build_ballot(b, 4, 32, nir_imm_true(b)); + nir_ssa_def *subgroup_id = nir_load_subgroup_invocation(b); + nir_ssa_def *active_threads = nir_ballot(b, 4, 32, nir_imm_true(b)); nir_ssa_def *base_value; uint32_t bit_size = intr->dest.ssa.bit_size; if (op == nir_op_iand || op == nir_op_umin) @@ -2224,10 +2224,10 @@ lower_subgroup_scan(nir_builder *b, nir_instr *instr, void *data) nir_if *nif = nir_push_if(b, intr->intrinsic == nir_intrinsic_inclusive_scan ? nir_ige(b, subgroup_id, loop_counter) : nir_ilt(b, loop_counter, subgroup_id)); - nir_if *if_active_thread = nir_push_if(b, nir_build_ballot_bitfield_extract(b, 32, active_threads, loop_counter)); + nir_if *if_active_thread = nir_push_if(b, nir_ballot_bitfield_extract(b, 32, active_threads, loop_counter)); nir_ssa_def *result = nir_build_alu2(b, op, nir_load_var(b, result_var), - nir_build_read_invocation(b, intr->src[0].ssa, loop_counter)); + nir_read_invocation(b, intr->src[0].ssa, loop_counter)); nir_store_var(b, result_var, result, 1); nir_pop_if(b, if_active_thread); nir_store_var(b, loop_counter_var, nir_iadd_imm(b, loop_counter, 1), 1); diff --git a/src/microsoft/spirv_to_dxil/dxil_spirv_nir.c b/src/microsoft/spirv_to_dxil/dxil_spirv_nir.c index 25a43e4..5d2d998 100644 --- a/src/microsoft/spirv_to_dxil/dxil_spirv_nir.c +++ b/src/microsoft/spirv_to_dxil/dxil_spirv_nir.c @@ -252,7 +252,7 @@ lower_shader_system_values(struct nir_builder *builder, nir_instr *instr, nir_address_format_bit_size(ubo_format), index, .desc_type = VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER); - nir_ssa_def *load_data = nir_build_load_ubo( + nir_ssa_def *load_data = nir_load_ubo( builder, nir_dest_num_components(intrin->dest), nir_dest_bit_size(intrin->dest), @@ -341,7 +341,7 @@ lower_load_push_constant(struct nir_builder *builder, nir_instr *instr, index, .desc_type = VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER); nir_ssa_def *offset = nir_ssa_for_src(builder, intrin->src[0], 1); - nir_ssa_def *load_data = nir_build_load_ubo( + nir_ssa_def *load_data = nir_load_ubo( builder, nir_dest_num_components(intrin->dest), nir_dest_bit_size(intrin->dest), @@ -437,7 +437,7 @@ lower_yz_flip(struct nir_builder *builder, nir_instr *instr, index, .desc_type = VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER); dyn_yz_flip_mask = - nir_build_load_ubo(builder, 1, 32, + nir_load_ubo(builder, 1, 32, nir_channel(builder, load_desc, 0), nir_imm_int(builder, offset), .align_mul = 256, @@ -738,12 +738,12 @@ write_pntc_with_pos(nir_builder *b, nir_instr *instr, void *_data) index, .desc_type = VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER); nir_ssa_def *transform = nir_channels(b, - nir_build_load_ubo(b, 4, 32, - nir_channel(b, load_desc, 0), - nir_imm_int(b, offset), - .align_mul = 16, - .range_base = offset, - .range = 16), + nir_load_ubo(b, 4, 32, + nir_channel(b, load_desc, 0), + nir_imm_int(b, offset), + .align_mul = 16, + .range_base = offset, + .range = 16), 0x6); nir_ssa_def *point_center_in_clip = nir_fmul(b, nir_trim_vector(b, pos, 2), nir_frcp(b, nir_channel(b, pos, 3))); diff --git a/src/microsoft/vulkan/dzn_nir.c b/src/microsoft/vulkan/dzn_nir.c index 5fce0b7..69cf5f5 100644 --- a/src/microsoft/vulkan/dzn_nir.c +++ b/src/microsoft/vulkan/dzn_nir.c @@ -829,7 +829,7 @@ load_dynamic_depth_bias(nir_builder *b, struct dzn_nir_point_gs_info *info) nir_address_format_bit_size(ubo_format), index, .desc_type = VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER); - return nir_build_load_ubo( + return nir_load_ubo( b, 1, 32, nir_channel(b, load_desc, 0), nir_imm_int(b, offset), -- 2.7.4