From afbf21f15c75c59f12c0b83e2dbf81f9b0e9ec59 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Sat, 8 Nov 2014 00:02:57 +0000 Subject: [PATCH] R600/SI: Fix broken check prefixes in test llvm-svn: 221565 --- .../CodeGen/R600/32-bit-local-address-space.ll | 61 +++++++++++----------- 1 file changed, 30 insertions(+), 31 deletions(-) diff --git a/llvm/test/CodeGen/R600/32-bit-local-address-space.ll b/llvm/test/CodeGen/R600/32-bit-local-address-space.ll index 10fed83..ee397aa 100644 --- a/llvm/test/CodeGen/R600/32-bit-local-address-space.ll +++ b/llvm/test/CodeGen/R600/32-bit-local-address-space.ll @@ -1,5 +1,4 @@ -; RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=FUNC %s -; RUN: llc < %s -march=r600 -mcpu=bonaire -verify-machineinstrs | FileCheck --check-prefix=CI --check-prefix=FUNC %s +; RUN: llc -march=r600 -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; On Southern Islands GPUs the local address space(3) uses 32-bit pointers and ; the global address space(1) uses 64-bit pointers. These tests check to make sure @@ -11,8 +10,8 @@ ; instructions with B64, U64, and I64 take 64-bit operands. ; FUNC-LABEL: {{^}}local_address_load: -; CHECK: v_mov_b32_e{{32|64}} [[PTR:v[0-9]]] -; CHECK: ds_read_b32 v{{[0-9]+}}, [[PTR]] +; SI: v_mov_b32_e{{32|64}} [[PTR:v[0-9]]] +; SI: ds_read_b32 v{{[0-9]+}}, [[PTR]] define void @local_address_load(i32 addrspace(1)* %out, i32 addrspace(3)* %in) { entry: %0 = load i32 addrspace(3)* %in @@ -21,9 +20,9 @@ entry: } ; FUNC-LABEL: {{^}}local_address_gep: -; CHECK: s_add_i32 [[SPTR:s[0-9]]] -; CHECK: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[SPTR]] -; CHECK: ds_read_b32 [[VPTR]] +; SI: s_add_i32 [[SPTR:s[0-9]]] +; SI: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[SPTR]] +; SI: ds_read_b32 [[VPTR]] define void @local_address_gep(i32 addrspace(1)* %out, i32 addrspace(3)* %in, i32 %offset) { entry: %0 = getelementptr i32 addrspace(3)* %in, i32 %offset @@ -33,8 +32,8 @@ entry: } ; FUNC-LABEL: {{^}}local_address_gep_const_offset: -; CHECK: v_mov_b32_e32 [[VPTR:v[0-9]+]], s{{[0-9]+}} -; CHECK: ds_read_b32 v{{[0-9]+}}, [[VPTR]], 0x4, +; SI: v_mov_b32_e32 [[VPTR:v[0-9]+]], s{{[0-9]+}} +; SI: ds_read_b32 v{{[0-9]+}}, [[VPTR]] offset:4 define void @local_address_gep_const_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %in) { entry: %0 = getelementptr i32 addrspace(3)* %in, i32 1 @@ -45,9 +44,9 @@ entry: ; Offset too large, can't fold into 16-bit immediate offset. ; FUNC-LABEL: {{^}}local_address_gep_large_const_offset: -; CHECK: s_add_i32 [[SPTR:s[0-9]]], s{{[0-9]+}}, 0x10004 -; CHECK: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[SPTR]] -; CHECK: ds_read_b32 [[VPTR]] +; SI: s_add_i32 [[SPTR:s[0-9]]], s{{[0-9]+}}, 0x10004 +; SI: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[SPTR]] +; SI: ds_read_b32 [[VPTR]] define void @local_address_gep_large_const_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %in) { entry: %0 = getelementptr i32 addrspace(3)* %in, i32 16385 @@ -57,9 +56,9 @@ entry: } ; FUNC-LABEL: {{^}}null_32bit_lds_ptr: -; CHECK: v_cmp_ne_i32 -; CHECK-NOT: v_cmp_ne_i32 -; CHECK: V_CNDMASK_B32 +; SI: v_cmp_ne_i32 +; SI-NOT: v_cmp_ne_i32 +; SI: v_cndmask_b32 define void @null_32bit_lds_ptr(i32 addrspace(1)* %out, i32 addrspace(3)* %lds) nounwind { %cmp = icmp ne i32 addrspace(3)* %lds, null %x = select i1 %cmp, i32 123, i32 456 @@ -68,9 +67,9 @@ define void @null_32bit_lds_ptr(i32 addrspace(1)* %out, i32 addrspace(3)* %lds) } ; FUNC-LABEL: {{^}}mul_32bit_ptr: -; CHECK: v_mul_lo_i32 -; CHECK-NEXT: v_add_i32_e32 -; CHECK-NEXT: ds_read_b32 +; SI: s_mul_i32 +; SI-NEXT: s_add_i32 +; SI: ds_read_b32 define void @mul_32bit_ptr(float addrspace(1)* %out, [3 x float] addrspace(3)* %lds, i32 %tid) { %ptr = getelementptr [3 x float] addrspace(3)* %lds, i32 %tid, i32 0 %val = load float addrspace(3)* %ptr @@ -81,8 +80,8 @@ define void @mul_32bit_ptr(float addrspace(1)* %out, [3 x float] addrspace(3)* % @g_lds = addrspace(3) global float zeroinitializer, align 4 ; FUNC-LABEL: {{^}}infer_ptr_alignment_global_offset: -; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], 0 -; CHECK: ds_read_b32 v{{[0-9]+}}, [[REG]] +; SI: v_mov_b32_e32 [[REG:v[0-9]+]], 0 +; SI: ds_read_b32 v{{[0-9]+}}, [[REG]] define void @infer_ptr_alignment_global_offset(float addrspace(1)* %out, i32 %tid) { %val = load float addrspace(3)* @g_lds store float %val, float addrspace(1)* %out @@ -94,23 +93,23 @@ define void @infer_ptr_alignment_global_offset(float addrspace(1)* %out, i32 %ti @dst = addrspace(3) global [16384 x i32] zeroinitializer ; FUNC-LABEL: {{^}}global_ptr: -; CHECK: ds_write_b32 +; SI: ds_write_b32 define void @global_ptr() nounwind { store i32 addrspace(3)* getelementptr ([16384 x i32] addrspace(3)* @dst, i32 0, i32 16), i32 addrspace(3)* addrspace(3)* @ptr ret void } ; FUNC-LABEL: {{^}}local_address_store: -; CHECK: ds_write_b32 +; SI: ds_write_b32 define void @local_address_store(i32 addrspace(3)* %out, i32 %val) { store i32 %val, i32 addrspace(3)* %out ret void } ; FUNC-LABEL: {{^}}local_address_gep_store: -; CHECK: s_add_i32 [[SADDR:s[0-9]+]], -; CHECK: v_mov_b32_e32 [[ADDR:v[0-9]+]], [[SADDR]] -; CHECK: ds_write_b32 [[ADDR]], v{{[0-9]+}}, +; SI: s_add_i32 [[SADDR:s[0-9]+]], +; SI: v_mov_b32_e32 [[ADDR:v[0-9]+]], [[SADDR]] +; SI: ds_write_b32 [[ADDR]], v{{[0-9]+}} define void @local_address_gep_store(i32 addrspace(3)* %out, i32, i32 %val, i32 %offset) { %gep = getelementptr i32 addrspace(3)* %out, i32 %offset store i32 %val, i32 addrspace(3)* %gep, align 4 @@ -118,9 +117,9 @@ define void @local_address_gep_store(i32 addrspace(3)* %out, i32, i32 %val, i32 } ; FUNC-LABEL: {{^}}local_address_gep_const_offset_store: -; CHECK: v_mov_b32_e32 [[VPTR:v[0-9]+]], s{{[0-9]+}} -; CHECK: v_mov_b32_e32 [[VAL:v[0-9]+]], s{{[0-9]+}} -; CHECK: ds_write_b32 [[VPTR]], [[VAL]], 0x4 +; SI: v_mov_b32_e32 [[VPTR:v[0-9]+]], s{{[0-9]+}} +; SI: v_mov_b32_e32 [[VAL:v[0-9]+]], s{{[0-9]+}} +; SI: ds_write_b32 [[VPTR]], [[VAL]] offset:4 define void @local_address_gep_const_offset_store(i32 addrspace(3)* %out, i32 %val) { %gep = getelementptr i32 addrspace(3)* %out, i32 1 store i32 %val, i32 addrspace(3)* %gep, align 4 @@ -129,9 +128,9 @@ define void @local_address_gep_const_offset_store(i32 addrspace(3)* %out, i32 %v ; Offset too large, can't fold into 16-bit immediate offset. ; FUNC-LABEL: {{^}}local_address_gep_large_const_offset_store: -; CHECK: s_add_i32 [[SPTR:s[0-9]]], s{{[0-9]+}}, 0x10004 -; CHECK: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[SPTR]] -; CHECK: ds_write_b32 [[VPTR]], v{{[0-9]+}}, 0 +; SI: s_add_i32 [[SPTR:s[0-9]]], s{{[0-9]+}}, 0x10004 +; SI: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[SPTR]] +; SI: ds_write_b32 [[VPTR]], v{{[0-9]+}} [M0]{{$}} define void @local_address_gep_large_const_offset_store(i32 addrspace(3)* %out, i32 %val) { %gep = getelementptr i32 addrspace(3)* %out, i32 16385 store i32 %val, i32 addrspace(3)* %gep, align 4 -- 2.7.4