From af823ae71a4fc561ff3f98ed6b2d1c53c2885b2d Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Fri, 10 Jun 2022 13:39:49 +1000 Subject: [PATCH] nvk: port the blit and copy code to new command submission. Part-of: --- src/nouveau/vulkan/nvk_cmd_blit.c | 145 ++++++++++++++++++------------------ src/nouveau/vulkan/nvk_cmd_copy.c | 150 +++++++++++++++++++------------------- src/nouveau/winsys/nouveau_push.h | 1 + 3 files changed, 154 insertions(+), 142 deletions(-) diff --git a/src/nouveau/vulkan/nvk_cmd_blit.c b/src/nouveau/vulkan/nvk_cmd_blit.c index 3bae21f..4c1333e 100644 --- a/src/nouveau/vulkan/nvk_cmd_blit.c +++ b/src/nouveau/vulkan/nvk_cmd_blit.c @@ -10,8 +10,7 @@ #include "nouveau_push.h" #include "nvtypes.h" -#include "classes/cl902d.h" -#include "push906f.h" +#include "nvk_cl902d.h" VKAPI_ATTR void VKAPI_CALL nvk_CmdBlitImage2( @@ -32,67 +31,73 @@ nvk_CmdBlitImage2( VkDeviceSize src_addr = src->mem->bo->offset + src->offset; VkDeviceSize dst_addr = dst->mem->bo->offset + dst->offset; - PUSH_MTHD(push, NV902D, SET_OPERATION, - NVDEF(NV902D, SET_OPERATION, V, SRCCOPY)); - PUSH_MTHD(push, NV902D, SET_CLIP_ENABLE, - NVDEF(NV902D, SET_CLIP_ENABLE, V, FALSE)); - PUSH_MTHD(push, NV902D, SET_COLOR_KEY_ENABLE, - NVDEF(NV902D, SET_COLOR_KEY_ENABLE, V, FALSE)); - PUSH_MTHD(push, NV902D, SET_RENDER_ENABLE_C, - NVDEF(NV902D, SET_RENDER_ENABLE_C, MODE, TRUE)); + P_MTHD(push, NV902D, SET_OPERATION); + P_NV902D_SET_OPERATION(push, V_SRCCOPY); + P_MTHD(push, NV902D, SET_CLIP_ENABLE); + P_NV902D_SET_CLIP_ENABLE(push, V_FALSE); + P_MTHD(push, NV902D, SET_COLOR_KEY_ENABLE); + P_NV902D_SET_COLOR_KEY_ENABLE(push, V_FALSE); + P_MTHD(push, NV902D, SET_RENDER_ENABLE_C); + P_NV902D_SET_RENDER_ENABLE_C(push, MODE_TRUE); - PUSH_MTHD(push, NV902D, SET_SRC_FORMAT, src->format->hw_format); + P_MTHD(push, NV902D, SET_SRC_FORMAT); + P_NV902D_SET_SRC_FORMAT(push, src->format->hw_format); if (src->tile.is_tiled) { - PUSH_MTHD(push, NV902D, SET_SRC_MEMORY_LAYOUT, - NVDEF(NV902D, SET_SRC_MEMORY_LAYOUT, V, BLOCKLINEAR), - SET_SRC_BLOCK_SIZE, - NVVAL(NV902D, SET_SRC_BLOCK_SIZE, HEIGHT, src->tile.y) | - NVVAL(NV902D, SET_SRC_BLOCK_SIZE, DEPTH, src->tile.z)); + P_MTHD(push, NV902D, SET_SRC_MEMORY_LAYOUT); + P_NV902D_SET_SRC_MEMORY_LAYOUT(push, V_BLOCKLINEAR); + P_NV902D_SET_SRC_BLOCK_SIZE(push, { + .height = src->tile.y, + .depth = src->tile.z, + }); } else { - PUSH_IMMD(push, NV902D, SET_SRC_MEMORY_LAYOUT, - NVDEF(NV902D, SET_SRC_MEMORY_LAYOUT, V, PITCH)); + P_MTHD(push, NV902D, SET_SRC_MEMORY_LAYOUT); + P_NV902D_SET_SRC_MEMORY_LAYOUT(push, V_PITCH); } - PUSH_IMMD(push, NV902D, SET_SRC_DEPTH, src_depth); + P_IMMD(push, NV902D, SET_SRC_DEPTH, src_depth); - PUSH_MTHD(push, NV902D, SET_SRC_PITCH, src->row_stride, - SET_SRC_WIDTH, src->vk.extent.width, - SET_SRC_HEIGHT, src->vk.extent.height, - SET_SRC_OFFSET_UPPER, - NVVAL(NV902D, SET_SRC_OFFSET_UPPER, V, src_addr >> 32), - SET_SRC_OFFSET_LOWER, src_addr & 0xffffffff); + P_MTHD(push, NV902D, SET_SRC_PITCH); + P_NV902D_SET_SRC_PITCH(push, src->row_stride); + P_NV902D_SET_SRC_WIDTH(push, src->vk.extent.width); + P_NV902D_SET_SRC_HEIGHT(push, src->vk.extent.height); + P_NV902D_SET_SRC_OFFSET_UPPER(push, src_addr >> 32); + P_NV902D_SET_SRC_OFFSET_LOWER(push, src_addr & 0xffffffff); - PUSH_MTHD(push, NV902D, SET_DST_FORMAT, dst->format->hw_format); + P_MTHD(push, NV902D, SET_DST_FORMAT); + P_NV902D_SET_DST_FORMAT(push, dst->format->hw_format); if (dst->tile.is_tiled) { - PUSH_MTHD(push, NV902D, SET_DST_MEMORY_LAYOUT, - NVDEF(NV902D, SET_DST_MEMORY_LAYOUT, V, BLOCKLINEAR), - SET_DST_BLOCK_SIZE, - NVVAL(NV902D, SET_DST_BLOCK_SIZE, HEIGHT, dst->tile.y) | - NVVAL(NV902D, SET_DST_BLOCK_SIZE, DEPTH, dst->tile.z)); + P_MTHD(push, NV902D, SET_DST_MEMORY_LAYOUT); + P_NV902D_SET_DST_MEMORY_LAYOUT(push, V_BLOCKLINEAR); + P_NV902D_SET_DST_BLOCK_SIZE(push, { + .height = dst->tile.y, + .depth = dst->tile.z, + }); } else { - PUSH_IMMD(push, NV902D, SET_DST_MEMORY_LAYOUT, - NVDEF(NV902D, SET_DST_MEMORY_LAYOUT, V, PITCH)); + P_IMMD(push, NV902D, SET_DST_MEMORY_LAYOUT, V_PITCH); } - PUSH_IMMD(push, NV902D, SET_DST_DEPTH, dst_depth); + P_IMMD(push, NV902D, SET_DST_DEPTH, dst_depth); - PUSH_MTHD(push, NV902D, SET_DST_PITCH, dst->row_stride, - SET_DST_WIDTH, dst->vk.extent.width, - SET_DST_HEIGHT, dst->vk.extent.height, - SET_DST_OFFSET_UPPER, - NVVAL(NV902D, SET_DST_OFFSET_UPPER, V, dst_addr >> 32), - SET_DST_OFFSET_LOWER, dst_addr & 0xffffffff); + P_MTHD(push, NV902D, SET_DST_PITCH); + P_NV902D_SET_DST_PITCH(push, dst->row_stride); + P_NV902D_SET_DST_WIDTH(push, dst->vk.extent.width); + P_NV902D_SET_DST_HEIGHT(push, dst->vk.extent.height); + P_NV902D_SET_DST_OFFSET_UPPER(push, dst_addr >> 32); + P_NV902D_SET_DST_OFFSET_LOWER(push, dst_addr & 0xffffffff); + P_MTHD(push, NV902D, SET_PIXELS_FROM_MEMORY_SAMPLE_MODE); if (pBlitImageInfo->filter == VK_FILTER_NEAREST) { - PUSH_MTHD(push, NV902D, SET_PIXELS_FROM_MEMORY_SAMPLE_MODE, - NVDEF(NV902D, SET_PIXELS_FROM_MEMORY_SAMPLE_MODE, ORIGIN, CORNER) | - NVDEF(NV902D, SET_PIXELS_FROM_MEMORY_SAMPLE_MODE, FILTER, POINT)); + P_NV902D_SET_PIXELS_FROM_MEMORY_SAMPLE_MODE(push, { + .origin = ORIGIN_CORNER, + .filter = FILTER_POINT, + }); } else { - PUSH_MTHD(push, NV902D, SET_PIXELS_FROM_MEMORY_SAMPLE_MODE, - NVDEF(NV902D, SET_PIXELS_FROM_MEMORY_SAMPLE_MODE, ORIGIN, CORNER) | - NVDEF(NV902D, SET_PIXELS_FROM_MEMORY_SAMPLE_MODE, FILTER, BILINEAR)); + P_NV902D_SET_PIXELS_FROM_MEMORY_SAMPLE_MODE(push, { + .origin = ORIGIN_CORNER, + .filter = FILTER_BILINEAR, + }); } /* for single channel sources we have to disable channels, we can use SRCCOPY_PREMULT: @@ -104,17 +109,17 @@ nvk_CmdBlitImage2( if (vk_format_get_nr_components(src->format->vk_format) == 1 && src->format->hw_format != dst->format->hw_format) { uint8_t mask = vk_format_is_snorm(dst->format->vk_format) ? 0x7f : 0xff; - PUSH_MTHD(push, NV902D, SET_BETA1, 0xff); - PUSH_MTHD(push, NV902D, SET_BETA4, - NVVAL(NV902D, SET_BETA4, R, mask) | - NVVAL(NV902D, SET_BETA4, G, 0) | - NVVAL(NV902D, SET_BETA4, B, 0) | - NVVAL(NV902D, SET_BETA4, A, mask), - SET_OPERATION, - NVDEF(NV902D, SET_OPERATION, V, SRCCOPY_PREMULT)); + P_MTHD(push, NV902D, SET_BETA1); + P_NV902D_SET_BETA1(push, 0xff); + P_MTHD(push, NV902D, SET_BETA4); + P_NV902D_SET_BETA4(push, { + .r = mask, + .a = mask, + }); + P_NV902D_SET_OPERATION(push, V_SRCCOPY_PREMULT); } else { - PUSH_IMMD(push, NV902D, SET_OPERATION, - NVDEF(NV902D, SET_OPERATION, V, SRCCOPY)); + P_MTHD(push, NV902D, SET_OPERATION); + P_NV902D_SET_OPERATION(push, V_SRCCOPY); } for (unsigned r = 0; r < pBlitImageInfo->regionCount; r++) { @@ -148,19 +153,21 @@ nvk_CmdBlitImage2( src_start_x_fp += scaling_x_fp / 2; src_start_y_fp += scaling_y_fp / 2; - PUSH_MTHD(push, NV902D, SET_PIXELS_FROM_MEMORY_DST_X0, dst_start_x, - SET_PIXELS_FROM_MEMORY_DST_Y0, dst_start_y, - SET_PIXELS_FROM_MEMORY_DST_WIDTH, dst_width, - SET_PIXELS_FROM_MEMORY_DST_HEIGHT, dst_height, - SET_PIXELS_FROM_MEMORY_DU_DX_FRAC, scaling_x_fp & 0xffffffff, - SET_PIXELS_FROM_MEMORY_DU_DX_INT, scaling_x_fp >> 32, - SET_PIXELS_FROM_MEMORY_DV_DY_FRAC, scaling_y_fp & 0xffffffff, - SET_PIXELS_FROM_MEMORY_DV_DY_INT, scaling_y_fp >> 32); - - PUSH_MTHD(push, NV902D, SET_PIXELS_FROM_MEMORY_SRC_X0_FRAC, src_start_x_fp & 0xffffffff, - SET_PIXELS_FROM_MEMORY_SRC_X0_INT, src_start_x_fp >> 32, - SET_PIXELS_FROM_MEMORY_SRC_Y0_FRAC, src_start_y_fp & 0xffffffff, - PIXELS_FROM_MEMORY_SRC_Y0_INT, src_start_y_fp >> 32); + P_MTHD(push, NV902D, SET_PIXELS_FROM_MEMORY_DST_X0); + P_NV902D_SET_PIXELS_FROM_MEMORY_DST_X0(push, dst_start_x); + P_NV902D_SET_PIXELS_FROM_MEMORY_DST_Y0(push, dst_start_y); + P_NV902D_SET_PIXELS_FROM_MEMORY_DST_WIDTH(push, dst_width); + P_NV902D_SET_PIXELS_FROM_MEMORY_DST_HEIGHT(push, dst_height); + P_NV902D_SET_PIXELS_FROM_MEMORY_DU_DX_FRAC(push, scaling_x_fp & 0xffffffff); + P_NV902D_SET_PIXELS_FROM_MEMORY_DU_DX_INT(push, scaling_x_fp >> 32); + P_NV902D_SET_PIXELS_FROM_MEMORY_DV_DY_FRAC(push, scaling_y_fp & 0xffffffff); + P_NV902D_SET_PIXELS_FROM_MEMORY_DV_DY_INT(push, scaling_y_fp >> 32); + + P_MTHD(push, NV902D, SET_PIXELS_FROM_MEMORY_SRC_X0_FRAC); + P_NV902D_SET_PIXELS_FROM_MEMORY_SRC_X0_FRAC(push, src_start_x_fp & 0xffffffff); + P_NV902D_SET_PIXELS_FROM_MEMORY_SRC_X0_INT(push, src_start_x_fp >> 32); + P_NV902D_SET_PIXELS_FROM_MEMORY_SRC_Y0_FRAC(push, src_start_y_fp & 0xffffffff); + P_NV902D_PIXELS_FROM_MEMORY_SRC_Y0_INT(push, src_start_y_fp >> 32); } } diff --git a/src/nouveau/vulkan/nvk_cmd_copy.c b/src/nouveau/vulkan/nvk_cmd_copy.c index 8a405dd..283af1b 100644 --- a/src/nouveau/vulkan/nvk_cmd_copy.c +++ b/src/nouveau/vulkan/nvk_cmd_copy.c @@ -12,9 +12,8 @@ #include "nouveau_push.h" #include "nvtypes.h" -#include "classes/cl90b5.h" -#include "classes/clc1b5.h" -#include "push906f.h" +#include "nvk_cl90b5.h" +#include "nvk_clc1b5.h" static void nouveau_copy_linear(struct nouveau_ws_push *push, @@ -23,22 +22,23 @@ nouveau_copy_linear(struct nouveau_ws_push *push, while (size) { unsigned bytes = MIN2(size, 1 << 17); - PUSH_MTHD(push, NV90B5, OFFSET_IN_UPPER, - NVVAL(NV90B5, OFFSET_IN_UPPER, UPPER, src_addr >> 32), - OFFSET_IN_LOWER, src_addr & 0xffffffff, + P_MTHD(push, NV90B5, OFFSET_IN_UPPER); + P_NV90B5_OFFSET_IN_UPPER(push, src_addr >> 32); + P_NV90B5_OFFSET_IN_LOWER(push, src_addr & 0xffffffff); + P_NV90B5_OFFSET_OUT_UPPER(push, dst_addr >> 32); + P_NV90B5_OFFSET_OUT_LOWER(push, dst_addr & 0xffffffff); - OFFSET_OUT_UPPER, - NVVAL(NV90B5, OFFSET_OUT_UPPER, UPPER, dst_addr >> 32), - OFFSET_OUT_LOWER, dst_addr & 0xffffffff); + P_MTHD(push, NV90B5, LINE_LENGTH_IN); + P_NV90B5_LINE_LENGTH_IN(push, bytes); + P_NV90B5_LINE_COUNT(push, 1); - PUSH_MTHD(push, NV90B5, LINE_LENGTH_IN, bytes, - LINE_COUNT, 1); - PUSH_IMMD(push, NV90B5, LAUNCH_DMA, - NVDEF(NV90B5, LAUNCH_DMA, DATA_TRANSFER_TYPE, NON_PIPELINED) | - NVDEF(NV90B5, LAUNCH_DMA, MULTI_LINE_ENABLE, FALSE) | - NVDEF(NV90B5, LAUNCH_DMA, FLUSH_ENABLE, TRUE) | - NVDEF(NV90B5, LAUNCH_DMA, SRC_MEMORY_LAYOUT, PITCH) | - NVDEF(NV90B5, LAUNCH_DMA, DST_MEMORY_LAYOUT, PITCH)); + P_IMMD(push, NV90B5, LAUNCH_DMA, { + .data_transfer_type = DATA_TRANSFER_TYPE_NON_PIPELINED, + .multi_line_enable = MULTI_LINE_ENABLE_TRUE, + .flush_enable = FLUSH_ENABLE_TRUE, + .src_memory_layout = SRC_MEMORY_LAYOUT_PITCH, + .dst_memory_layout = DST_MEMORY_LAYOUT_PITCH, + }); src_addr += bytes; dst_addr += bytes; @@ -119,84 +119,88 @@ nouveau_copy_rect(struct nvk_cmd_buffer *cmd, struct nouveau_copy *copy) struct nouveau_ws_push *push = cmd->push; for (unsigned z = 0; z < copy->extent.depth; z++) { - PUSH_MTHD(push, NV90B5, OFFSET_IN_UPPER, - NVVAL(NV90B5, OFFSET_IN_UPPER, UPPER, src_addr >> 32), - OFFSET_IN_LOWER, src_addr & 0xffffffff, - - OFFSET_OUT_UPPER, - NVVAL(NV90B5, OFFSET_OUT_UPPER, UPPER, dst_addr >> 32), - OFFSET_OUT_LOWER, dst_addr & 0xffffffff, - PITCH_IN, copy->src.row_stride, - PITCH_OUT, copy->dst.row_stride, - LINE_LENGTH_IN, copy->extent.width * copy->bpp, - LINE_COUNT, copy->extent.height); - - uint32_t pitch_cmd = 0; + P_MTHD(push, NV90B5, OFFSET_IN_UPPER); + P_NV90B5_OFFSET_IN_UPPER(push, src_addr >> 32); + P_NV90B5_OFFSET_IN_LOWER(push, src_addr & 0xffffffff); + P_NV90B5_OFFSET_OUT_UPPER(push, dst_addr >> 32); + P_NV90B5_OFFSET_OUT_LOWER(push, dst_addr & 0xfffffff); + P_NV90B5_PITCH_IN(push, copy->src.row_stride); + P_NV90B5_PITCH_OUT(push, copy->dst.row_stride); + P_NV90B5_LINE_LENGTH_IN(push, copy->extent.width * copy->bpp); + P_NV90B5_LINE_COUNT(push, copy->extent.height); + + uint32_t src_layout = 0, dst_layout = 0; if (copy->src.tile.is_tiled) { assert(copy->src.tile.is_fermi); - PUSH_MTHD(push, NV90B5, SET_SRC_BLOCK_SIZE, - NVVAL(NV90B5, SET_SRC_BLOCK_SIZE, WIDTH, copy->src.tile.x) | - NVVAL(NV90B5, SET_SRC_BLOCK_SIZE, HEIGHT, copy->src.tile.y) | - NVVAL(NV90B5, SET_SRC_BLOCK_SIZE, DEPTH, copy->src.tile.z) | - NVDEF(NV90B5, SET_SRC_BLOCK_SIZE, GOB_HEIGHT, GOB_HEIGHT_FERMI_8), - - SET_SRC_WIDTH, copy->src.extent.width * copy->bpp, - SET_SRC_HEIGHT, copy->src.extent.height, - SET_SRC_DEPTH, copy->src.extent.depth, - SET_SRC_LAYER, z + copy->src.offset.z); + P_MTHD(push, NV90B5, SET_SRC_BLOCK_SIZE); + P_NV90B5_SET_SRC_BLOCK_SIZE(push, { + .width = copy->src.tile.x, + .height = copy->src.tile.y, + .depth = copy->src.tile.z, + .gob_height = GOB_HEIGHT_GOB_HEIGHT_FERMI_8, + }); + P_NV90B5_SET_SRC_WIDTH(push, copy->src.extent.width * copy->bpp); + P_NV90B5_SET_SRC_HEIGHT(push, copy->src.extent.height); + P_NV90B5_SET_SRC_DEPTH(push, copy->src.extent.depth); + P_NV90B5_SET_SRC_LAYER(push, z + copy->src.offset.z); if (cmd->pool->dev->pdev->dev->cls >= 0xc1) { - PUSH_MTHD(push, NVC1B5, SRC_ORIGIN_X, - NVVAL(NVC1B5, SRC_ORIGIN_X, VALUE, copy->src.offset.x * copy->bpp), - SRC_ORIGIN_Y, - NVVAL(NVC1B5, SRC_ORIGIN_Y, VALUE, copy->src.offset.y)); + P_MTHD(push, NVC1B5, SRC_ORIGIN_X); + P_NVC1B5_SRC_ORIGIN_X(push, copy->src.offset.x * copy->bpp); + P_NVC1B5_SRC_ORIGIN_Y(push, copy->src.offset.y); } else { - PUSH_MTHD(push, NV90B5, SET_SRC_ORIGIN, - NVVAL(NV90B5, SET_SRC_ORIGIN, X, copy->src.offset.x * copy->bpp) | - NVVAL(NV90B5, SET_SRC_ORIGIN, Y, copy->src.offset.y)); + P_MTHD(push, NV90B5, SET_SRC_ORIGIN); + P_NV90B5_SET_SRC_ORIGIN(push, { + .x = copy->src.offset.x * copy->bpp, + .y = copy->src.offset.y + }); } - pitch_cmd |= NVDEF(NV90B5, LAUNCH_DMA, SRC_MEMORY_LAYOUT, BLOCKLINEAR); + src_layout = NV90B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT_BLOCKLINEAR; } else { src_addr += copy->src.layer_stride; - pitch_cmd |= NVDEF(NV90B5, LAUNCH_DMA, SRC_MEMORY_LAYOUT, PITCH); + src_layout = NV90B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT_PITCH; } if (copy->dst.tile.is_tiled) { assert(copy->dst.tile.is_fermi); - PUSH_MTHD(push, NV90B5, SET_DST_BLOCK_SIZE, - NVVAL(NV90B5, SET_DST_BLOCK_SIZE, WIDTH, copy->dst.tile.x) | - NVVAL(NV90B5, SET_DST_BLOCK_SIZE, HEIGHT, copy->dst.tile.y) | - NVVAL(NV90B5, SET_DST_BLOCK_SIZE, DEPTH, copy->dst.tile.z) | - NVDEF(NV90B5, SET_DST_BLOCK_SIZE, GOB_HEIGHT, GOB_HEIGHT_FERMI_8), - - SET_DST_WIDTH, copy->dst.extent.width * copy->bpp, - SET_DST_HEIGHT, copy->dst.extent.height, - SET_DST_DEPTH, copy->dst.extent.depth, - SET_DST_LAYER, z + copy->dst.offset.z); + P_MTHD(push, NV90B5, SET_DST_BLOCK_SIZE); + P_NV90B5_SET_DST_BLOCK_SIZE(push, { + .width = copy->dst.tile.x, + .height = copy->dst.tile.y, + .depth = copy->dst.tile.z, + .gob_height = GOB_HEIGHT_GOB_HEIGHT_FERMI_8, + }); + P_NV90B5_SET_DST_WIDTH(push, copy->dst.extent.width * copy->bpp); + P_NV90B5_SET_DST_HEIGHT(push, copy->dst.extent.height); + P_NV90B5_SET_DST_DEPTH(push, copy->dst.extent.depth); + P_NV90B5_SET_DST_LAYER(push, z + copy->dst.offset.z); if (cmd->pool->dev->pdev->dev->cls >= 0xc1) { - PUSH_MTHD(push, NVC1B5, DST_ORIGIN_X, - NVVAL(NVC1B5, DST_ORIGIN_X, VALUE, copy->dst.offset.x * copy->bpp), - DST_ORIGIN_Y, - NVVAL(NVC1B5, DST_ORIGIN_Y, VALUE, copy->dst.offset.y)); + P_MTHD(push, NVC1B5, DST_ORIGIN_X); + P_NVC1B5_DST_ORIGIN_X(push, copy->dst.offset.x * copy->bpp); + P_NVC1B5_DST_ORIGIN_Y(push, copy->dst.offset.y); } else { - PUSH_MTHD(push, NV90B5, SET_DST_ORIGIN, - NVVAL(NV90B5, SET_DST_ORIGIN, X, copy->dst.offset.x * copy->bpp) | - NVVAL(NV90B5, SET_DST_ORIGIN, Y, copy->dst.offset.y)); + P_MTHD(push, NV90B5, SET_DST_ORIGIN); + P_NV90B5_SET_DST_ORIGIN(push, { + .x = copy->dst.offset.x * copy->bpp, + .y = copy->dst.offset.y + }); } - pitch_cmd |= NVDEF(NV90B5, LAUNCH_DMA, DST_MEMORY_LAYOUT, BLOCKLINEAR); + dst_layout = NV90B5_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR; } else { dst_addr += copy->dst.layer_stride; - pitch_cmd |= NVDEF(NV90B5, LAUNCH_DMA, DST_MEMORY_LAYOUT, PITCH); + dst_layout = NV90B5_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH; } - PUSH_IMMD(push, NV90B5, LAUNCH_DMA, - NVDEF(NV90B5, LAUNCH_DMA, DATA_TRANSFER_TYPE, NON_PIPELINED) | - NVDEF(NV90B5, LAUNCH_DMA, MULTI_LINE_ENABLE, TRUE) | - NVDEF(NV90B5, LAUNCH_DMA, FLUSH_ENABLE, TRUE) | - pitch_cmd); + P_IMMD(push, NV90B5, LAUNCH_DMA, { + .data_transfer_type = DATA_TRANSFER_TYPE_NON_PIPELINED, + .multi_line_enable = MULTI_LINE_ENABLE_TRUE, + .flush_enable = FLUSH_ENABLE_TRUE, + .src_memory_layout = src_layout, + .dst_memory_layout = dst_layout + }); } } diff --git a/src/nouveau/winsys/nouveau_push.h b/src/nouveau/winsys/nouveau_push.h index c06b084..970adc8 100644 --- a/src/nouveau/winsys/nouveau_push.h +++ b/src/nouveau/winsys/nouveau_push.h @@ -330,6 +330,7 @@ void nouveau_ws_push_reset(struct nouveau_ws_push *); #define SUBC_NV902D 3 #define SUBC_NV90B5 4 +#define SUBC_NVC1B5 4 static inline uint32_t NVC0_FIFO_PKHDR_SQ(int subc, int mthd, unsigned size) -- 2.7.4