From af73b21b118d5c733f51fc08647f3ac772075bd2 Mon Sep 17 00:00:00 2001 From: "Clivia.Cai" Date: Tue, 19 Apr 2022 22:18:30 -0700 Subject: [PATCH] dt-bingings:sd:update jh7110 sd dt-bingings Add clock and reset for sdio1 nodes in device tree Signed-off-by: Clivia.Cai --- arch/riscv/boot/dts/starfive/jh7110.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 6bc099d..bcfc127 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -505,8 +505,11 @@ sdio1: sdio1@16020000 { compatible = "snps,dw-mshc"; reg = <0x0 0x16020000 0x0 0x10000>; - clocks = <&dwmmc_biuclk>,<&dwmmc_ciuclk>; + clocks = <&clkgen JH7110_SDIO1_CLK_AHB>, + <&clkgen JH7110_SDIO1_CLK_SDCARD>; clock-names = "biu","ciu"; + resets = <&rstgen RSTN_U1_DW_SDIO_AHB>; + reset-names = "reset"; interrupts = <75>; fifo-depth = <32>; fifo-watermark-aligned; -- 2.7.4