From af47f60f83f7ace790eb8bc50eec37b1516c5ef8 Mon Sep 17 00:00:00 2001 From: Kai Nacke Date: Tue, 1 Apr 2014 18:35:26 +0000 Subject: [PATCH] [mips] Add Octeon cnMips instructions mtmX and mtpX Adds the Octeon cnMips instructions "load multiplier register MPLx" and "load product register Px". Includes tests. Reviews by: Daniel.Sanders@imgtec.com llvm-svn: 205343 --- llvm/lib/Target/Mips/Mips64InstrInfo.td | 8 ++++++++ llvm/lib/Target/Mips/MipsInstrFormats.td | 11 +++++++++++ llvm/test/MC/Mips/octeon-instructions.s | 12 ++++++++++++ 3 files changed, 31 insertions(+) diff --git a/llvm/lib/Target/Mips/Mips64InstrInfo.td b/llvm/lib/Target/Mips/Mips64InstrInfo.td index e44a52e..d766a4e 100644 --- a/llvm/lib/Target/Mips/Mips64InstrInfo.td +++ b/llvm/lib/Target/Mips/Mips64InstrInfo.td @@ -257,6 +257,14 @@ let Defs = [HI0, LO0, P0, P1, P2] in def DMUL : ArithLogicR<"dmul", GPR64Opnd, 1, II_DMUL, mul>, ADD_FM<0x1c, 0x03>; +// Move to multiplier/product register +def MTM0 : MoveToLOHI<"mtm0", GPR64Opnd, [MPL0, P0, P1, P2]>, MTMR_FM<0x08>; +def MTM1 : MoveToLOHI<"mtm1", GPR64Opnd, [MPL1, P0, P1, P2]>, MTMR_FM<0x0c>; +def MTM2 : MoveToLOHI<"mtm2", GPR64Opnd, [MPL2, P0, P1, P2]>, MTMR_FM<0x0d>; +def MTP0 : MoveToLOHI<"mtp0", GPR64Opnd, [P0]>, MTMR_FM<0x09>; +def MTP1 : MoveToLOHI<"mtp1", GPR64Opnd, [P1]>, MTMR_FM<0x0a>; +def MTP2 : MoveToLOHI<"mtp2", GPR64Opnd, [P2]>, MTMR_FM<0x0b>; + // Count Ones in a Word/Doubleword def POP : Count1s<"pop", GPR32Opnd>, POP_FM<0x2c>; def DPOP : Count1s<"dpop", GPR64Opnd>, POP_FM<0x2d>; diff --git a/llvm/lib/Target/Mips/MipsInstrFormats.td b/llvm/lib/Target/Mips/MipsInstrFormats.td index 09fcd5e..5b690ac 100644 --- a/llvm/lib/Target/Mips/MipsInstrFormats.td +++ b/llvm/lib/Target/Mips/MipsInstrFormats.td @@ -489,6 +489,17 @@ class WAIT_FM : StdArch { let Inst{5-0} = 0x20; } +class MTMR_FM funct> : StdArch { + bits<5> rs; + + bits<32> Inst; + + let Inst{31-26} = 0x1c; + let Inst{25-21} = rs; + let Inst{20-6} = 0; + let Inst{5-0} = funct; +} + class POP_FM funct> : StdArch { bits<5> rd; bits<5> rs; diff --git a/llvm/test/MC/Mips/octeon-instructions.s b/llvm/test/MC/Mips/octeon-instructions.s index 8c0342a..b1c065f 100644 --- a/llvm/test/MC/Mips/octeon-instructions.s +++ b/llvm/test/MC/Mips/octeon-instructions.s @@ -7,6 +7,12 @@ # CHECK: dmul $19, $24, $25 # encoding: [0x73,0x19,0x98,0x03] # CHECK: dpop $9, $6 # encoding: [0x70,0xc0,0x48,0x2d] # CHECK: dpop $15, $22 # encoding: [0x72,0xc0,0x78,0x2d] +# CHECK: mtm0 $15 # encoding: [0x71,0xe0,0x00,0x08] +# CHECK: mtm1 $16 # encoding: [0x72,0x00,0x00,0x0c] +# CHECK: mtm2 $17 # encoding: [0x72,0x20,0x00,0x0d] +# CHECK: mtp0 $18 # encoding: [0x72,0x40,0x00,0x09] +# CHECK: mtp1 $19 # encoding: [0x72,0x60,0x00,0x0a] +# CHECK: mtp2 $20 # encoding: [0x72,0x80,0x00,0x0b] # CHECK: pop $9, $6 # encoding: [0x70,0xc0,0x48,0x2c] # CHECK: pop $8, $19 # encoding: [0x72,0x60,0x40,0x2c] # CHECK: seq $25, $23, $24 # encoding: [0x72,0xf8,0xc8,0x2a] @@ -19,6 +25,12 @@ dmul $19, $24, $25 dpop $9, $6 dpop $15, $22 + mtm0 $15 + mtm1 $16 + mtm2 $17 + mtp0 $18 + mtp1 $19 + mtp2 $20 pop $9, $6 pop $8, $19 seq $25, $23, $24 -- 2.7.4