From aef7ea868fe55f2eb0bcedaeecdc76d54a611106 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Sun, 28 Aug 2022 20:50:42 -0400 Subject: [PATCH] ac/gpu_info: handle LPDDR4 and 5 in ac_memory_ops_per_clock and update amdgpu_drm.h Fixes: 50238f495869ce5 - amd/common: Remove redundant code for determining memory ops per clock Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7163 Reviewed-by: Pierre-Eric Pelloux-Prayer Part-of: --- include/drm-uapi/amdgpu_drm.h | 6 ++++++ src/amd/common/ac_gpu_info.c | 19 +++++++++++-------- 2 files changed, 17 insertions(+), 8 deletions(-) diff --git a/include/drm-uapi/amdgpu_drm.h b/include/drm-uapi/amdgpu_drm.h index bb50644..c2c9c67 100644 --- a/include/drm-uapi/amdgpu_drm.h +++ b/include/drm-uapi/amdgpu_drm.h @@ -559,6 +559,10 @@ struct drm_amdgpu_gem_va { #define AMDGPU_HW_IP_VCE 4 #define AMDGPU_HW_IP_UVD_ENC 5 #define AMDGPU_HW_IP_VCN_DEC 6 +/* + * From VCN4, AMDGPU_HW_IP_VCN_ENC is re-used to support + * both encoding and decoding jobs. + */ #define AMDGPU_HW_IP_VCN_ENC 7 #define AMDGPU_HW_IP_VCN_JPEG 8 #define AMDGPU_HW_IP_NUM 9 @@ -994,6 +998,8 @@ struct drm_amdgpu_info_vbios { #define AMDGPU_VRAM_TYPE_DDR4 8 #define AMDGPU_VRAM_TYPE_GDDR6 9 #define AMDGPU_VRAM_TYPE_DDR5 10 +#define AMDGPU_VRAM_TYPE_LPDDR4 11 +#define AMDGPU_VRAM_TYPE_LPDDR5 12 struct drm_amdgpu_info_device { /** PCI Device ID */ diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index 37c8cff..7293bd1 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -86,6 +86,8 @@ #define AMDGPU_VRAM_TYPE_DDR4 8 #define AMDGPU_VRAM_TYPE_GDDR6 9 #define AMDGPU_VRAM_TYPE_DDR5 10 +#define AMDGPU_VRAM_TYPE_LPDDR4 11 +#define AMDGPU_VRAM_TYPE_LPDDR5 12 struct drm_amdgpu_heap_info { uint64_t total_heap_size; @@ -1998,22 +2000,23 @@ uint32_t ac_memory_ops_per_clock(uint32_t vram_type) { /* Based on MemoryOpsPerClockTable from PAL. */ switch (vram_type) { + case AMDGPU_VRAM_TYPE_GDDR1: + case AMDGPU_VRAM_TYPE_GDDR3: /* last in low-end Evergreen */ + case AMDGPU_VRAM_TYPE_GDDR4: /* last in R7xx, not used much */ case AMDGPU_VRAM_TYPE_UNKNOWN: + default: return 0; case AMDGPU_VRAM_TYPE_DDR2: case AMDGPU_VRAM_TYPE_DDR3: - case AMDGPU_VRAM_TYPE_DDR4: /* same for LPDDR4 */ + case AMDGPU_VRAM_TYPE_DDR4: + case AMDGPU_VRAM_TYPE_LPDDR4: case AMDGPU_VRAM_TYPE_HBM: /* same for HBM2 and HBM3 */ return 2; - case AMDGPU_VRAM_TYPE_DDR5: /* same for LPDDR5 */ - case AMDGPU_VRAM_TYPE_GDDR5: + case AMDGPU_VRAM_TYPE_DDR5: + case AMDGPU_VRAM_TYPE_LPDDR5: + case AMDGPU_VRAM_TYPE_GDDR5: /* last in Polaris and low-end Navi14 */ return 4; case AMDGPU_VRAM_TYPE_GDDR6: return 16; - case AMDGPU_VRAM_TYPE_GDDR1: - case AMDGPU_VRAM_TYPE_GDDR3: - case AMDGPU_VRAM_TYPE_GDDR4: - default: - unreachable("Invalid vram type"); } } -- 2.7.4