From ae2b14c73cd42b067e9687219155ed044210f0c1 Mon Sep 17 00:00:00 2001 From: Jim Wilson Date: Sat, 30 Mar 2019 10:12:12 -0700 Subject: [PATCH] RISC-V: Relax tail/j to c.j for RV64. 2019-03-30 Andrew Waterman bfd/ * elfnn-riscv.c (_bfd_riscv_relax_call): Only check ARCH_SIZE for rd == X_RA case. --- bfd/ChangeLog | 5 +++++ bfd/elfnn-riscv.c | 7 +++++-- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 6662b70..2c630be 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,8 @@ +2019-03-30 Andrew Waterman + + * elfnn-riscv.c (_bfd_riscv_relax_call): Only check ARCH_SIZE for + rd == X_RA case. + 2019-03-29 Max Filippov * elf32-xtensa.c (shrink_dynamic_reloc_sections): Add diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c index bb114e5..dba1025 100644 --- a/bfd/elfnn-riscv.c +++ b/bfd/elfnn-riscv.c @@ -3416,9 +3416,12 @@ _bfd_riscv_relax_call (bfd *abfd, asection *sec, asection *sym_sec, auipc = bfd_get_32 (abfd, contents + rel->r_offset); jalr = bfd_get_32 (abfd, contents + rel->r_offset + 4); rd = (jalr >> OP_SH_RD) & OP_MASK_RD; - rvc = rvc && VALID_RVC_J_IMM (foff) && ARCH_SIZE == 32; + rvc = rvc && VALID_RVC_J_IMM (foff); - if (rvc && (rd == 0 || rd == X_RA)) + /* C.J exists on RV32 and RV64, but C.JAL is RV32-only. */ + rvc = rvc && (rd == 0 || (rd == X_RA && ARCH_SIZE == 32)); + + if (rvc) { /* Relax to C.J[AL] rd, addr. */ r_type = R_RISCV_RVC_JUMP; -- 2.7.4