From adab80720da3f1b59cedadbfacfa5fc014184bee Mon Sep 17 00:00:00 2001
From: Colin LeMahieu <colinl@codeaurora.org>
Date: Thu, 11 Dec 2014 17:08:21 +0000
Subject: [PATCH] [Hexagon] Ading i64 <- i32, i32 sextw pattern.

llvm-svn: 224027
---
 llvm/lib/Target/Hexagon/HexagonInstrInfo.td | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/llvm/lib/Target/Hexagon/HexagonInstrInfo.td b/llvm/lib/Target/Hexagon/HexagonInstrInfo.td
index c936390..66b3412 100644
--- a/llvm/lib/Target/Hexagon/HexagonInstrInfo.td
+++ b/llvm/lib/Target/Hexagon/HexagonInstrInfo.td
@@ -2226,6 +2226,8 @@ class T_S2op_1_di <string mnemonic, bits<2> MajOp, bits<3> MinOp>
 let isCodeGenOnly = 0 in
 def A2_sxtw   : T_S2op_1_di <"sxtw", 0b01, 0b000>;
 
+def: Pat <(i64 (sext I32:$src)), (A2_sxtw I32:$src)>;
+
 //===----------------------------------------------------------------------===//
 // STYPE/ALU -
 //===----------------------------------------------------------------------===//
-- 
2.7.4