From ada4ee7cb8ffff844ade2611aa0475728c1fd17a Mon Sep 17 00:00:00 2001 From: Arthur Eubanks Date: Wed, 29 Jul 2020 16:43:57 -0700 Subject: [PATCH] [NewPM][opt] Add more codegen passes Reduces number of failures by 92. Reviewed By: ychen Differential Revision: https://reviews.llvm.org/D85381 --- llvm/tools/opt/opt.cpp | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/llvm/tools/opt/opt.cpp b/llvm/tools/opt/opt.cpp index e42c90e..3b20d12 100644 --- a/llvm/tools/opt/opt.cpp +++ b/llvm/tools/opt/opt.cpp @@ -491,14 +491,21 @@ struct TimeTracerRAII { // it exists. static bool IsCodegenPass(StringRef Pass) { std::vector PassNamePrefix = { - "x86-", "xcore-", "wasm-", "systemz-", "ppc-", "nvvm-", - "nvptx-", "mips-", "lanai-", "hexagon-", "bpf-", "avr-", - "thumb2-", "arm-", "si-", "gcn-", "amdgpu-", "aarch64-"}; + "x86-", "xcore-", "wasm-", "systemz-", "ppc-", "nvvm-", "nvptx-", + "mips-", "lanai-", "hexagon-", "bpf-", "avr-", "thumb2-", "arm-", + "si-", "gcn-", "amdgpu-", "aarch64-", "amdgcn-"}; std::vector PassNameContain = {"ehprepare"}; std::vector PassNameExact = { "safe-stack", "cost-model", "codegenprepare", "interleaved-load-combine", - "unreachableblockelim", "sclaraized-masked-mem-intrin"}; + "unreachableblockelim", "scalarize-masked-mem-intrin", + "verify-safepoint-ir", "divergence", + "infer-address-spaces", "atomic-expand", + "hardware-loops", "type-promotion", + "mve-tail-predication", "interleaved-access", + "global-merge", "pre-isel-intrinsic-lowering", + "expand-reductions", "indirectbr-expand", + "generic-to-nvvm", "expandmemcmp"}; for (const auto &P : PassNamePrefix) if (Pass.startswith(P)) return true; -- 2.7.4