From ad7a69db52391cf141d0f6da6042a5fc7d8d54c3 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Fri, 25 Nov 2016 19:56:50 +0100 Subject: [PATCH] re PR rtl-optimization/78526 (ICE: in decompose, at rtl.h:2117 with -g -mavx512bw) PR rtl-optimization/78526 * simplify-rtx.c (simplify_immed_subreg): Don't use wi::extract_uhwi beyond val's precision. * gcc.dg/pr78526.c: New test. From-SVN: r242882 --- gcc/ChangeLog | 4 ++++ gcc/simplify-rtx.c | 3 ++- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.dg/pr78526.c | 21 +++++++++++++++++++++ 4 files changed, 32 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.dg/pr78526.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 947f8f6..bd9929b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,9 @@ 2016-11-25 Jakub Jelinek + PR rtl-optimization/78526 + * simplify-rtx.c (simplify_immed_subreg): Don't use wi::extract_uhwi + beyond val's precision. + PR rtl-optimization/78527 * combine.c (make_compound_operation_int): Ignore LSHIFTRT with out of bounds shift count. diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index fde2443..f6131d4 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -5740,8 +5740,9 @@ simplify_immed_subreg (machine_mode outermode, rtx op, { rtx_mode_t val = rtx_mode_t (el, innermode); unsigned char extend = wi::sign_mask (val); + int prec = wi::get_precision (val); - for (i = 0; i < elem_bitsize; i += value_bit) + for (i = 0; i < prec && i < elem_bitsize; i += value_bit) *vp++ = wi::extract_uhwi (val, i, value_bit); for (; i < elem_bitsize; i += value_bit) *vp++ = extend; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 2b58305..1dd7380 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2016-11-25 Jakub Jelinek + + PR rtl-optimization/78526 + * gcc.dg/pr78526.c: New test. + 2016-11-25 Vladimir Makarov PR rtl-optimization/77541 diff --git a/gcc/testsuite/gcc.dg/pr78526.c b/gcc/testsuite/gcc.dg/pr78526.c new file mode 100644 index 0000000..560e146 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr78526.c @@ -0,0 +1,21 @@ +/* PR rtl-optimization/78526 */ +/* { dg-do compile { target int128 } } */ +/* { dg-options "-O -fno-tree-ccp -fno-tree-sra -g -w" } */ +/* { dg-additional-options "-mavx512bw" { target i?86-*-* x86_64-*-* } } */ + +typedef unsigned U __attribute__ ((vector_size (64))); +typedef unsigned __int128 V __attribute__ ((vector_size (64))); + +static inline V +bar (U u, U x, V v) +{ + v = (V)(U) { 0, ~0 }; + v[x[0]] <<= u[-63]; + return v; +} + +V +foo (U u) +{ + return bar (u, (U) {}, (V) {}); +} -- 2.7.4