From ad5cc915c300d4ea733da80ae714fdad3787af54 Mon Sep 17 00:00:00 2001 From: =?utf8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= Date: Wed, 2 Nov 2022 15:06:10 -0400 Subject: [PATCH] arm64: dts: mediatek: asurada: Enable audio support MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Enable audio support for the Asurada platform. This consists of the machine sound card, the rt1015p codec for the speakers, the rt5682 codec for the headset, and the dmic codec for the internal microphone. Newer revisions of spherion and hayato use the rt5682s codec for the headset instead, so the codecs and card compatible are added through separate dtsi files to prepare for that. HDMI audio support is left out for now since the DisplayPort chip required isn't enabled yet. Tested-by: Chen-Yu Tsai Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20221102190611.283546-5-nfraprado@collabora.com Signed-off-by: Matthias Brugger --- .../mt8192-asurada-audio-rt1015p-rt5682.dtsi | 19 ++ .../dts/mediatek/mt8192-asurada-audio-rt1015p.dtsi | 26 +++ .../dts/mediatek/mt8192-asurada-audio-rt5682.dtsi | 21 ++ .../boot/dts/mediatek/mt8192-asurada-hayato-r1.dts | 1 + .../dts/mediatek/mt8192-asurada-spherion-r0.dts | 1 + arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 245 +++++++++++++++++++++ 6 files changed, 313 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8192-asurada-audio-rt1015p-rt5682.dtsi create mode 100644 arch/arm64/boot/dts/mediatek/mt8192-asurada-audio-rt1015p.dtsi create mode 100644 arch/arm64/boot/dts/mediatek/mt8192-asurada-audio-rt5682.dtsi diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-audio-rt1015p-rt5682.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada-audio-rt1015p-rt5682.dtsi new file mode 100644 index 0000000..f521f50 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada-audio-rt1015p-rt5682.dtsi @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2020 Google LLC + */ + +#include "mt8192-asurada-audio-rt5682.dtsi" +#include "mt8192-asurada-audio-rt1015p.dtsi" + +&sound { + compatible = "mediatek,mt8192_mt6359_rt1015p_rt5682"; + + speaker-codecs { + sound-dai = <&rt1015p>; + }; + + headset-codec { + sound-dai = <&rt5682 0>; + }; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-audio-rt1015p.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada-audio-rt1015p.dtsi new file mode 100644 index 0000000..e574378 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada-audio-rt1015p.dtsi @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2022 MediaTek Inc. + */ + +#include +#include + +/ { + rt1015p: audio-codec { + compatible = "realtek,rt1015p"; + pinctrl-names = "default"; + pinctrl-0 = <&rt1015p_pins>; + sdb-gpios = <&pio 147 GPIO_ACTIVE_HIGH>; + #sound-dai-cells = <0>; + }; +}; + +&pio { + rt1015p_pins: rt1015p-default-pins { + pins { + pinmux = ; + output-low; + }; + }; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-audio-rt5682.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada-audio-rt5682.dtsi new file mode 100644 index 0000000..05e48b8 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada-audio-rt5682.dtsi @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2022 MediaTek Inc. + */ + +&i2c1 { + rt5682: audio-codec@1a { + compatible = "realtek,rt5682i"; + reg = <0x1a>; + interrupts-extended = <&pio 18 IRQ_TYPE_LEVEL_LOW>; + realtek,jd-src = <1>; + realtek,btndet-delay = <16>; + #sound-dai-cells = <1>; + + AVDD-supply = <&mt6359_vio18_ldo_reg>; + DBVDD-supply = <&mt6359_vio18_ldo_reg>; + LDO1-IN-supply = <&mt6359_vio18_ldo_reg>; + MICVDD-supply = <&pp3300_g>; + VBAT-supply = <&pp3300_ldo_z>; + }; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts b/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts index 1e91491..43a8239 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts @@ -4,6 +4,7 @@ */ /dts-v1/; #include "mt8192-asurada.dtsi" +#include "mt8192-asurada-audio-rt1015p-rt5682.dtsi" / { model = "Google Hayato rev1"; diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts b/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts index fa3d957..c6ad10c 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts @@ -4,6 +4,7 @@ */ /dts-v1/; #include "mt8192-asurada.dtsi" +#include "mt8192-asurada-audio-rt1015p-rt5682.dtsi" #include / { diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index ace4482..ce9e434 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -33,6 +33,12 @@ default-brightness-level = <576>; }; + dmic_codec: dmic-codec { + compatible = "dmic-codec"; + num-channels = <2>; + wakeup-delay-ms = <50>; + }; + pp1000_dpbrdg: regulator-1v0-dpbrdg { compatible = "regulator-fixed"; regulator-name = "pp1000_dpbrdg"; @@ -196,6 +202,62 @@ reg = <0 0xc0000000 0 0x4000000>; }; }; + + sound: sound { + mediatek,platform = <&afe>; + pinctrl-names = "aud_clk_mosi_off", + "aud_clk_mosi_on", + "aud_dat_mosi_off", + "aud_dat_mosi_on", + "aud_dat_miso_off", + "aud_dat_miso_on", + "vow_dat_miso_off", + "vow_dat_miso_on", + "vow_clk_miso_off", + "vow_clk_miso_on", + "aud_nle_mosi_off", + "aud_nle_mosi_on", + "aud_dat_miso2_off", + "aud_dat_miso2_on", + "aud_gpio_i2s3_off", + "aud_gpio_i2s3_on", + "aud_gpio_i2s8_off", + "aud_gpio_i2s8_on", + "aud_gpio_i2s9_off", + "aud_gpio_i2s9_on", + "aud_dat_mosi_ch34_off", + "aud_dat_mosi_ch34_on", + "aud_dat_miso_ch34_off", + "aud_dat_miso_ch34_on", + "aud_gpio_tdm_off", + "aud_gpio_tdm_on"; + pinctrl-0 = <&aud_clk_mosi_off_pins>; + pinctrl-1 = <&aud_clk_mosi_on_pins>; + pinctrl-2 = <&aud_dat_mosi_off_pins>; + pinctrl-3 = <&aud_dat_mosi_on_pins>; + pinctrl-4 = <&aud_dat_miso_off_pins>; + pinctrl-5 = <&aud_dat_miso_on_pins>; + pinctrl-6 = <&vow_dat_miso_off_pins>; + pinctrl-7 = <&vow_dat_miso_on_pins>; + pinctrl-8 = <&vow_clk_miso_off_pins>; + pinctrl-9 = <&vow_clk_miso_on_pins>; + pinctrl-10 = <&aud_nle_mosi_off_pins>; + pinctrl-11 = <&aud_nle_mosi_on_pins>; + pinctrl-12 = <&aud_dat_miso2_off_pins>; + pinctrl-13 = <&aud_dat_miso2_on_pins>; + pinctrl-14 = <&aud_gpio_i2s3_off_pins>; + pinctrl-15 = <&aud_gpio_i2s3_on_pins>; + pinctrl-16 = <&aud_gpio_i2s8_off_pins>; + pinctrl-17 = <&aud_gpio_i2s8_on_pins>; + pinctrl-18 = <&aud_gpio_i2s9_off_pins>; + pinctrl-19 = <&aud_gpio_i2s9_on_pins>; + pinctrl-20 = <&aud_dat_mosi_ch34_off_pins>; + pinctrl-21 = <&aud_dat_mosi_ch34_on_pins>; + pinctrl-22 = <&aud_dat_miso_ch34_off_pins>; + pinctrl-23 = <&aud_dat_miso_ch34_on_pins>; + pinctrl-24 = <&aud_gpio_tdm_off_pins>; + pinctrl-25 = <&aud_gpio_tdm_on_pins>; + }; }; &dsi0 { @@ -660,6 +722,165 @@ }; }; + aud_clk_mosi_off_pins: aud-clk-mosi-off-pins { + pins-mosi-off { + pinmux = , + ; + }; + }; + + aud_clk_mosi_on_pins: aud-clk-mosi-on-pins { + pins-mosi-on { + pinmux = , + ; + drive-strength = <10>; + }; + }; + + aud_dat_miso_ch34_off_pins: aud-dat-miso-ch34-off-pins { + pins-miso-off { + pinmux = ; + }; + }; + + aud_dat_miso_ch34_on_pins: aud-dat-miso-ch34-on-pins { + pins-miso-on { + pinmux = ; + }; + }; + + aud_dat_miso_off_pins: aud-dat-miso-off-pins { + pins-miso-off { + pinmux = , + ; + }; + }; + + aud_dat_miso_on_pins: aud-dat-miso-on-pins { + pins-miso-on { + pinmux = , + ; + drive-strength = <10>; + }; + }; + + aud_dat_miso2_off_pins: aud-dat-miso2-off-pins { + pins-miso-off { + pinmux = ; + }; + }; + + aud_dat_miso2_on_pins: aud-dat-miso2-on-pins { + pins-miso-on { + pinmux = ; + }; + }; + + aud_dat_mosi_ch34_off_pins: aud-dat-mosi-ch34-off-pins { + pins-mosi-off { + pinmux = ; + }; + }; + + aud_dat_mosi_ch34_on_pins: aud-dat-mosi-ch34-on-pins { + pins-mosi-on { + pinmux = ; + }; + }; + + aud_dat_mosi_off_pins: aud-dat-mosi-off-pins { + pins-mosi-off { + pinmux = , + ; + }; + }; + + aud_dat_mosi_on_pins: aud-dat-mosi-on-pins { + pins-mosi-on { + pinmux = , + ; + drive-strength = <10>; + }; + }; + + aud_gpio_i2s3_off_pins: aud-gpio-i2s3-off-pins { + pins-i2s3-off { + pinmux = , + , + ; + }; + }; + + aud_gpio_i2s3_on_pins: aud-gpio-i2s3-on-pins { + pins-i2s3-on { + pinmux = , + , + ; + }; + }; + + aud_gpio_i2s8_off_pins: aud-gpio-i2s8-off-pins { + pins-i2s8-off { + pinmux = , + , + , + ; + }; + }; + + aud_gpio_i2s8_on_pins: aud-gpio-i2s8-on-pins { + pins-i2s8-on { + pinmux = , + , + , + ; + }; + }; + + aud_gpio_i2s9_off_pins: aud-gpio-i2s9-off-pins { + pins-i2s9-off { + pinmux = ; + }; + }; + + aud_gpio_i2s9_on_pins: aud-gpio-i2s9-on-pins { + pins-i2s9-on { + pinmux = ; + }; + }; + + aud_gpio_tdm_off_pins: aud-gpio-tdm-off-pins { + pins-tdm-off { + pinmux = , + , + , + ; + }; + }; + + aud_gpio_tdm_on_pins: aud-gpio-tdm-on-pins { + pins-tdm-on { + pinmux = , + , + , + ; + }; + }; + + aud_nle_mosi_off_pins: aud-nle-mosi-off-pins { + pins-nle-mosi-off { + pinmux = , + ; + }; + }; + + aud_nle_mosi_on_pins: aud-nle-mosi-on-pins { + pins-nle-mosi-on { + pinmux = , + ; + }; + }; + cr50_int: cr50-irq-default-pins { pins-gsc-ap-int-odl { pinmux = ; @@ -987,6 +1208,30 @@ output-low; }; }; + + vow_clk_miso_off_pins: vow-clk-miso-off-pins { + pins-miso-off { + pinmux = ; + }; + }; + + vow_clk_miso_on_pins: vow-clk-miso-on-pins { + pins-miso-on { + pinmux = ; + }; + }; + + vow_dat_miso_off_pins: vow-dat-miso-off-pins { + pins-miso-off { + pinmux = ; + }; + }; + + vow_dat_miso_on_pins: vow-dat-miso-on-pins { + pins-miso-on { + pinmux = ; + }; + }; }; &pmic { -- 2.7.4