From ad27f54c97dd702291502d380f13d8744acb2884 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Sun, 8 Nov 2020 13:30:18 +0000 Subject: [PATCH] [PhaseOrdering] Remove unused check-prefixes Just use default CHECK in most cases. --- .../d83507-knowledge-retention-bug.ll | 28 ++++----- .../inlining-alignment-assumptions.ll | 6 +- .../PhaseOrdering/instcombine-sroa-inttoptr.ll | 4 +- .../loop-rotation-vs-common-code-hoisting.ll | 16 ++--- llvm/test/Transforms/PhaseOrdering/minmax.ll | 28 ++++----- .../PhaseOrdering/reassociate-after-unroll.ll | 4 +- llvm/test/Transforms/PhaseOrdering/rotate.ll | 12 ++-- .../PhaseOrdering/simplifycfg-options.ll | 68 +++++++++++----------- .../Transforms/PhaseOrdering/two-shifts-by-sext.ll | 6 +- .../unsigned-multiply-overflow-check.ll | 42 ++----------- llvm/test/Transforms/PhaseOrdering/vector-trunc.ll | 10 ++-- 11 files changed, 97 insertions(+), 127 deletions(-) diff --git a/llvm/test/Transforms/PhaseOrdering/d83507-knowledge-retention-bug.ll b/llvm/test/Transforms/PhaseOrdering/d83507-knowledge-retention-bug.ll index d0f85cd..578f9f7 100644 --- a/llvm/test/Transforms/PhaseOrdering/d83507-knowledge-retention-bug.ll +++ b/llvm/test/Transforms/PhaseOrdering/d83507-knowledge-retention-bug.ll @@ -1,22 +1,22 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -O1 -enable-knowledge-retention -S < %s | FileCheck %s --check-prefixes=ANY,OLDPM -; RUN: opt -passes='default' -enable-knowledge-retention -S < %s | FileCheck %s --check-prefixes=ANY,NEWPM +; RUN: opt -O1 -enable-knowledge-retention -S < %s | FileCheck %s +; RUN: opt -passes='default' -enable-knowledge-retention -S < %s | FileCheck %s %0 = type { %0* } define %0* @f1() local_unnamed_addr { -; ANY-LABEL: @f1( -; ANY-NEXT: bb: -; ANY-NEXT: br label [[BB3:%.*]] -; ANY: bb3: -; ANY-NEXT: [[I1:%.*]] = phi %0* [ [[I5:%.*]], [[BB3]] ], [ undef, [[BB:%.*]] ] -; ANY-NEXT: call void @llvm.assume(i1 true) [ "nonnull"(%0* [[I1]]) ] -; ANY-NEXT: [[I4:%.*]] = getelementptr inbounds [[TMP0:%.*]], %0* [[I1]], i64 0, i32 0 -; ANY-NEXT: [[I5]] = load %0*, %0** [[I4]], align 8 -; ANY-NEXT: [[I2:%.*]] = icmp eq %0* [[I5]], null -; ANY-NEXT: br i1 [[I2]], label [[BB6:%.*]], label [[BB3]] -; ANY: bb6: -; ANY-NEXT: ret %0* undef +; CHECK-LABEL: @f1( +; CHECK-NEXT: bb: +; CHECK-NEXT: br label [[BB3:%.*]] +; CHECK: bb3: +; CHECK-NEXT: [[I1:%.*]] = phi %0* [ [[I5:%.*]], [[BB3]] ], [ undef, [[BB:%.*]] ] +; CHECK-NEXT: call void @llvm.assume(i1 true) [ "nonnull"(%0* [[I1]]) ] +; CHECK-NEXT: [[I4:%.*]] = getelementptr inbounds [[TMP0:%.*]], %0* [[I1]], i64 0, i32 0 +; CHECK-NEXT: [[I5]] = load %0*, %0** [[I4]], align 8 +; CHECK-NEXT: [[I2:%.*]] = icmp eq %0* [[I5]], null +; CHECK-NEXT: br i1 [[I2]], label [[BB6:%.*]], label [[BB3]] +; CHECK: bb6: +; CHECK-NEXT: ret %0* undef ; bb: br label %bb1 diff --git a/llvm/test/Transforms/PhaseOrdering/inlining-alignment-assumptions.ll b/llvm/test/Transforms/PhaseOrdering/inlining-alignment-assumptions.ll index 2605701..59243a9 100644 --- a/llvm/test/Transforms/PhaseOrdering/inlining-alignment-assumptions.ll +++ b/llvm/test/Transforms/PhaseOrdering/inlining-alignment-assumptions.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -S -O2 -preserve-alignment-assumptions-during-inlining=0 < %s | FileCheck %s --check-prefixes=CHECK,ASSUMPTIONS-OFF,FALLBACK-0 -; RUN: opt -S -O2 -preserve-alignment-assumptions-during-inlining=1 < %s | FileCheck %s --check-prefixes=CHECK,ASSUMPTIONS-ON,FALLBACK-1 -; RUN: opt -S -O2 < %s | FileCheck %s --check-prefixes=CHECK,ASSUMPTIONS-OFF,FALLBACK-DEFAULT +; RUN: opt -S -O2 -preserve-alignment-assumptions-during-inlining=0 < %s | FileCheck %s --check-prefixes=CHECK,ASSUMPTIONS-OFF +; RUN: opt -S -O2 -preserve-alignment-assumptions-during-inlining=1 < %s | FileCheck %s --check-prefixes=CHECK,ASSUMPTIONS-ON +; RUN: opt -S -O2 < %s | FileCheck %s --check-prefixes=CHECK,ASSUMPTIONS-OFF target datalayout = "e-p:64:64-p5:32:32-A5" diff --git a/llvm/test/Transforms/PhaseOrdering/instcombine-sroa-inttoptr.ll b/llvm/test/Transforms/PhaseOrdering/instcombine-sroa-inttoptr.ll index 3308a0e..d8cf0cb 100644 --- a/llvm/test/Transforms/PhaseOrdering/instcombine-sroa-inttoptr.ll +++ b/llvm/test/Transforms/PhaseOrdering/instcombine-sroa-inttoptr.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt < %s -O3 -S | FileCheck %s --check-prefixes=CHECK,OLDPM -; RUN: opt < %s -passes='default' -aa-pipeline=default -S | FileCheck %s --check-prefixes=CHECK,NEWPM +; RUN: opt < %s -O3 -S | FileCheck %s +; RUN: opt < %s -passes='default' -aa-pipeline=default -S | FileCheck %s ; This is based on the following most basic C++ code: ; diff --git a/llvm/test/Transforms/PhaseOrdering/loop-rotation-vs-common-code-hoisting.ll b/llvm/test/Transforms/PhaseOrdering/loop-rotation-vs-common-code-hoisting.ll index 817243c..7d7d18a 100644 --- a/llvm/test/Transforms/PhaseOrdering/loop-rotation-vs-common-code-hoisting.ll +++ b/llvm/test/Transforms/PhaseOrdering/loop-rotation-vs-common-code-hoisting.ll @@ -1,15 +1,15 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -O3 -rotation-max-header-size=0 -S -enable-new-pm=0 < %s | FileCheck %s --check-prefixes=HOIST,THR0,FALLBACK0 -; RUN: opt -passes='default' -rotation-max-header-size=0 -S < %s | FileCheck %s --check-prefixes=HOIST,THR0,FALLBACK1 +; RUN: opt -O3 -rotation-max-header-size=0 -S -enable-new-pm=0 < %s | FileCheck %s --check-prefix=HOIST +; RUN: opt -passes='default' -rotation-max-header-size=0 -S < %s | FileCheck %s --check-prefix=HOIST -; RUN: opt -O3 -rotation-max-header-size=1 -S -enable-new-pm=0 < %s | FileCheck %s --check-prefixes=HOIST,THR1,FALLBACK2 -; RUN: opt -passes='default' -rotation-max-header-size=1 -S < %s | FileCheck %s --check-prefixes=HOIST,THR1,FALLBACK3 +; RUN: opt -O3 -rotation-max-header-size=1 -S -enable-new-pm=0 < %s | FileCheck %s --check-prefix=HOIST +; RUN: opt -passes='default' -rotation-max-header-size=1 -S < %s | FileCheck %s --check-prefix=HOIST -; RUN: opt -O3 -rotation-max-header-size=2 -S -enable-new-pm=0 < %s | FileCheck %s --check-prefixes=ROTATED_LATER,ROTATED_LATER_OLDPM,FALLBACK4 -; RUN: opt -passes='default' -rotation-max-header-size=2 -S < %s | FileCheck %s --check-prefixes=ROTATED_LATER,ROTATED_LATER_NEWPM,FALLBACK5 +; RUN: opt -O3 -rotation-max-header-size=2 -S -enable-new-pm=0 < %s | FileCheck %s --check-prefix=ROTATED_LATER_OLDPM +; RUN: opt -passes='default' -rotation-max-header-size=2 -S < %s | FileCheck %s --check-prefix=ROTATED_LATER_NEWPM -; RUN: opt -O3 -rotation-max-header-size=3 -S -enable-new-pm=0 < %s | FileCheck %s --check-prefixes=ROTATE,ROTATE_OLDPM,FALLBACK6 -; RUN: opt -passes='default' -rotation-max-header-size=3 -S < %s | FileCheck %s --check-prefixes=ROTATE,ROTATE_NEWPM,FALLBACK7 +; RUN: opt -O3 -rotation-max-header-size=3 -S -enable-new-pm=0 < %s | FileCheck %s --check-prefix=ROTATE_OLDPM +; RUN: opt -passes='default' -rotation-max-header-size=3 -S < %s | FileCheck %s --check-prefix=ROTATE_NEWPM ; This example is produced from a very basic C code: ; diff --git a/llvm/test/Transforms/PhaseOrdering/minmax.ll b/llvm/test/Transforms/PhaseOrdering/minmax.ll index 6ddf491..f241800 100644 --- a/llvm/test/Transforms/PhaseOrdering/minmax.ll +++ b/llvm/test/Transforms/PhaseOrdering/minmax.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -O1 -S < %s | FileCheck %s --check-prefixes=ANY,OLDPM -; RUN: opt -passes='default' -S < %s | FileCheck %s --check-prefixes=ANY,NEWPM +; RUN: opt -O1 -S < %s | FileCheck %s +; RUN: opt -passes='default' -S < %s | FileCheck %s ; This is an important benchmark for color-space-conversion. ; It should reduce to contain only 1 'not' op. @@ -8,18 +8,18 @@ declare void @use(i8, i8, i8, i8) define void @cmyk(i8 %r, i8 %g, i8 %b) { -; ANY-LABEL: @cmyk( -; ANY-NEXT: entry: -; ANY-NEXT: [[TMP0:%.*]] = icmp sgt i8 [[R:%.*]], [[B:%.*]] -; ANY-NEXT: [[TMP1:%.*]] = select i1 [[TMP0]], i8 [[R]], i8 [[B]] -; ANY-NEXT: [[TMP2:%.*]] = icmp sgt i8 [[TMP1]], [[G:%.*]] -; ANY-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i8 [[TMP1]], i8 [[G]] -; ANY-NEXT: [[TMP4:%.*]] = xor i8 [[TMP3]], -1 -; ANY-NEXT: [[SUB31:%.*]] = sub i8 [[TMP3]], [[R]] -; ANY-NEXT: [[SUB35:%.*]] = sub i8 [[TMP3]], [[G]] -; ANY-NEXT: [[SUB39:%.*]] = sub i8 [[TMP3]], [[B]] -; ANY-NEXT: call void @use(i8 [[SUB31]], i8 [[SUB35]], i8 [[SUB39]], i8 [[TMP4]]) -; ANY-NEXT: ret void +; CHECK-LABEL: @cmyk( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = icmp sgt i8 [[R:%.*]], [[B:%.*]] +; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[TMP0]], i8 [[R]], i8 [[B]] +; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i8 [[TMP1]], [[G:%.*]] +; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i8 [[TMP1]], i8 [[G]] +; CHECK-NEXT: [[TMP4:%.*]] = xor i8 [[TMP3]], -1 +; CHECK-NEXT: [[SUB31:%.*]] = sub i8 [[TMP3]], [[R]] +; CHECK-NEXT: [[SUB35:%.*]] = sub i8 [[TMP3]], [[G]] +; CHECK-NEXT: [[SUB39:%.*]] = sub i8 [[TMP3]], [[B]] +; CHECK-NEXT: call void @use(i8 [[SUB31]], i8 [[SUB35]], i8 [[SUB39]], i8 [[TMP4]]) +; CHECK-NEXT: ret void ; entry: %conv = sext i8 %r to i32 diff --git a/llvm/test/Transforms/PhaseOrdering/reassociate-after-unroll.ll b/llvm/test/Transforms/PhaseOrdering/reassociate-after-unroll.ll index ed1c182..20333a5 100644 --- a/llvm/test/Transforms/PhaseOrdering/reassociate-after-unroll.ll +++ b/llvm/test/Transforms/PhaseOrdering/reassociate-after-unroll.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; REQUIRES: powerpc-registered-target -; RUN: opt -O2 -enable-new-pm=0 -S < %s | FileCheck %s --check-prefixes=CHECK,OLDPM -; RUN: opt -passes='default' -S < %s | FileCheck %s --check-prefixes=CHECK,NEWPM +; RUN: opt -O2 -enable-new-pm=0 -S < %s | FileCheck %s --check-prefix=OLDPM +; RUN: opt -passes='default' -S < %s | FileCheck %s --check-prefix=NEWPM target datalayout = "e-m:e-i64:64-n32:64" target triple = "powerpc64le-unknown-linux-gnu" diff --git a/llvm/test/Transforms/PhaseOrdering/rotate.ll b/llvm/test/Transforms/PhaseOrdering/rotate.ll index 4661de3..9ce1969 100644 --- a/llvm/test/Transforms/PhaseOrdering/rotate.ll +++ b/llvm/test/Transforms/PhaseOrdering/rotate.ll @@ -1,16 +1,16 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -O3 -S < %s | FileCheck %s --check-prefixes=ANY,OLDPM -; RUN: opt -passes='default' -S < %s | FileCheck %s --check-prefixes=ANY,NEWPM +; RUN: opt -O3 -S < %s | FileCheck %s +; RUN: opt -passes='default' -S < %s | FileCheck %s ; This should become a single funnel shift through a combination ; of aggressive-instcombine, simplifycfg, and instcombine. ; https://bugs.llvm.org/show_bug.cgi?id=34924 define i32 @rotl(i32 %a, i32 %b) { -; ANY-LABEL: @rotl( -; ANY-NEXT: entry: -; ANY-NEXT: [[COND:%.*]] = tail call i32 @llvm.fshl.i32(i32 [[A:%.*]], i32 [[A]], i32 [[B:%.*]]) -; ANY-NEXT: ret i32 [[COND]] +; CHECK-LABEL: @rotl( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[COND:%.*]] = tail call i32 @llvm.fshl.i32(i32 [[A:%.*]], i32 [[A]], i32 [[B:%.*]]) +; CHECK-NEXT: ret i32 [[COND]] ; entry: %cmp = icmp eq i32 %b, 0 diff --git a/llvm/test/Transforms/PhaseOrdering/simplifycfg-options.ll b/llvm/test/Transforms/PhaseOrdering/simplifycfg-options.ll index 0115c68..91fe403 100644 --- a/llvm/test/Transforms/PhaseOrdering/simplifycfg-options.ll +++ b/llvm/test/Transforms/PhaseOrdering/simplifycfg-options.ll @@ -1,34 +1,34 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -O1 -S < %s | FileCheck %s --check-prefix=ALL --check-prefix=OLDPM -; RUN: opt -passes='default' -S < %s | FileCheck %s --check-prefix=ALL --check-prefix=NEWPM +; RUN: opt -O1 -S < %s | FileCheck %s +; RUN: opt -passes='default' -S < %s | FileCheck %s ; Don't simplify unconditional branches from empty blocks in simplifyCFG ; until late in the pipeline because it can destroy canonical loop structure. define i1 @PR33605(i32 %a, i32 %b, i32* %c) { -; ALL-LABEL: @PR33605( -; ALL-NEXT: entry: -; ALL-NEXT: [[OR:%.*]] = or i32 [[B:%.*]], [[A:%.*]] -; ALL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[C:%.*]], i64 1 -; ALL-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 -; ALL-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], [[TMP0]] -; ALL-NEXT: br i1 [[CMP]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] -; ALL: if.then: -; ALL-NEXT: store i32 [[OR]], i32* [[ARRAYIDX]], align 4 -; ALL-NEXT: call void @foo() -; ALL-NEXT: br label [[IF_END]] -; ALL: if.end: -; ALL-NEXT: [[TMP1:%.*]] = xor i1 [[CMP]], true -; ALL-NEXT: [[TMP2:%.*]] = load i32, i32* [[C]], align 4 -; ALL-NEXT: [[CMP_1:%.*]] = icmp eq i32 [[OR]], [[TMP2]] -; ALL-NEXT: br i1 [[CMP_1]], label [[IF_END_1:%.*]], label [[IF_THEN_1:%.*]] -; ALL: if.then.1: -; ALL-NEXT: store i32 [[OR]], i32* [[C]], align 4 -; ALL-NEXT: call void @foo() -; ALL-NEXT: br label [[IF_END_1]] -; ALL: if.end.1: -; ALL-NEXT: [[CHANGED_1_OFF0_1:%.*]] = phi i1 [ true, [[IF_THEN_1]] ], [ [[TMP1]], [[IF_END]] ] -; ALL-NEXT: ret i1 [[CHANGED_1_OFF0_1]] +; CHECK-LABEL: @PR33605( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[OR:%.*]] = or i32 [[B:%.*]], [[A:%.*]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[C:%.*]], i64 1 +; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], [[TMP0]] +; CHECK-NEXT: br i1 [[CMP]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] +; CHECK: if.then: +; CHECK-NEXT: store i32 [[OR]], i32* [[ARRAYIDX]], align 4 +; CHECK-NEXT: call void @foo() +; CHECK-NEXT: br label [[IF_END]] +; CHECK: if.end: +; CHECK-NEXT: [[TMP1:%.*]] = xor i1 [[CMP]], true +; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[C]], align 4 +; CHECK-NEXT: [[CMP_1:%.*]] = icmp eq i32 [[OR]], [[TMP2]] +; CHECK-NEXT: br i1 [[CMP_1]], label [[IF_END_1:%.*]], label [[IF_THEN_1:%.*]] +; CHECK: if.then.1: +; CHECK-NEXT: store i32 [[OR]], i32* [[C]], align 4 +; CHECK-NEXT: call void @foo() +; CHECK-NEXT: br label [[IF_END_1]] +; CHECK: if.end.1: +; CHECK-NEXT: [[CHANGED_1_OFF0_1:%.*]] = phi i1 [ true, [[IF_THEN_1]] ], [ [[TMP1]], [[IF_END]] ] +; CHECK-NEXT: ret i1 [[CHANGED_1_OFF0_1]] ; entry: br label %for.cond @@ -69,15 +69,15 @@ declare void @foo() ; SimplifyCFG should not flatten this before early-cse has a chance to eliminate redundant ops. define double @max_of_loads(double* %x, double* %y, i64 %i) { -; ALL-LABEL: @max_of_loads( -; ALL-NEXT: entry: -; ALL-NEXT: [[XI_PTR:%.*]] = getelementptr double, double* [[X:%.*]], i64 [[I:%.*]] -; ALL-NEXT: [[YI_PTR:%.*]] = getelementptr double, double* [[Y:%.*]], i64 [[I]] -; ALL-NEXT: [[XI:%.*]] = load double, double* [[XI_PTR]], align 8 -; ALL-NEXT: [[YI:%.*]] = load double, double* [[YI_PTR]], align 8 -; ALL-NEXT: [[CMP:%.*]] = fcmp ogt double [[XI]], [[YI]] -; ALL-NEXT: [[XI_YI:%.*]] = select i1 [[CMP]], double [[XI]], double [[YI]] -; ALL-NEXT: ret double [[XI_YI]] +; CHECK-LABEL: @max_of_loads( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[XI_PTR:%.*]] = getelementptr double, double* [[X:%.*]], i64 [[I:%.*]] +; CHECK-NEXT: [[YI_PTR:%.*]] = getelementptr double, double* [[Y:%.*]], i64 [[I]] +; CHECK-NEXT: [[XI:%.*]] = load double, double* [[XI_PTR]], align 8 +; CHECK-NEXT: [[YI:%.*]] = load double, double* [[YI_PTR]], align 8 +; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt double [[XI]], [[YI]] +; CHECK-NEXT: [[XI_YI:%.*]] = select i1 [[CMP]], double [[XI]], double [[YI]] +; CHECK-NEXT: ret double [[XI_YI]] ; entry: %xi_ptr = getelementptr double, double* %x, i64 %i diff --git a/llvm/test/Transforms/PhaseOrdering/two-shifts-by-sext.ll b/llvm/test/Transforms/PhaseOrdering/two-shifts-by-sext.ll index 82f5cfb..d890811 100644 --- a/llvm/test/Transforms/PhaseOrdering/two-shifts-by-sext.ll +++ b/llvm/test/Transforms/PhaseOrdering/two-shifts-by-sext.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -O1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-01 -; RUN: opt -O2 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-02 -; RUN: opt -O3 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-03 +; RUN: opt -O1 -S < %s | FileCheck %s +; RUN: opt -O2 -S < %s | FileCheck %s +; RUN: opt -O3 -S < %s | FileCheck %s target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" diff --git a/llvm/test/Transforms/PhaseOrdering/unsigned-multiply-overflow-check.ll b/llvm/test/Transforms/PhaseOrdering/unsigned-multiply-overflow-check.ll index 6b097da..efa99c0 100644 --- a/llvm/test/Transforms/PhaseOrdering/unsigned-multiply-overflow-check.ll +++ b/llvm/test/Transforms/PhaseOrdering/unsigned-multiply-overflow-check.ll @@ -1,10 +1,10 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -simplifycfg -S < %s | FileCheck %s --check-prefixes=ALL,SIMPLIFYCFG -; RUN: opt -instcombine -S < %s | FileCheck %s --check-prefixes=ALL,INSTCOMBINE,INSTCOMBINEONLY -; RUN: opt -instcombine -simplifycfg -S < %s | FileCheck %s --check-prefixes=ALL,INSTCOMBINE,INSTCOMBINESIMPLIFYCFG,INSTCOMBINESIMPLIFYCFGDEFAULT,INSTCOMBINESIMPLIFYCFGONLY -; RUN: opt -instcombine -simplifycfg -instcombine -S < %s | FileCheck %s --check-prefixes=ALL,INSTCOMBINE,INSTCOMBINESIMPLIFYCFG,INSTCOMBINESIMPLIFYCFGDEFAULT,INSTCOMBINESIMPLIFYCFGINSTCOMBINE -; RUN: opt -instcombine -simplifycfg -phi-node-folding-threshold=3 -S < %s | FileCheck %s --check-prefixes=ALL,INSTCOMBINE,INSTCOMBINESIMPLIFYCFG,INSTCOMBINESIMPLIFYCFGCOSTLY,INSTCOMBINESIMPLIFYCFGCOSTLYONLY -; RUN: opt -instcombine -simplifycfg -instcombine -phi-node-folding-threshold=3 -S < %s | FileCheck %s --check-prefixes=ALL,INSTCOMBINE,INSTCOMBINESIMPLIFYCFG,INSTCOMBINESIMPLIFYCFGCOSTLY,INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE +; RUN: opt -simplifycfg -S < %s | FileCheck %s --check-prefix=SIMPLIFYCFG +; RUN: opt -instcombine -S < %s | FileCheck %s --check-prefix=INSTCOMBINEONLY +; RUN: opt -instcombine -simplifycfg -S < %s | FileCheck %s --check-prefix=INSTCOMBINESIMPLIFYCFGONLY +; RUN: opt -instcombine -simplifycfg -instcombine -S < %s | FileCheck %s --check-prefix=INSTCOMBINESIMPLIFYCFGINSTCOMBINE +; RUN: opt -instcombine -simplifycfg -phi-node-folding-threshold=3 -S < %s | FileCheck %s --check-prefix=INSTCOMBINESIMPLIFYCFGONLY +; RUN: opt -instcombine -simplifycfg -instcombine -phi-node-folding-threshold=3 -S < %s | FileCheck %s --check-prefix=INSTCOMBINESIMPLIFYCFGINSTCOMBINE target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-pc-linux-gnu" @@ -56,20 +56,6 @@ define i1 @will_not_overflow(i64 %arg, i64 %arg1) { ; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1 ; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: ret i1 [[UMUL_OV]] ; -; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-LABEL: @will_not_overflow( -; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: bb: -; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 -; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]]) -; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1 -; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: [[T6:%.*]] = select i1 [[T0]], i1 false, i1 [[UMUL_OV]] -; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: ret i1 [[T6]] -; -; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-LABEL: @will_not_overflow( -; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-NEXT: bb: -; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG:%.*]], i64 [[ARG1:%.*]]) -; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1 -; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-NEXT: ret i1 [[UMUL_OV]] -; bb: %t0 = icmp eq i64 %arg, 0 br i1 %t0, label %bb5, label %bb2 @@ -129,22 +115,6 @@ define i1 @will_overflow(i64 %arg, i64 %arg1) { ; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[PHITMP:%.*]] = xor i1 [[UMUL_OV]], true ; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: ret i1 [[PHITMP]] ; -; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-LABEL: @will_overflow( -; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: bb: -; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 -; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]]) -; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1 -; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: [[PHITMP:%.*]] = xor i1 [[UMUL_OV]], true -; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: [[T6:%.*]] = select i1 [[T0]], i1 true, i1 [[PHITMP]] -; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: ret i1 [[T6]] -; -; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-LABEL: @will_overflow( -; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-NEXT: bb: -; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG:%.*]], i64 [[ARG1:%.*]]) -; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1 -; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-NEXT: [[PHITMP:%.*]] = xor i1 [[UMUL_OV]], true -; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-NEXT: ret i1 [[PHITMP]] -; bb: %t0 = icmp eq i64 %arg, 0 br i1 %t0, label %bb5, label %bb2 diff --git a/llvm/test/Transforms/PhaseOrdering/vector-trunc.ll b/llvm/test/Transforms/PhaseOrdering/vector-trunc.ll index 52a1fe7..3e3bf56 100644 --- a/llvm/test/Transforms/PhaseOrdering/vector-trunc.ll +++ b/llvm/test/Transforms/PhaseOrdering/vector-trunc.ll @@ -1,11 +1,11 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -O2 -S -data-layout="e" < %s | FileCheck %s --check-prefixes=ANY,OLDPM -; RUN: opt -passes='default' -S -data-layout="e" < %s | FileCheck %s --check-prefixes=ANY,NEWPM +; RUN: opt -O2 -S -data-layout="e" < %s | FileCheck %s +; RUN: opt -passes='default' -S -data-layout="e" < %s | FileCheck %s define <4 x i16> @truncate(<4 x i32> %x) { -; ANY-LABEL: @truncate( -; ANY-NEXT: [[V3:%.*]] = trunc <4 x i32> [[X:%.*]] to <4 x i16> -; ANY-NEXT: ret <4 x i16> [[V3]] +; CHECK-LABEL: @truncate( +; CHECK-NEXT: [[V3:%.*]] = trunc <4 x i32> [[X:%.*]] to <4 x i16> +; CHECK-NEXT: ret <4 x i16> [[V3]] ; %x0 = extractelement <4 x i32> %x, i32 0 %t0 = trunc i32 %x0 to i16 -- 2.7.4