From acbba7f8ead4e26eedce2bad9d6deb8682e7d0f7 Mon Sep 17 00:00:00 2001
From: "shaochan.liu" <shaochan.liu@amlogic.com>
Date: Fri, 20 Sep 2019 17:31:01 +0800
Subject: [PATCH] lcd: 1.3.15 HS Exit compliance testing for 480p and 720p
 [2/2]

PD#SH-1295

Problem:
need A113D mipi HS Exit compliance testing for 480p and 720p

Solution:
1, add A113D mipi HS Exit compliance testing
2, add 480p and 720p panel setting

Verify:
A113D_s400

Change-Id: I4c95b5532782f6f083c4d61a43cc17cb8ed120b6
Signed-off-by: shaochan.liu <shaochan.liu@amlogic.com>
---
 MAINTAINERS                                        |   5 +-
 arch/arm/boot/dts/amlogic/axg_a113d_skt.dts        |   1 +
 arch/arm/boot/dts/amlogic/mesonaxg_s400-panel.dtsi |  83 ++-
 arch/arm/boot/dts/amlogic/mesonaxg_skt-panel.dtsi  | 631 +++++++++++++++++++++
 arch/arm64/boot/dts/amlogic/axg_a113d_skt.dts      |   1 +
 .../boot/dts/amlogic/mesonaxg_s400-panel.dtsi      |  83 ++-
 .../arm64/boot/dts/amlogic/mesonaxg_skt-panel.dtsi | 631 +++++++++++++++++++++
 .../media/vout/lcd/lcd_tablet/mipi_dsi_util.c      |  19 +-
 8 files changed, 1448 insertions(+), 6 deletions(-)
 create mode 100644 arch/arm/boot/dts/amlogic/mesonaxg_skt-panel.dtsi
 create mode 100644 arch/arm64/boot/dts/amlogic/mesonaxg_skt-panel.dtsi

diff --git a/MAINTAINERS b/MAINTAINERS
index 8ecb794..a3b5855 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -14856,10 +14856,13 @@ AMLOGIC SM1 CLOCK DRIVERS
 M:	Shunzhou Jiang <shunzhou.jiang@amlogic.com>
 F:	drivers/amlogic/clk/sm1/*
 
-AMLOGIC SM1 DTS
+AMLOGIC SM1 AND AXG DTS
 M:	shaochan.liu <shaochan.liu@amlogic.com>
 F:	arch/arm64/boot/dts/amlogic/mesonsm1_skt-panel.dtsi
 F:	arch/arm/boot/dts/amlogic/mesonsm1_skt-panel.dtsi
+F:	arch/arm64/boot/dts/amlogic/mesonaxg_skt-panel.dtsi
+F:	arch/arm/boot/dts/amlogic/mesonaxg_skt-panel.dtsi
+
 
 AMLOGIC SM1 POWER CTRL DRIVERS
 M:	Shunzhou Jiang <shunzhou.jiang@amlogic.com>
diff --git a/arch/arm/boot/dts/amlogic/axg_a113d_skt.dts b/arch/arm/boot/dts/amlogic/axg_a113d_skt.dts
index 3670fcd..e34a799 100644
--- a/arch/arm/boot/dts/amlogic/axg_a113d_skt.dts
+++ b/arch/arm/boot/dts/amlogic/axg_a113d_skt.dts
@@ -18,6 +18,7 @@
 /dts-v1/;
 
 #include "mesonaxg.dtsi"
+#include "mesonaxg_skt-panel.dtsi"
 
 / {
 	model = "Amlogic";
diff --git a/arch/arm/boot/dts/amlogic/mesonaxg_s400-panel.dtsi b/arch/arm/boot/dts/amlogic/mesonaxg_s400-panel.dtsi
index 69ac7c7..0654ca2 100644
--- a/arch/arm/boot/dts/amlogic/mesonaxg_s400-panel.dtsi
+++ b/arch/arm/boot/dts/amlogic/mesonaxg_s400-panel.dtsi
@@ -1,5 +1,5 @@
 /*
- * arch/arm/boot/dts/amlogic/mesongxm_q200-panel.dtsi
+ * arch/arm/boot/dts/amlogic/mesonaxg_s400-panel.dtsi
  *
  * Copyright (C) 2016 Amlogic, Inc. All rights reserved.
  *
@@ -224,6 +224,87 @@
 					0xff 0 0 0>;
 			backlight_index = <0>;
 		};
+
+		lcd_4{
+			model_name = "480p";
+				/*interface(ttl,lvds,mipi)*/
+			interface = "mipi";
+			basic_setting = <720 480 /*h_active, v_active*/
+				858 525 /*h_period, v_period*/
+				8 /*lcd_bits*/
+				15 8>; /*screen_widht, screen_height*/
+			lcd_timing = <62 60 0 /*hs_width,hs_bp,hs_pol*/
+				6 30 0>; /*vs_width,vs_bp,vs_pol*/
+			clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
+				0 /*clk_ss_level*/
+				1 /*clk_auto_generate*/
+				27027000>; /*pixel_clk(unit in Hz)*/
+			mipi_attr = <2 /*lane_num*/
+				330 /*bit_rate_max(MHz)*/
+				0 /*factor(*100, default 0 for auto)*/
+				0 /*operation_mode_init(0=video, 1=command)*/
+				0 /*operation_mode_display(0=video, 1=command)*/
+				1 /*
+				   *video_mode_type
+				   *(0=sync_pulse,1=sync_event,2=burst)
+				   */
+				0 /*clk_always_hs(0=disable,1=enable)*/
+				1>; /*phy_switch(0=auto,1=standard,2=slow)*/
+				/* dsi_init: data_type, num, data... */
+			dsi_init_on = <0xff 0>; /* ending flag */
+			dsi_init_off = <0xff 0>; /* ending flag */
+				/* extern_init: 0xff for invalid */
+			extern_init = <0xff>;
+				/* power step: type,index,value,delay(ms) */
+			power_on_step = <0 0 0 20
+					2 0 0 0
+					0xff 0 0 0>;
+			power_off_step = <2 0 0 100
+					0 0 0 100
+					0xff 0 0 0>;
+			backlight_index = <0xff>;
+		};
+
+		lcd_5{
+			model_name = "720p";
+			interface = "mipi";
+			basic_setting = <1280 720 /*h_active, v_active*/
+				1650 750 /*h_period, v_period*/
+				8 /*lcd_bits*/
+				16 9>; /*screen_widht, screen_height*/
+			lcd_timing = <40 220 0 /*hs_width, hs_bp, hs_pol*/
+				5 20 0>; /*vs_width, vs_bp, vs_pol*/
+			clk_attr = <0 /*fr_adj_type(0=clk, 1=htotal, 2=vtotal)*/
+				0 /*clk_ss_level */
+				1 /*clk_auto_generate*/
+				74250000>; /*pixel_clk(unit in Hz)*/
+			mipi_attr = <4 /*lane_num*/
+				500 /*bit_rate_max(MHz)*/
+				0 /*factor(*100, default 0 for auto)*/
+				0 /*operation_mode_init(0=video, 1=command)*/
+				0 /*operation_mode_display(0=video, 1=command)*/
+				0 /*
+				   *video_mode_type
+				   *(0=sync_pulse,1=sync_event,2=burst)
+				   */
+				1 /*clk_always_hs(0=disable,1=enable)*/
+				0>; /*phy_switch(0=auto,1=standard,2=slow)*/
+
+			/* dsi_init: data_type, num, data... */
+			dsi_init_on = <0xff 0x0>;    /*ending*/
+			dsi_init_off = <0xff 0x0>;    /*ending*/
+			extern_init = <0xff>; /*0xff for invalid*/
+
+			/* power step: type, index, value, delay(ms) */
+			power_on_step = <0 0 0 10
+				0 0 1 20
+				2 0 0 0
+				0xff 0 0 0>; /*ending*/
+			power_off_step = <2 0 0 50
+				0 0 0 100
+				0xff 0 0 0>; /*ending*/
+			backlight_index = <0xff>;
+		};
 	};
 
 	lcd_extern{
diff --git a/arch/arm/boot/dts/amlogic/mesonaxg_skt-panel.dtsi b/arch/arm/boot/dts/amlogic/mesonaxg_skt-panel.dtsi
new file mode 100644
index 0000000..ad56d0c
--- /dev/null
+++ b/arch/arm/boot/dts/amlogic/mesonaxg_skt-panel.dtsi
@@ -0,0 +1,631 @@
+/*
+ * arch/arm/boot/dts/amlogic/mesonaxg_skt-panel.dtsi
+ *
+ * Copyright (C) 2016 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/ {
+	lcd{
+		compatible = "amlogic, lcd-axg";
+		mode = "tablet";
+		status = "okay";
+		key_valid = <0>;
+		clocks = <&clkc CLKID_MIPI_DSI_HOST
+			&clkc CLKID_MIPI_DSI_PHY
+			&clkc CLKID_DSI_MEAS_COMP
+			&clkc CLKID_MIPI_ENABLE_GATE
+			&clkc CLKID_MIPI_BANDGAP_GATE>;
+		clock-names = "dsi_host_gate",
+			"dsi_phy_gate",
+			"dsi_meas",
+			"mipi_enable_gate",
+			"mipi_bandgap_gate";
+		reg = <0xffd06000 0x400    /* dsi_host */
+			0xff640000 0x100>; /* dsi_phy */
+		interrupts = <0 3 1>;
+		interrupt-names = "vsync";
+		pinctrl_version = <1>; /* for uboot */
+
+		/* power type:
+		 *    (0=cpu_gpio, 1=pmu_gpio, 2=signal,3=extern, 0xff=ending)
+		 * power index:
+		 *    (point gpios_index, or extern_index,0xff=invalid)
+		 * power value:(0=output low, 1=output high, 2=input)
+		 * power delay:(unit in ms)
+		 */
+		lcd_cpu-gpios = <&gpio GPIOZ_6 GPIO_ACTIVE_HIGH>;
+		lcd_cpu_gpio_names = "GPIOZ_6";
+
+		lcd_0{
+			model_name = "720p";
+			interface = "mipi";
+			basic_setting = <1280 720 /*h_active, v_active*/
+				1650 750 /*h_period, v_period*/
+				8 /*lcd_bits*/
+				16 9>; /*screen_widht, screen_height*/
+			lcd_timing = <40 220 0 /*hs_width, hs_bp, hs_pol*/
+				5 20 0>; /*vs_width, vs_bp, vs_pol*/
+			clk_attr = <0 /*fr_adj_type(0=clk, 1=htotal, 2=vtotal)*/
+				0 /*clk_ss_level */
+				1 /*clk_auto_generate*/
+				74250000>; /*pixel_clk(unit in Hz)*/
+			mipi_attr = <4 /*lane_num*/
+				500 /*bit_rate_max(MHz)*/
+				0 /*factor(*100, default 0 for auto)*/
+				0 /*operation_mode_init(0=video, 1=command)*/
+				0 /*operation_mode_display(0=video, 1=command)*/
+				0 /*
+				   *video_mode_type
+				   *(0=sync_pulse,1=sync_event,2=burst)
+				   */
+				1 /*clk_always_hs(0=disable,1=enable)*/
+				0>; /*phy_switch(0=auto,1=standard,2=slow)*/
+
+			/* dsi_init: data_type, num, data... */
+			dsi_init_on = <0xff 0x0>;    /*ending*/
+			dsi_init_off = <0xff 0x0>;    /*ending*/
+			extern_init = <0xff>; /*0xff for invalid*/
+
+			/* power step: type, index, value, delay(ms) */
+			power_on_step = <0 0 0 10
+				0 0 1 20
+				2 0 0 0
+				0xff 0 0 0>; /*ending*/
+			power_off_step = <2 0 0 50
+				0 0 0 100
+				0xff 0 0 0>; /*ending*/
+			backlight_index = <0xff>;
+		};
+
+		lcd_1{
+			model_name = "480p";
+				/*interface(ttl,lvds,mipi)*/
+			interface = "mipi";
+			basic_setting = <720 480 /*h_active, v_active*/
+				858 525 /*h_period, v_period*/
+				8 /*lcd_bits*/
+				15 8>; /*screen_widht, screen_height*/
+			lcd_timing = <62 60 0 /*hs_width,hs_bp,hs_pol*/
+				6 30 0>; /*vs_width,vs_bp,vs_pol*/
+			clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
+				0 /*clk_ss_level*/
+				1 /*clk_auto_generate*/
+				27027000>; /*pixel_clk(unit in Hz)*/
+			mipi_attr = <2 /*lane_num*/
+				330 /*bit_rate_max(MHz)*/
+				0 /*factor(*100, default 0 for auto)*/
+				0 /*operation_mode_init(0=video, 1=command)*/
+				0 /*operation_mode_display(0=video, 1=command)*/
+				1 /*
+				   *video_mode_type
+				   *(0=sync_pulse,1=sync_event,2=burst)
+				   */
+				0 /*clk_always_hs(0=disable,1=enable)*/
+				1>; /*phy_switch(0=auto,1=standard,2=slow)*/
+				/* dsi_init: data_type, num, data... */
+			dsi_init_on = <0xff 0>; /* ending flag */
+			dsi_init_off = <0xff 0>; /* ending flag */
+				/* extern_init: 0xff for invalid */
+			extern_init = <0xff>;
+				/* power step: type,index,value,delay(ms) */
+			power_on_step = <0 0 0 20
+					2 0 0 0
+					0xff 0 0 0>;
+			power_off_step = <2 0 0 100
+					0 0 0 100
+					0xff 0 0 0>;
+			backlight_index = <0xff>;
+		};
+
+		lcd_2{
+			model_name = "P070ACB";
+				/*interface(ttl,lvds,mipi)*/
+			interface = "mipi";
+			basic_setting = <600 1024 /*h_active, v_active*/
+				680 1194 /*h_period, v_period*/
+				8 /*lcd_bits*/
+				3 5>; /*screen_widht, screen_height*/
+			lcd_timing = <24 36 0 /*hs_width,hs_bp,hs_pol*/
+				10 80 0>; /*vs_width,vs_bp,vs_pol*/
+			clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
+				0 /*clk_ss_level*/
+				1 /*clk_auto_generate*/
+				48715200>; /*pixel_clk(unit in Hz)*/
+			mipi_attr = <4 /*lane_num*/
+				400 /*bit_rate_max(MHz)*/
+				0 /*factor(*100, default 0 for auto)*/
+				1 /*operation_mode_init(0=video, 1=command)*/
+				0 /*operation_mode_display(0=video, 1=command)*/
+				2 /*
+				   *video_mode_type
+				   *(0=sync_pulse,1=sync_event,2=burst)
+				   */
+				0 /*clk_always_hs(0=disable,1=enable)*/
+				0>; /*phy_switch(0=auto,1=standard,2=slow)*/
+				/* dsi_init: data_type, num, data... */
+			dsi_init_on = <0xff 0>; /* ending flag */
+			dsi_init_off = <0xff 0>; /* ending flag */
+				/* extern_init: 0xff for invalid */
+			extern_init = <3>;
+				/* power step: type,index,value,delay(ms) */
+			power_on_step = <2 0 0 0
+					0xff 0 0 0>;
+			power_off_step = <2 0 0 50
+					0xff 0 0 0>;
+			backlight_index = <0xff>;
+		};
+
+		lcd_3{
+			model_name = "ST7701";
+				/*interface(ttl,lvds,mipi)*/
+			interface = "mipi";
+			basic_setting = <480 854 /*h_active, v_active*/
+				570 929 /*h_period, v_period*/
+				8 /*lcd_bits*/
+				8 15>; /*screen_widht, screen_height*/
+			lcd_timing = <30 30 0 /*hs_width,hs_bp,hs_pol*/
+				5 40 0>; /*vs_width,vs_bp,vs_pol*/
+			clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
+				0 /*clk_ss_level*/
+				1 /*clk_auto_generate*/
+				31771800>; /*pixel_clk(unit in Hz)*/
+			mipi_attr = <2 /*lane_num*/
+				400 /*bit_rate_max(MHz)*/
+				0 /*factor(*100, default 0 for auto)*/
+				1 /*operation_mode_init(0=video, 1=command)*/
+				0 /*operation_mode_display(0=video, 1=command)*/
+				2 /*
+				   *video_mode_type
+				   *(0=sync_pulse,1=sync_event,2=burst)
+				   */
+				1 /*clk_always_hs(0=disable,1=enable)*/
+				0>; /*phy_switch(0=auto,1=standard,2=slow)*/
+				/* dsi_init: data_type, num, data... */
+			dsi_init_on = <0xff 0>; /* ending flag */
+			dsi_init_off = <0xff 0>; /* ending flag */
+				/* extern_init: 0xff for invalid */
+			extern_init = <2>;
+				/* power step: type,index,value,delay(ms) */
+			power_on_step = <2 0 0 0
+					0xff 0 0 0>;
+			power_off_step = <2 0 0 50
+					0xff 0 0 0>;
+			backlight_index = <0xff>;
+		};
+	};
+
+	lcd_extern{
+		compatible = "amlogic, lcd_extern";
+		status = "okay";
+		i2c_bus = "i2c_bus_1";
+		key_valid = <0>;
+
+		extern_0{
+			index = <0>;
+			extern_name = "mipi_default";/*default*/
+			status = "okay";
+			type = <2>; /* 0=i2c, 1=spi, 2=mipi */
+			cmd_size = <0xff>;
+			init_on = <
+				0xfd 1 10
+				0x05 1 0x11
+				0xfd 1 120  /* delay 120ms */
+				0x05 1 0x29
+				0xff 0>;    /*ending*/
+			init_off = <
+				0x05 1 0x28 /* display off */
+				0xfd 1 10   /* delay 10ms */
+				0x05 1 0x10 /* sleep in */
+				0xfd 1 150  /* delay 150ms */
+				0xff 0>;    /*ending*/
+		};
+
+		extern_1{
+			index = <1>;
+			extern_name = "mipi_default";/*TV070WSM*/
+			status = "okay";
+			type = <2>; /* 0=i2c, 1=spi, 2=mipi */
+			cmd_size = <0xff>;
+			init_on = <
+				0xfd 1 10
+				0x15 2 0x62 0x01
+				0x39 5 0xff 0xaa 0x55 0x25 0x01
+				0x15 2 0xfc 0x08
+				0xfd 1 1   /* delay */
+				0x15 2 0xfc 0x00
+				0x39 5 0xff 0xaa 0x55 0x25 0x00
+				0xfd 1 20   /* delay */
+				0x39 6 0xf0 0x55 0xaa 0x52 0x08 0x00
+				0x39 3 0xb1 0x68 0x41
+				0x15 2 0xb5 0x88
+				0x15 2 0xb6 0x0f
+				0x39 5 0xb8 0x01 0x01 0x12 0x01
+				0x39 3 0xbb 0x11 0x11
+				0x39 3 0xbc 0x05 0x05
+				0x15 2 0xc7 0x03
+				0x39 6 0xbd 0x03 0x02 0x19 0x17 0x00
+				0x15 2 0xc8 0x80
+				0x39 6 0xf0 0x55 0xaa 0x52 0x08 0x01
+				0x39 3 0xB2 0x01 0x01
+				0x39 3 0xB3 0x28 0x28
+				0x39 3 0xB4 0x14 0x14
+				0x39 3 0xB8 0x05 0x05
+				0x39 3 0xB9 0x45 0x45
+				0x39 3 0xBA 0x25 0x25
+				0x39 3 0xBC 0x88 0x00
+				0x39 3 0xBD 0x88 0x00
+				0x39 6 0xF0 0x55 0xAA 0x52 0x08 0x02
+				0x15 2 0xEE 0x00
+				0x39 17 0xB0 0x00 0x4B 0x00 0x5C 0x00
+					0x79 0x00 0x94 0x00 0xA6 0x00 0xD8
+					0x00 0xF2 0x01 0x19
+				0x39 17 0xB1 0x01 0x39 0x01 0x77 0x01
+					0xA2 0x01 0xF2 0x02 0x32 0x02 0x34
+					0x02 0x6D 0x02 0xA2
+				0x39 17 0xB2 0x02 0xC7 0x02 0xF2 0x03
+					0x18 0x03 0x43 0x03 0x65 0x03 0x86
+					0x03 0x8F 0x03 0x94
+				0x39 5 0xB3 0x03 0x96 0x03 0x98
+				0x39 17 0xB4 0x00 0x84 0x00 0x91 0x00
+					0xA4 0x00 0xB6 0x00 0xCA 0x00 0xE9
+					0x01 0x02 0x01 0x2A
+				0x39 17 0xB5 0x01 0x49 0x01 0x82 0x01
+					0xAF 0x01 0xF7 0x02 0x36 0x02 0x38
+					0x02 0x70 0x02 0xA6
+				0x39 17 0xB6 0x02 0xC8 0x02 0xF5 0x03
+					0x1A 0x03 0x43 0x03 0x62 0x03 0x82
+					0x03 0x8F 0x03 0x94
+				0x39 5 0xB7 0x03 0x96 0x03 0x98
+				0x39 17 0xB8 0x01 0x22 0x01 0x27 0x01
+					0x2E 0x01 0x38 0x01 0x40 0x01 0x53
+					0x01 0x60 0x01 0x7B
+				0x39 17 0xB9 0x01 0x8C 0x01 0xB5 0x01
+					0xD3 0x02 0x11 0x02 0x49 0x02 0x4A
+					0x02 0x7F 0x02 0xB1
+				0x39 17 0xBA 0x02 0xD1 0x03 0x00 0x03
+					0x22 0x03 0x49 0x03 0x60 0x03 0x7A
+					0x03 0x8B 0x03 0x8F
+				0x39 5 0xBB 0x03 0x93 0x03 0x9A
+				0x39 17 0xBC 0x00 0x37 0x00 0x48 0x00
+					0x65 0x00 0x80 0x00 0x92 0x00 0xC4
+					0x00 0xDE 0x01 0x05
+				0x39 17 0xBD 0x01 0x31 0x01 0x6F 0x01
+					0x9E 0x01 0xEE 0x02 0x32 0x02 0x34
+					0x02 0x71 0x02 0xA7
+				0x39 17 0xBE 0x02 0xD3 0x02 0xFE 0x03
+					0x24 0x03 0x4F 0x03 0x71 0x03 0x92
+					0x03 0x9B 0x03 0xA0
+				0x39 5 0xBF 0x03 0xA6 0x03 0xA8
+				0x39 17 0xC0 0x00 0x70 0x00 0x7D 0x00
+					0x90 0x00 0xA4 0x00 0xB6 0x00 0xD5
+					0x00 0xEE 0x01 0x16
+				0x39 17 0xC1 0x01 0x41 0x01 0x7A 0x01
+					0xAB 0x01 0xF3 0x02 0x36 0x02 0x38
+					0x02 0x74 0x02 0xAA
+				0x39 17 0xC2 0x02 0xD4 0x03 0x01 0x03
+					0x26 0x03 0x4F 0x03 0x6E 0x03 0x8E
+					0x03 0x9B 0x03 0xA0
+				0x39 5 0xC3 0x03 0xA6 0x03 0xA8
+				0x39 17 0xC4 0x01 0x0E 0x01 0x13 0x01
+					0x1A 0x01 0x24 0x01 0x2C 0x01 0x3F
+					0x01 0x4C 0x01 0x67
+				0x39 17 0xC5 0x01 0x84 0x01 0xAD 0x01
+					0xCF 0x02 0x0D 0x02 0x49 0x02 0x4A
+					0x02 0x83 0x02 0xB5
+				0x39 17 0xC6 0x02 0xDD 0x03 0x0C 0x03
+					0x2E 0x03 0x55 0x03 0x6B 0x03 0x86
+					0x03 0x97 0x03 0x9B
+				0x39 5 0xC7 0x03 0xA1 0x03 0xA8
+				0x39 6 0xF0 0x55 0xAA 0x52 0x08 0x04
+				0x39 6 0xB1 0x03 0x02 0x02 0x02 0x00
+				0x39 6 0xF0 0x55 0xAA 0x52 0x08 0x06
+				0x39 3 0xB0 0x11 0x11
+				0x39 3 0xB1 0x13 0x13
+				0x39 3 0xB2 0x03 0x03
+				0x39 3 0xB3 0x34 0x34
+				0x39 3 0xB4 0x34 0x34
+				0x39 3 0xB5 0x34 0x34
+				0x39 3 0xB6 0x34 0x34
+				0x39 3 0xB7 0x34 0x34
+				0x39 3 0xB8 0x34 0x34
+				0x39 3 0xB9 0x34 0x34
+				0x39 3 0xBA 0x34 0x34
+				0x39 3 0xBB 0x34 0x34
+				0x39 3 0xBC 0x34 0x34
+				0x39 3 0xBD 0x34 0x34
+				0x39 3 0xBE 0x34 0x34
+				0x39 3 0xBF 0x34 0x34
+				0x39 3 0xC0 0x34 0x34
+				0x39 3 0xC1 0x02 0x02
+				0x39 3 0xC2 0x12 0x12
+				0x39 3 0xC3 0x10 0x10
+				0x39 3 0xE5 0x34 0x34
+				0x39 6 0xD8 0x00 0x00 0x00 0x00 0x00
+				0x39 6 0xD9 0x00 0x00 0x00 0x00 0x00
+				0x39 6 0xF0 0x55 0xAA 0x52 0x08 0x05
+				0x15 2 0xC0 0x03
+				0x15 2 0xC1 0x02
+				0x39 3 0xC8 0x01 0x20
+				0x15 2 0xE5 0x03
+				0x15 2 0xE6 0x03
+				0x15 2 0xE7 0x03
+				0x15 2 0xE8 0x03
+				0x15 2 0xE9 0x03
+				0x39 5 0xD1 0x03 0x00 0x3D 0x00
+				0x39 6 0xF0 0x55 0xAA 0x52 0x08 0x03
+				0x39 3 0xB0 0x11 0x00
+				0x39 3 0xB1 0x11 0x00
+				0x39 6 0xB2 0x03 0x00 0x00 0x00 0x00
+				0x39 6 0xB3 0x03 0x00 0x00 0x00 0x00
+				0x39 6 0xBA 0x31 0x00 0x00 0x00 0x00
+				0x15 2 0x35 0x00
+				0x15 2 0x51 0xFF
+				0x15 2 0x53 0x2C
+				0x15 2 0x55 0x03
+				0x05 1 0x11
+				0xfd 1 120   /* delay 120ms */
+				0x05 1 0x29
+				0xfd 1 130   /* delay 130ms */
+				0xFF 0>;     /*ending*/
+			init_off = <
+				0x05 1 0x28 /* display off */
+				0xfd 1 10   /* delay 10ms */
+				0x05 1 0x10 /* sleep in */
+				0xfd 1 150  /* delay 150ms */
+				0xff 0>;    /*ending*/
+		};
+
+		extern_2{
+			index = <2>;
+			extern_name = "mipi_default";/*ST7701*/
+			status = "okay";
+			type = <2>; /* 0=i2c, 1=spi, 2=mipi */
+			init_on = <
+				0x13 1 0x11
+				0xfd 1 200
+				0x29 6 0xff 0x77 0x01 0x00 0x00 0x10
+				0x29 3 0xc0 0xe9 0x03
+				0x29 3 0xc1 0x11 0x02
+				0x29 3 0xc2 0x31 0x08
+				0x29 17 0xb0 0x00 0x06 0x11 0x12 0x18
+					0x0a 0x0a 0x09 0x09 0x1d 0x09 0x14
+					0x10 0x0e 0x11 0x19
+				0x29 17 0xb1 0x00 0x06 0x11 0x11 0x15
+					0x09 0x0b 0x09 0x09 0x23 0x09 0x17
+					0x14 0x18 0x1e 0x19
+				0x29 6 0xff 0x77 0x01 0x00 0x00 0x11
+				0x23 2 0xb0 0x4d
+
+				0x23 2 0xb1 0x3a
+				0x23 2 0xb2 0x07
+				0x23 2 0xb3 0x80
+				0x23 2 0xb5 0x47
+				0x23 2 0xb7 0x8a
+				0x23 2 0xb8 0x21
+				0x23 2 0xc1 0x78
+				0x23 2 0xc2 0x78
+				0x23 2 0xd0 0x88
+
+				0xfd 1 100
+				0x29 4 0xe0 0x00 0x00 0x02
+				0x29 12 0xe1 0x08 0x00 0x0a 0x00 0x07
+					0x00 0x09 0x00 0x00 0x33 0x33
+				0x29 14 0xe2 0x00 0x00 0x00 0x00 0x00
+					0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
+				0x29 5 0xe3 0x00 0x00 0x33 0x33
+				0x29 3 0xe4 0x44 0x44
+				0x29 17 0xe5 0x0e 0x60 0xaf 0xaf 0x10
+					0x60 0xaf 0xaf 0x0a 0x60 0xaf 0xaf
+					0x0c 0x60 0xaf 0xaf
+				0x29 5 0xe6 0x00 0x00 0x33 0x33
+				0x29 3 0xe7 0x44 0x44
+				0x29 17 0xe8 0x0d 0x60 0xa0 0xa0 0x0f
+					0x60 0xaf 0xaf 0x09 0x60 0xaf 0xaf
+					0x0b 0x60 0xaf 0xaf
+				0x29 8 0xeb 0x02 0x01 0xe4 0xe4 0x44 0x00 0x40
+				0x29 3 0xec 0x02 0x01
+				0x29 17 0xed 0xab 0x89 0x76 0x54 0x01
+					0xff 0xff 0xff 0xff 0xff 0xff 0x10
+					0x45 0x67 0x98 0xba
+
+				0xfd 1 10
+				0x29 6 0xff 0x77 0x01 0x00 0x00 0x00
+				0x13 1 0x29
+				0xfd 1 200
+				0xff 0>; /*ending*/
+			init_off = <
+				0x05 1 0x28 /* display off */
+				0xfd 1 10   /* delay 10ms */
+				0x05 1 0x10 /* sleep in */
+				0xfd 1 150  /* delay 150ms */
+				0xff 0>;    /*ending*/
+		};
+
+		extern_3{
+			index = <3>;
+			extern_name = "mipi_default";/*P070ACB*/
+			status = "okay";
+			type = <2>; /* 0=i2c, 1=spi, 2=mipi */
+			cmd_size = <0xff>;
+			init_on = <
+				0x29 5 0xFF 0xAA 0x55 0x25 0x01
+				0x23 2 0xFC 0x08
+				0xfd 1 1   /* delay(ms) */
+				0x23 2 0xFC 0x00
+				0xfd 1 1  /* delay(ms) */
+				0x23 2 0x6F 0x21
+				0x23 2 0xF7 0x01
+				0xfd 1 1   /* delay(ms) */
+				0x23 2 0x6F 0x21
+				0x23 2 0xF7 0x00
+				0xfd 1 1	   /* delay(ms) */
+
+				0x23 2 0x6F 0x1A
+				0x23 2 0xF7 0x05
+				0xfd 1 1	   /* delay(ms) */
+
+				0x29 5 0xFF 0xAA 0x55 0x25 0x00
+
+				0x29 6 0xF0 0x55 0xAA 0x52 0x08 0x00
+				0x29 3 0xB1 0x68 0x41
+				0x23 2 0xB5 0x88
+				0x29 6 0xBD 0x02 0xB0 0x0C 0x14 0x00
+				0x23 2 0xC8 0x80
+
+				0x29 6 0xF0 0x55 0xAA 0x52 0x08 0x01
+				0x29 3 0xB3 0x2D 0x2D
+				0x29 3 0xB4 0x19 0x19
+				0x23 2 0xB5 0x06
+
+				0x29 3 0xB9 0x36 0x36
+				0x29 3 0xBA 0x26 0x26
+				0x29 3 0xBC 0xA8 0x01
+				0x29 3 0xBD 0xAB 0x01
+				0x23 2 0xC0 0x0C
+
+				0x29 6 0xF0 0x55 0xAA 0x52 0x08 0x02
+				0x23 2 0xEE 0x02
+				0x29 7 0xB0 0x00 0x50 0x00 0x52 0x00 0x73
+				0x23 2 0x6F 0x06
+				0x29 7 0xB0 0x00 0x8F 0x00 0xA5 0x00 0xCA
+				0x23 2 0x6F 0x0C
+				0x29 5 0xB0 0x00 0xEA 0x01 0x1B
+				0x29 7 0xB1 0x01 0x42 0x01 0x82 0x01 0xB3
+				0x23 2 0x6F 0x06
+				0x29 7 0xB1 0x02 0x00 0x02 0x41 0x02 0x42
+				0x23 2 0x6F 0x0C
+				0x29 5 0xB1 0x02 0x78 0x02 0xB5
+				0x29 7 0xB2 0x02 0xDA 0x03 0x12 0x03 0x3A
+				0x23 2 0x6F 0x06
+				0x29 7 0xB2 0x03 0x6E 0x03 0x8D 0x03 0xB1
+				0x23 2 0x6F 0x0C
+				0x29 5 0xB2 0x03 0xCA 0x03 0xE8
+				0x29 5 0xB3 0x03 0xF4 0x03 0xFF
+
+				0x29 7 0xBC 0x00 0x05 0x00 0x52 0x00 0x73
+				0x23 2 0x6F 0x06
+				0x29 7 0xBC 0x00 0x8F 0x00 0xA5 0x00 0xCA
+				0x23 2 0x6F 0x0C
+				0x29 5 0xBC 0x00 0xEA 0x01 0x1B
+				0x29 7 0xBD 0x01 0x42 0x01 0x82 0x01 0xB3
+				0x23 2 0x6F 0x06
+				0x29 7 0xBD 0x02 0x00 0x02 0x41 0x02 0x42
+				0x23 2 0x6F 0x0C
+				0x29 5 0xBD 0x02 0x78 0x02 0xB5
+				0x29 7 0xBE 0x02 0xDA 0x03 0x12 0x03 0x3A
+				0x23 2 0x6F 0x06
+				0x29 7 0xBE 0x03 0x6E 0x03 0x8D 0x03 0xB1
+				0x23 2 0x6F 0x0C
+				0x29 5 0xBE 0x03 0xCA 0x03 0xE8
+				0x29 5 0xBF 0x03 0xF4 0x03 0xFF
+
+				0x29 6 0xF0 0x55 0xAA 0x52 0x08 0x03
+				0x29 6 0xB2 0x05 0x00 0x00 0x00 0x00
+				0x29 6 0xB6 0x05 0x00 0x00 0x00 0x00
+				0x29 6 0xB7 0x05 0x00 0x00 0x00 0x00
+				0x29 6 0xBA 0x57 0x00 0x00 0x00 0x00
+				0x29 6 0xBB 0x57 0x00 0x00 0x00 0x00
+				0x29 5 0xC0 0x00 0x34 0x00 0x00
+				0x29 5 0xC1 0x00 0x00 0x34 0x00
+				0x23 2 0xC4 0x40
+
+				0x29 6 0xF0 0x55 0xAA 0x52 0x08 0x05
+				0x29 3 0xB0 0x17 0x06
+				0x29 3 0xB1 0x17 0x06
+				0x29 3 0xB2 0x17 0x06
+				0x29 3 0xB3 0x17 0x06
+				0x29 3 0xB4 0x17 0x06
+
+				0x29 6 0xBD 0x03 0x01 0x03 0x03 0x01
+				0x23 2 0xC0 0x05
+				0x23 2 0xC4 0x82
+				0x23 2 0xC5 0xA2
+				0x29 3 0xC8 0x03 0x30
+				0x29 3 0xC9 0x03 0x31
+				0x29 4 0xCC 0x00 0x00 0x3C
+				0x29 4 0xCD 0x00 0x00 0x3C
+				0x29 6 0xD1 0x00 0x44 0x09 0x00 0x00
+				0x29 6 0xD2 0x00 0x04 0x0B 0x00 0x00
+
+				0x29 6 0xF0 0x55 0xAA 0x52 0x08 0x06
+				0x29 3 0xB0 0x0B 0x2D
+				0x29 3 0xB1 0x2D 0x09
+				0x29 3 0xB2 0x2A 0x29
+				0x29 3 0xB3 0x34 0x1B
+				0x29 3 0xB4 0x19 0x17
+				0x29 3 0xB5 0x15 0x13
+				0x29 3 0xB6 0x11 0x01
+				0x29 3 0xB7 0x34 0x34
+				0x29 3 0xB8 0x34 0x2D
+				0x29 3 0xB9 0x2D 0x34
+				0x29 3 0xBA 0x2D 0x2D
+				0x29 3 0xBB 0x34 0x34
+				0x29 3 0xBC 0x34 0x34
+				0x29 3 0xBD 0x00 0x10
+				0x29 3 0xBE 0x12 0x14
+				0x29 3 0xBF 0x16 0x18
+
+				0x29 3 0xC0 0x1A 0x34
+				0x29 3 0xC1 0x29 0x2A
+				0x29 3 0xC2 0x08 0x2D
+				0x29 3 0xC3 0x2D 0x0A
+				0x29 3 0xC4 0x0A 0x2D
+				0x29 3 0xC5 0x2D 0x00
+				0x29 3 0xC6 0x2A 0x29
+				0x29 3 0xC7 0x34 0x14
+				0x29 3 0xC8 0x16 0x18
+				0x29 3 0xC9 0x1A 0x10
+				0x29 3 0xCA 0x12 0x08
+				0x29 3 0xCB 0x34 0x34
+				0x29 3 0xCC 0x34 0x2D
+				0x29 3 0xCD 0x2D 0x34
+				0x29 3 0xCE 0x2D 0x2D
+				0x29 3 0xCF 0x34 0x34
+
+				0x29 3 0xD0 0x34 0x34
+				0x29 3 0xD1 0x09 0x13
+				0x29 3 0xD2 0x11 0x1B
+				0x29 3 0xD3 0x19 0x17
+				0x29 3 0xD4 0x15 0x34
+				0x29 3 0xD5 0x29 0x2A
+				0x29 3 0xD6 0x01 0x2D
+				0x29 3 0xD7 0x2D 0x0B
+				0x29 6 0xD8 0x00 0x00 0x00 0x00 0x00
+				0x29 6 0xD9 0x00 0x00 0x00 0x00 0x00
+
+				0x29 3 0xE5 0x34 0x34
+				0x29 3 0xE6 0x34 0x34
+				0x23 2 0xE7 0x00
+				0x29 3 0xE8 0x34 0x34
+				0x29 3 0xE9 0x34 0x34
+				0x23 2 0xEA 0x00
+
+				0x29 6 0xF0 0x55 0xAA 0x52 0x00 0x00
+
+				0x13 1 0x35
+				0x13 1 0x11
+				0xfd 1 120   /* delay(ms) */
+				0x13 1 0x29
+				0xfd 1 20    /* delay(ms) */
+				0xFF 0>;     /*ending*/
+			init_off = <
+				0x05 1 0x28 /* display off */
+				0xfd 1 10   /* delay 10ms */
+				0x05 1 0x10 /* sleep in */
+				0xfd 1 150  /* delay 150ms */
+				0xff 0>;    /*ending*/
+		};
+	};
+};/* end of panel */
+
diff --git a/arch/arm64/boot/dts/amlogic/axg_a113d_skt.dts b/arch/arm64/boot/dts/amlogic/axg_a113d_skt.dts
index 3cbf2c4..bd521fd 100644
--- a/arch/arm64/boot/dts/amlogic/axg_a113d_skt.dts
+++ b/arch/arm64/boot/dts/amlogic/axg_a113d_skt.dts
@@ -18,6 +18,7 @@
 /dts-v1/;
 
 #include "mesonaxg.dtsi"
+#include "mesonaxg_skt-panel.dtsi"
 
 / {
 	model = "Amlogic";
diff --git a/arch/arm64/boot/dts/amlogic/mesonaxg_s400-panel.dtsi b/arch/arm64/boot/dts/amlogic/mesonaxg_s400-panel.dtsi
index a11f723..e343fab 100644
--- a/arch/arm64/boot/dts/amlogic/mesonaxg_s400-panel.dtsi
+++ b/arch/arm64/boot/dts/amlogic/mesonaxg_s400-panel.dtsi
@@ -1,5 +1,5 @@
 /*
- * arch/arm64/boot/dts/amlogic/mesongxm_q200-panel.dtsi
+ * arch/arm64/boot/dts/amlogic/mesonaxg_s400-panel.dtsi
  *
  * Copyright (C) 2016 Amlogic, Inc. All rights reserved.
  *
@@ -223,6 +223,87 @@
 					0xff 0 0 0>;
 			backlight_index = <0>;
 		};
+
+		lcd_4{
+			model_name = "480p";
+				/*interface(ttl,lvds,mipi)*/
+			interface = "mipi";
+			basic_setting = <720 480 /*h_active, v_active*/
+				858 525 /*h_period, v_period*/
+				8 /*lcd_bits*/
+				15 8>; /*screen_widht, screen_height*/
+			lcd_timing = <62 60 0 /*hs_width,hs_bp,hs_pol*/
+				6 30 0>; /*vs_width,vs_bp,vs_pol*/
+			clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
+				0 /*clk_ss_level*/
+				1 /*clk_auto_generate*/
+				27027000>; /*pixel_clk(unit in Hz)*/
+			mipi_attr = <2 /*lane_num*/
+				330 /*bit_rate_max(MHz)*/
+				0 /*factor(*100, default 0 for auto)*/
+				0 /*operation_mode_init(0=video, 1=command)*/
+				0 /*operation_mode_display(0=video, 1=command)*/
+				1 /*
+				   *video_mode_type
+				   *(0=sync_pulse,1=sync_event,2=burst)
+				   */
+				0 /*clk_always_hs(0=disable,1=enable)*/
+				1>; /*phy_switch(0=auto,1=standard,2=slow)*/
+				/* dsi_init: data_type, num, data... */
+			dsi_init_on = <0xff 0>; /* ending flag */
+			dsi_init_off = <0xff 0>; /* ending flag */
+				/* extern_init: 0xff for invalid */
+			extern_init = <0xff>;
+				/* power step: type,index,value,delay(ms) */
+			power_on_step = <0 0 0 20
+					2 0 0 0
+					0xff 0 0 0>;
+			power_off_step = <2 0 0 100
+					0 0 0 100
+					0xff 0 0 0>;
+			backlight_index = <0>;
+		};
+
+		lcd_5{
+			model_name = "720p";
+			interface = "mipi";
+			basic_setting = <1280 720 /*h_active, v_active*/
+				1650 750 /*h_period, v_period*/
+				8 /*lcd_bits*/
+				16 9>; /*screen_widht, screen_height*/
+			lcd_timing = <40 220 0 /*hs_width, hs_bp, hs_pol*/
+				5 20 0>; /*vs_width, vs_bp, vs_pol*/
+			clk_attr = <0 /*fr_adj_type(0=clk, 1=htotal, 2=vtotal)*/
+				0 /*clk_ss_level */
+				1 /*clk_auto_generate*/
+				74250000>; /*pixel_clk(unit in Hz)*/
+			mipi_attr = <4 /*lane_num*/
+				500 /*bit_rate_max(MHz)*/
+				0 /*factor(*100, default 0 for auto)*/
+				0 /*operation_mode_init(0=video, 1=command)*/
+				0 /*operation_mode_display(0=video, 1=command)*/
+				0 /*
+				   *video_mode_type
+				   *(0=sync_pulse,1=sync_event,2=burst)
+				   */
+				1 /*clk_always_hs(0=disable,1=enable)*/
+				0>; /*phy_switch(0=auto,1=standard,2=slow)*/
+
+			/* dsi_init: data_type, num, data... */
+			dsi_init_on = <0xff 0x0>;    /*ending*/
+			dsi_init_off = <0xff 0x0>;    /*ending*/
+			extern_init = <0xff>; /*0xff for invalid*/
+
+			/* power step: type, index, value, delay(ms) */
+			power_on_step = <0 0 0 10
+				0 0 1 20
+				2 0 0 0
+				0xff 0 0 0>; /*ending*/
+			power_off_step = <2 0 0 50
+				0 0 0 100
+				0xff 0 0 0>; /*ending*/
+			backlight_index = <0>;
+		};
 	};
 
 	lcd_extern{
diff --git a/arch/arm64/boot/dts/amlogic/mesonaxg_skt-panel.dtsi b/arch/arm64/boot/dts/amlogic/mesonaxg_skt-panel.dtsi
new file mode 100644
index 0000000..06b2443
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/mesonaxg_skt-panel.dtsi
@@ -0,0 +1,631 @@
+/*
+ * arch/arm64/boot/dts/amlogic/mesonaxg_skt-panel.dtsi
+ *
+ * Copyright (C) 2016 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/ {
+	lcd{
+		compatible = "amlogic, lcd-axg";
+		mode = "tablet";
+		status = "okay";
+		key_valid = <0>;
+		clocks = <&clkc CLKID_MIPI_DSI_HOST
+			&clkc CLKID_MIPI_DSI_PHY
+			&clkc CLKID_DSI_MEAS_COMP
+			&clkc CLKID_MIPI_ENABLE_GATE
+			&clkc CLKID_MIPI_BANDGAP_GATE>;
+		clock-names = "dsi_host_gate",
+			"dsi_phy_gate",
+			"dsi_meas",
+			"mipi_enable_gate",
+			"mipi_bandgap_gate";
+		reg = <0x0 0xffd06000 0x0 0x400    /* dsi_host */
+			0x0 0xff640000 0x0 0x100>; /* dsi_phy */
+		interrupts = <0 3 1>;
+		interrupt-names = "vsync";
+		pinctrl_version = <1>; /* for uboot */
+
+		/* power type:
+		 *    (0=cpu_gpio, 1=pmu_gpio, 2=signal,3=extern, 0xff=ending)
+		 * power index:
+		 *    (point gpios_index, or extern_index,0xff=invalid)
+		 * power value:(0=output low, 1=output high, 2=input)
+		 * power delay:(unit in ms)
+		 */
+		lcd_cpu-gpios = <&gpio GPIOZ_6 GPIO_ACTIVE_HIGH>;
+		lcd_cpu_gpio_names = "GPIOZ_6";
+
+		lcd_0{
+			model_name = "720p";
+			interface = "mipi";
+			basic_setting = <1280 720 /*h_active, v_active*/
+				1650 750 /*h_period, v_period*/
+				8 /*lcd_bits*/
+				16 9>; /*screen_widht, screen_height*/
+			lcd_timing = <40 220 0 /*hs_width, hs_bp, hs_pol*/
+				5 20 0>; /*vs_width, vs_bp, vs_pol*/
+			clk_attr = <0 /*fr_adj_type(0=clk, 1=htotal, 2=vtotal)*/
+				0 /*clk_ss_level */
+				1 /*clk_auto_generate*/
+				74250000>; /*pixel_clk(unit in Hz)*/
+			mipi_attr = <4 /*lane_num*/
+				500 /*bit_rate_max(MHz)*/
+				0 /*factor(*100, default 0 for auto)*/
+				0 /*operation_mode_init(0=video, 1=command)*/
+				0 /*operation_mode_display(0=video, 1=command)*/
+				0 /*
+				   *video_mode_type
+				   *(0=sync_pulse,1=sync_event,2=burst)
+				   */
+				1 /*clk_always_hs(0=disable,1=enable)*/
+				0>; /*phy_switch(0=auto,1=standard,2=slow)*/
+
+			/* dsi_init: data_type, num, data... */
+			dsi_init_on = <0xff 0x0>;    /*ending*/
+			dsi_init_off = <0xff 0x0>;    /*ending*/
+			extern_init = <0xff>; /*0xff for invalid*/
+
+			/* power step: type, index, value, delay(ms) */
+			power_on_step = <0 0 0 10
+				0 0 1 20
+				2 0 0 0
+				0xff 0 0 0>; /*ending*/
+			power_off_step = <2 0 0 50
+				0 0 0 100
+				0xff 0 0 0>; /*ending*/
+			backlight_index = <0xff>;
+		};
+
+		lcd_1{
+			model_name = "480p";
+				/*interface(ttl,lvds,mipi)*/
+			interface = "mipi";
+			basic_setting = <720 480 /*h_active, v_active*/
+				858 525 /*h_period, v_period*/
+				8 /*lcd_bits*/
+				15 8>; /*screen_widht, screen_height*/
+			lcd_timing = <62 60 0 /*hs_width,hs_bp,hs_pol*/
+				6 30 0>; /*vs_width,vs_bp,vs_pol*/
+			clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
+				0 /*clk_ss_level*/
+				1 /*clk_auto_generate*/
+				27027000>; /*pixel_clk(unit in Hz)*/
+			mipi_attr = <2 /*lane_num*/
+				330 /*bit_rate_max(MHz)*/
+				0 /*factor(*100, default 0 for auto)*/
+				0 /*operation_mode_init(0=video, 1=command)*/
+				0 /*operation_mode_display(0=video, 1=command)*/
+				1 /*
+				   *video_mode_type
+				   *(0=sync_pulse,1=sync_event,2=burst)
+				   */
+				0 /*clk_always_hs(0=disable,1=enable)*/
+				1>; /*phy_switch(0=auto,1=standard,2=slow)*/
+				/* dsi_init: data_type, num, data... */
+			dsi_init_on = <0xff 0>; /* ending flag */
+			dsi_init_off = <0xff 0>; /* ending flag */
+				/* extern_init: 0xff for invalid */
+			extern_init = <0xff>;
+				/* power step: type,index,value,delay(ms) */
+			power_on_step = <0 0 0 20
+					2 0 0 0
+					0xff 0 0 0>;
+			power_off_step = <2 0 0 100
+					0 0 0 100
+					0xff 0 0 0>;
+			backlight_index = <0xff>;
+		};
+
+		lcd_2{
+			model_name = "P070ACB";
+				/*interface(ttl,lvds,mipi)*/
+			interface = "mipi";
+			basic_setting = <600 1024 /*h_active, v_active*/
+				680 1194 /*h_period, v_period*/
+				8 /*lcd_bits*/
+				3 5>; /*screen_widht, screen_height*/
+			lcd_timing = <24 36 0 /*hs_width,hs_bp,hs_pol*/
+				10 80 0>; /*vs_width,vs_bp,vs_pol*/
+			clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
+				0 /*clk_ss_level*/
+				1 /*clk_auto_generate*/
+				48715200>; /*pixel_clk(unit in Hz)*/
+			mipi_attr = <4 /*lane_num*/
+				400 /*bit_rate_max(MHz)*/
+				0 /*factor(*100, default 0 for auto)*/
+				1 /*operation_mode_init(0=video, 1=command)*/
+				0 /*operation_mode_display(0=video, 1=command)*/
+				2 /*
+				   *video_mode_type
+				   *(0=sync_pulse,1=sync_event,2=burst)
+				   */
+				0 /*clk_always_hs(0=disable,1=enable)*/
+				0>; /*phy_switch(0=auto,1=standard,2=slow)*/
+				/* dsi_init: data_type, num, data... */
+			dsi_init_on = <0xff 0>; /* ending flag */
+			dsi_init_off = <0xff 0>; /* ending flag */
+				/* extern_init: 0xff for invalid */
+			extern_init = <3>;
+				/* power step: type,index,value,delay(ms) */
+			power_on_step = <2 0 0 0
+					0xff 0 0 0>;
+			power_off_step = <2 0 0 50
+					0xff 0 0 0>;
+			backlight_index = <0xff>;
+		};
+
+		lcd_3{
+			model_name = "ST7701";
+				/*interface(ttl,lvds,mipi)*/
+			interface = "mipi";
+			basic_setting = <480 854 /*h_active, v_active*/
+				570 929 /*h_period, v_period*/
+				8 /*lcd_bits*/
+				8 15>; /*screen_widht, screen_height*/
+			lcd_timing = <30 30 0 /*hs_width,hs_bp,hs_pol*/
+				5 40 0>; /*vs_width,vs_bp,vs_pol*/
+			clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
+				0 /*clk_ss_level*/
+				1 /*clk_auto_generate*/
+				31771800>; /*pixel_clk(unit in Hz)*/
+			mipi_attr = <2 /*lane_num*/
+				400 /*bit_rate_max(MHz)*/
+				0 /*factor(*100, default 0 for auto)*/
+				1 /*operation_mode_init(0=video, 1=command)*/
+				0 /*operation_mode_display(0=video, 1=command)*/
+				2 /*
+				   *video_mode_type
+				   *(0=sync_pulse,1=sync_event,2=burst)
+				   */
+				1 /*clk_always_hs(0=disable,1=enable)*/
+				0>; /*phy_switch(0=auto,1=standard,2=slow)*/
+				/* dsi_init: data_type, num, data... */
+			dsi_init_on = <0xff 0>; /* ending flag */
+			dsi_init_off = <0xff 0>; /* ending flag */
+				/* extern_init: 0xff for invalid */
+			extern_init = <2>;
+				/* power step: type,index,value,delay(ms) */
+			power_on_step = <2 0 0 0
+					0xff 0 0 0>;
+			power_off_step = <2 0 0 50
+					0xff 0 0 0>;
+			backlight_index = <0xff>;
+		};
+	};
+
+	lcd_extern{
+		compatible = "amlogic, lcd_extern";
+		status = "okay";
+		i2c_bus = "i2c_bus_1";
+		key_valid = <0>;
+
+		extern_0{
+			index = <0>;
+			extern_name = "mipi_default";/*default*/
+			status = "okay";
+			type = <2>; /* 0=i2c, 1=spi, 2=mipi */
+			cmd_size = <0xff>;
+			init_on = <
+				0xfd 1 10
+				0x05 1 0x11
+				0xfd 1 120  /* delay 120ms */
+				0x05 1 0x29
+				0xff 0>;    /*ending*/
+			init_off = <
+				0x05 1 0x28 /* display off */
+				0xfd 1 10   /* delay 10ms */
+				0x05 1 0x10 /* sleep in */
+				0xfd 1 150  /* delay 150ms */
+				0xff 0>;    /*ending*/
+		};
+
+		extern_1{
+			index = <1>;
+			extern_name = "mipi_default";/*TV070WSM*/
+			status = "okay";
+			type = <2>; /* 0=i2c, 1=spi, 2=mipi */
+			cmd_size = <0xff>;
+			init_on = <
+				0xfd 1 10
+				0x15 2 0x62 0x01
+				0x39 5 0xff 0xaa 0x55 0x25 0x01
+				0x15 2 0xfc 0x08
+				0xfd 1 1   /* delay */
+				0x15 2 0xfc 0x00
+				0x39 5 0xff 0xaa 0x55 0x25 0x00
+				0xfd 1 20   /* delay */
+				0x39 6 0xf0 0x55 0xaa 0x52 0x08 0x00
+				0x39 3 0xb1 0x68 0x41
+				0x15 2 0xb5 0x88
+				0x15 2 0xb6 0x0f
+				0x39 5 0xb8 0x01 0x01 0x12 0x01
+				0x39 3 0xbb 0x11 0x11
+				0x39 3 0xbc 0x05 0x05
+				0x15 2 0xc7 0x03
+				0x39 6 0xbd 0x03 0x02 0x19 0x17 0x00
+				0x15 2 0xc8 0x80
+				0x39 6 0xf0 0x55 0xaa 0x52 0x08 0x01
+				0x39 3 0xB2 0x01 0x01
+				0x39 3 0xB3 0x28 0x28
+				0x39 3 0xB4 0x14 0x14
+				0x39 3 0xB8 0x05 0x05
+				0x39 3 0xB9 0x45 0x45
+				0x39 3 0xBA 0x25 0x25
+				0x39 3 0xBC 0x88 0x00
+				0x39 3 0xBD 0x88 0x00
+				0x39 6 0xF0 0x55 0xAA 0x52 0x08 0x02
+				0x15 2 0xEE 0x00
+				0x39 17 0xB0 0x00 0x4B 0x00 0x5C 0x00
+					0x79 0x00 0x94 0x00 0xA6 0x00 0xD8
+					0x00 0xF2 0x01 0x19
+				0x39 17 0xB1 0x01 0x39 0x01 0x77 0x01
+					0xA2 0x01 0xF2 0x02 0x32 0x02 0x34
+					0x02 0x6D 0x02 0xA2
+				0x39 17 0xB2 0x02 0xC7 0x02 0xF2 0x03
+					0x18 0x03 0x43 0x03 0x65 0x03 0x86
+					0x03 0x8F 0x03 0x94
+				0x39 5 0xB3 0x03 0x96 0x03 0x98
+				0x39 17 0xB4 0x00 0x84 0x00 0x91 0x00
+					0xA4 0x00 0xB6 0x00 0xCA 0x00 0xE9
+					0x01 0x02 0x01 0x2A
+				0x39 17 0xB5 0x01 0x49 0x01 0x82 0x01
+					0xAF 0x01 0xF7 0x02 0x36 0x02 0x38
+					0x02 0x70 0x02 0xA6
+				0x39 17 0xB6 0x02 0xC8 0x02 0xF5 0x03
+					0x1A 0x03 0x43 0x03 0x62 0x03 0x82
+					0x03 0x8F 0x03 0x94
+				0x39 5 0xB7 0x03 0x96 0x03 0x98
+				0x39 17 0xB8 0x01 0x22 0x01 0x27 0x01
+					0x2E 0x01 0x38 0x01 0x40 0x01 0x53
+					0x01 0x60 0x01 0x7B
+				0x39 17 0xB9 0x01 0x8C 0x01 0xB5 0x01
+					0xD3 0x02 0x11 0x02 0x49 0x02 0x4A
+					0x02 0x7F 0x02 0xB1
+				0x39 17 0xBA 0x02 0xD1 0x03 0x00 0x03
+					0x22 0x03 0x49 0x03 0x60 0x03 0x7A
+					0x03 0x8B 0x03 0x8F
+				0x39 5 0xBB 0x03 0x93 0x03 0x9A
+				0x39 17 0xBC 0x00 0x37 0x00 0x48 0x00
+					0x65 0x00 0x80 0x00 0x92 0x00 0xC4
+					0x00 0xDE 0x01 0x05
+				0x39 17 0xBD 0x01 0x31 0x01 0x6F 0x01
+					0x9E 0x01 0xEE 0x02 0x32 0x02 0x34
+					0x02 0x71 0x02 0xA7
+				0x39 17 0xBE 0x02 0xD3 0x02 0xFE 0x03
+					0x24 0x03 0x4F 0x03 0x71 0x03 0x92
+					0x03 0x9B 0x03 0xA0
+				0x39 5 0xBF 0x03 0xA6 0x03 0xA8
+				0x39 17 0xC0 0x00 0x70 0x00 0x7D 0x00
+					0x90 0x00 0xA4 0x00 0xB6 0x00 0xD5
+					0x00 0xEE 0x01 0x16
+				0x39 17 0xC1 0x01 0x41 0x01 0x7A 0x01
+					0xAB 0x01 0xF3 0x02 0x36 0x02 0x38
+					0x02 0x74 0x02 0xAA
+				0x39 17 0xC2 0x02 0xD4 0x03 0x01 0x03
+					0x26 0x03 0x4F 0x03 0x6E 0x03 0x8E
+					0x03 0x9B 0x03 0xA0
+				0x39 5 0xC3 0x03 0xA6 0x03 0xA8
+				0x39 17 0xC4 0x01 0x0E 0x01 0x13 0x01
+					0x1A 0x01 0x24 0x01 0x2C 0x01 0x3F
+					0x01 0x4C 0x01 0x67
+				0x39 17 0xC5 0x01 0x84 0x01 0xAD 0x01
+					0xCF 0x02 0x0D 0x02 0x49 0x02 0x4A
+					0x02 0x83 0x02 0xB5
+				0x39 17 0xC6 0x02 0xDD 0x03 0x0C 0x03
+					0x2E 0x03 0x55 0x03 0x6B 0x03 0x86
+					0x03 0x97 0x03 0x9B
+				0x39 5 0xC7 0x03 0xA1 0x03 0xA8
+				0x39 6 0xF0 0x55 0xAA 0x52 0x08 0x04
+				0x39 6 0xB1 0x03 0x02 0x02 0x02 0x00
+				0x39 6 0xF0 0x55 0xAA 0x52 0x08 0x06
+				0x39 3 0xB0 0x11 0x11
+				0x39 3 0xB1 0x13 0x13
+				0x39 3 0xB2 0x03 0x03
+				0x39 3 0xB3 0x34 0x34
+				0x39 3 0xB4 0x34 0x34
+				0x39 3 0xB5 0x34 0x34
+				0x39 3 0xB6 0x34 0x34
+				0x39 3 0xB7 0x34 0x34
+				0x39 3 0xB8 0x34 0x34
+				0x39 3 0xB9 0x34 0x34
+				0x39 3 0xBA 0x34 0x34
+				0x39 3 0xBB 0x34 0x34
+				0x39 3 0xBC 0x34 0x34
+				0x39 3 0xBD 0x34 0x34
+				0x39 3 0xBE 0x34 0x34
+				0x39 3 0xBF 0x34 0x34
+				0x39 3 0xC0 0x34 0x34
+				0x39 3 0xC1 0x02 0x02
+				0x39 3 0xC2 0x12 0x12
+				0x39 3 0xC3 0x10 0x10
+				0x39 3 0xE5 0x34 0x34
+				0x39 6 0xD8 0x00 0x00 0x00 0x00 0x00
+				0x39 6 0xD9 0x00 0x00 0x00 0x00 0x00
+				0x39 6 0xF0 0x55 0xAA 0x52 0x08 0x05
+				0x15 2 0xC0 0x03
+				0x15 2 0xC1 0x02
+				0x39 3 0xC8 0x01 0x20
+				0x15 2 0xE5 0x03
+				0x15 2 0xE6 0x03
+				0x15 2 0xE7 0x03
+				0x15 2 0xE8 0x03
+				0x15 2 0xE9 0x03
+				0x39 5 0xD1 0x03 0x00 0x3D 0x00
+				0x39 6 0xF0 0x55 0xAA 0x52 0x08 0x03
+				0x39 3 0xB0 0x11 0x00
+				0x39 3 0xB1 0x11 0x00
+				0x39 6 0xB2 0x03 0x00 0x00 0x00 0x00
+				0x39 6 0xB3 0x03 0x00 0x00 0x00 0x00
+				0x39 6 0xBA 0x31 0x00 0x00 0x00 0x00
+				0x15 2 0x35 0x00
+				0x15 2 0x51 0xFF
+				0x15 2 0x53 0x2C
+				0x15 2 0x55 0x03
+				0x05 1 0x11
+				0xfd 1 120   /* delay 120ms */
+				0x05 1 0x29
+				0xfd 1 130   /* delay 130ms */
+				0xFF 0>;     /*ending*/
+			init_off = <
+				0x05 1 0x28 /* display off */
+				0xfd 1 10   /* delay 10ms */
+				0x05 1 0x10 /* sleep in */
+				0xfd 1 150  /* delay 150ms */
+				0xff 0>;    /*ending*/
+		};
+
+		extern_2{
+			index = <2>;
+			extern_name = "mipi_default";/*ST7701*/
+			status = "okay";
+			type = <2>; /* 0=i2c, 1=spi, 2=mipi */
+			init_on = <
+				0x13 1 0x11
+				0xfd 1 200
+				0x29 6 0xff 0x77 0x01 0x00 0x00 0x10
+				0x29 3 0xc0 0xe9 0x03
+				0x29 3 0xc1 0x11 0x02
+				0x29 3 0xc2 0x31 0x08
+				0x29 17 0xb0 0x00 0x06 0x11 0x12 0x18
+					0x0a 0x0a 0x09 0x09 0x1d 0x09 0x14
+					0x10 0x0e 0x11 0x19
+				0x29 17 0xb1 0x00 0x06 0x11 0x11 0x15
+					0x09 0x0b 0x09 0x09 0x23 0x09 0x17
+					0x14 0x18 0x1e 0x19
+				0x29 6 0xff 0x77 0x01 0x00 0x00 0x11
+				0x23 2 0xb0 0x4d
+
+				0x23 2 0xb1 0x3a
+				0x23 2 0xb2 0x07
+				0x23 2 0xb3 0x80
+				0x23 2 0xb5 0x47
+				0x23 2 0xb7 0x8a
+				0x23 2 0xb8 0x21
+				0x23 2 0xc1 0x78
+				0x23 2 0xc2 0x78
+				0x23 2 0xd0 0x88
+
+				0xfd 1 100
+				0x29 4 0xe0 0x00 0x00 0x02
+				0x29 12 0xe1 0x08 0x00 0x0a 0x00 0x07
+					0x00 0x09 0x00 0x00 0x33 0x33
+				0x29 14 0xe2 0x00 0x00 0x00 0x00 0x00
+					0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
+				0x29 5 0xe3 0x00 0x00 0x33 0x33
+				0x29 3 0xe4 0x44 0x44
+				0x29 17 0xe5 0x0e 0x60 0xaf 0xaf 0x10
+					0x60 0xaf 0xaf 0x0a 0x60 0xaf 0xaf
+					0x0c 0x60 0xaf 0xaf
+				0x29 5 0xe6 0x00 0x00 0x33 0x33
+				0x29 3 0xe7 0x44 0x44
+				0x29 17 0xe8 0x0d 0x60 0xa0 0xa0 0x0f
+					0x60 0xaf 0xaf 0x09 0x60 0xaf 0xaf
+					0x0b 0x60 0xaf 0xaf
+				0x29 8 0xeb 0x02 0x01 0xe4 0xe4 0x44 0x00 0x40
+				0x29 3 0xec 0x02 0x01
+				0x29 17 0xed 0xab 0x89 0x76 0x54 0x01
+					0xff 0xff 0xff 0xff 0xff 0xff 0x10
+					0x45 0x67 0x98 0xba
+
+				0xfd 1 10
+				0x29 6 0xff 0x77 0x01 0x00 0x00 0x00
+				0x13 1 0x29
+				0xfd 1 200
+				0xff 0>; /*ending*/
+			init_off = <
+				0x05 1 0x28 /* display off */
+				0xfd 1 10   /* delay 10ms */
+				0x05 1 0x10 /* sleep in */
+				0xfd 1 150  /* delay 150ms */
+				0xff 0>;    /*ending*/
+		};
+
+		extern_3{
+			index = <3>;
+			extern_name = "mipi_default";/*P070ACB*/
+			status = "okay";
+			type = <2>; /* 0=i2c, 1=spi, 2=mipi */
+			cmd_size = <0xff>;
+			init_on = <
+				0x29 5 0xFF 0xAA 0x55 0x25 0x01
+				0x23 2 0xFC 0x08
+				0xfd 1 1   /* delay(ms) */
+				0x23 2 0xFC 0x00
+				0xfd 1 1  /* delay(ms) */
+				0x23 2 0x6F 0x21
+				0x23 2 0xF7 0x01
+				0xfd 1 1   /* delay(ms) */
+				0x23 2 0x6F 0x21
+				0x23 2 0xF7 0x00
+				0xfd 1 1	   /* delay(ms) */
+
+				0x23 2 0x6F 0x1A
+				0x23 2 0xF7 0x05
+				0xfd 1 1	   /* delay(ms) */
+
+				0x29 5 0xFF 0xAA 0x55 0x25 0x00
+
+				0x29 6 0xF0 0x55 0xAA 0x52 0x08 0x00
+				0x29 3 0xB1 0x68 0x41
+				0x23 2 0xB5 0x88
+				0x29 6 0xBD 0x02 0xB0 0x0C 0x14 0x00
+				0x23 2 0xC8 0x80
+
+				0x29 6 0xF0 0x55 0xAA 0x52 0x08 0x01
+				0x29 3 0xB3 0x2D 0x2D
+				0x29 3 0xB4 0x19 0x19
+				0x23 2 0xB5 0x06
+
+				0x29 3 0xB9 0x36 0x36
+				0x29 3 0xBA 0x26 0x26
+				0x29 3 0xBC 0xA8 0x01
+				0x29 3 0xBD 0xAB 0x01
+				0x23 2 0xC0 0x0C
+
+				0x29 6 0xF0 0x55 0xAA 0x52 0x08 0x02
+				0x23 2 0xEE 0x02
+				0x29 7 0xB0 0x00 0x50 0x00 0x52 0x00 0x73
+				0x23 2 0x6F 0x06
+				0x29 7 0xB0 0x00 0x8F 0x00 0xA5 0x00 0xCA
+				0x23 2 0x6F 0x0C
+				0x29 5 0xB0 0x00 0xEA 0x01 0x1B
+				0x29 7 0xB1 0x01 0x42 0x01 0x82 0x01 0xB3
+				0x23 2 0x6F 0x06
+				0x29 7 0xB1 0x02 0x00 0x02 0x41 0x02 0x42
+				0x23 2 0x6F 0x0C
+				0x29 5 0xB1 0x02 0x78 0x02 0xB5
+				0x29 7 0xB2 0x02 0xDA 0x03 0x12 0x03 0x3A
+				0x23 2 0x6F 0x06
+				0x29 7 0xB2 0x03 0x6E 0x03 0x8D 0x03 0xB1
+				0x23 2 0x6F 0x0C
+				0x29 5 0xB2 0x03 0xCA 0x03 0xE8
+				0x29 5 0xB3 0x03 0xF4 0x03 0xFF
+
+				0x29 7 0xBC 0x00 0x05 0x00 0x52 0x00 0x73
+				0x23 2 0x6F 0x06
+				0x29 7 0xBC 0x00 0x8F 0x00 0xA5 0x00 0xCA
+				0x23 2 0x6F 0x0C
+				0x29 5 0xBC 0x00 0xEA 0x01 0x1B
+				0x29 7 0xBD 0x01 0x42 0x01 0x82 0x01 0xB3
+				0x23 2 0x6F 0x06
+				0x29 7 0xBD 0x02 0x00 0x02 0x41 0x02 0x42
+				0x23 2 0x6F 0x0C
+				0x29 5 0xBD 0x02 0x78 0x02 0xB5
+				0x29 7 0xBE 0x02 0xDA 0x03 0x12 0x03 0x3A
+				0x23 2 0x6F 0x06
+				0x29 7 0xBE 0x03 0x6E 0x03 0x8D 0x03 0xB1
+				0x23 2 0x6F 0x0C
+				0x29 5 0xBE 0x03 0xCA 0x03 0xE8
+				0x29 5 0xBF 0x03 0xF4 0x03 0xFF
+
+				0x29 6 0xF0 0x55 0xAA 0x52 0x08 0x03
+				0x29 6 0xB2 0x05 0x00 0x00 0x00 0x00
+				0x29 6 0xB6 0x05 0x00 0x00 0x00 0x00
+				0x29 6 0xB7 0x05 0x00 0x00 0x00 0x00
+				0x29 6 0xBA 0x57 0x00 0x00 0x00 0x00
+				0x29 6 0xBB 0x57 0x00 0x00 0x00 0x00
+				0x29 5 0xC0 0x00 0x34 0x00 0x00
+				0x29 5 0xC1 0x00 0x00 0x34 0x00
+				0x23 2 0xC4 0x40
+
+				0x29 6 0xF0 0x55 0xAA 0x52 0x08 0x05
+				0x29 3 0xB0 0x17 0x06
+				0x29 3 0xB1 0x17 0x06
+				0x29 3 0xB2 0x17 0x06
+				0x29 3 0xB3 0x17 0x06
+				0x29 3 0xB4 0x17 0x06
+
+				0x29 6 0xBD 0x03 0x01 0x03 0x03 0x01
+				0x23 2 0xC0 0x05
+				0x23 2 0xC4 0x82
+				0x23 2 0xC5 0xA2
+				0x29 3 0xC8 0x03 0x30
+				0x29 3 0xC9 0x03 0x31
+				0x29 4 0xCC 0x00 0x00 0x3C
+				0x29 4 0xCD 0x00 0x00 0x3C
+				0x29 6 0xD1 0x00 0x44 0x09 0x00 0x00
+				0x29 6 0xD2 0x00 0x04 0x0B 0x00 0x00
+
+				0x29 6 0xF0 0x55 0xAA 0x52 0x08 0x06
+				0x29 3 0xB0 0x0B 0x2D
+				0x29 3 0xB1 0x2D 0x09
+				0x29 3 0xB2 0x2A 0x29
+				0x29 3 0xB3 0x34 0x1B
+				0x29 3 0xB4 0x19 0x17
+				0x29 3 0xB5 0x15 0x13
+				0x29 3 0xB6 0x11 0x01
+				0x29 3 0xB7 0x34 0x34
+				0x29 3 0xB8 0x34 0x2D
+				0x29 3 0xB9 0x2D 0x34
+				0x29 3 0xBA 0x2D 0x2D
+				0x29 3 0xBB 0x34 0x34
+				0x29 3 0xBC 0x34 0x34
+				0x29 3 0xBD 0x00 0x10
+				0x29 3 0xBE 0x12 0x14
+				0x29 3 0xBF 0x16 0x18
+
+				0x29 3 0xC0 0x1A 0x34
+				0x29 3 0xC1 0x29 0x2A
+				0x29 3 0xC2 0x08 0x2D
+				0x29 3 0xC3 0x2D 0x0A
+				0x29 3 0xC4 0x0A 0x2D
+				0x29 3 0xC5 0x2D 0x00
+				0x29 3 0xC6 0x2A 0x29
+				0x29 3 0xC7 0x34 0x14
+				0x29 3 0xC8 0x16 0x18
+				0x29 3 0xC9 0x1A 0x10
+				0x29 3 0xCA 0x12 0x08
+				0x29 3 0xCB 0x34 0x34
+				0x29 3 0xCC 0x34 0x2D
+				0x29 3 0xCD 0x2D 0x34
+				0x29 3 0xCE 0x2D 0x2D
+				0x29 3 0xCF 0x34 0x34
+
+				0x29 3 0xD0 0x34 0x34
+				0x29 3 0xD1 0x09 0x13
+				0x29 3 0xD2 0x11 0x1B
+				0x29 3 0xD3 0x19 0x17
+				0x29 3 0xD4 0x15 0x34
+				0x29 3 0xD5 0x29 0x2A
+				0x29 3 0xD6 0x01 0x2D
+				0x29 3 0xD7 0x2D 0x0B
+				0x29 6 0xD8 0x00 0x00 0x00 0x00 0x00
+				0x29 6 0xD9 0x00 0x00 0x00 0x00 0x00
+
+				0x29 3 0xE5 0x34 0x34
+				0x29 3 0xE6 0x34 0x34
+				0x23 2 0xE7 0x00
+				0x29 3 0xE8 0x34 0x34
+				0x29 3 0xE9 0x34 0x34
+				0x23 2 0xEA 0x00
+
+				0x29 6 0xF0 0x55 0xAA 0x52 0x00 0x00
+
+				0x13 1 0x35
+				0x13 1 0x11
+				0xfd 1 120   /* delay(ms) */
+				0x13 1 0x29
+				0xfd 1 20    /* delay(ms) */
+				0xFF 0>;     /*ending*/
+			init_off = <
+				0x05 1 0x28 /* display off */
+				0xfd 1 10   /* delay 10ms */
+				0x05 1 0x10 /* sleep in */
+				0xfd 1 150  /* delay 150ms */
+				0xff 0>;    /*ending*/
+		};
+	};
+};/* end of panel */
+
diff --git a/drivers/amlogic/media/vout/lcd/lcd_tablet/mipi_dsi_util.c b/drivers/amlogic/media/vout/lcd/lcd_tablet/mipi_dsi_util.c
index fdf006c..e965644 100644
--- a/drivers/amlogic/media/vout/lcd/lcd_tablet/mipi_dsi_util.c
+++ b/drivers/amlogic/media/vout/lcd/lcd_tablet/mipi_dsi_util.c
@@ -473,6 +473,10 @@ static void check_phy_status(void)
 
 static void dsi_phy_init(struct dsi_phy_s *dphy, unsigned char lane_num)
 {
+	struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver();
+	struct lcd_config_s *pconf;
+
+	pconf = lcd_drv->lcd_config;
 	/* enable phy clock. */
 	dsi_phy_write(MIPI_DSI_PHY_CTRL,  0x1); /* enable DSI top clock. */
 	dsi_phy_write(MIPI_DSI_PHY_CTRL,
@@ -502,9 +506,18 @@ static void dsi_phy_init(struct dsi_phy_s *dphy, unsigned char lane_num)
 		(dphy->clk_zero << 16) | (dphy->clk_prepare << 24)));
 	dsi_phy_write(MIPI_DSI_CLK_TIM1, dphy->clk_pre); /* ?? */
 	/* 0x050f090d */
-	dsi_phy_write(MIPI_DSI_HS_TIM,
-		(dphy->hs_exit | (dphy->hs_trail << 8) |
-		(dphy->hs_zero << 16) | (dphy->hs_prepare << 24)));
+	if (pconf->lcd_timing.bit_rate > 500000000UL) { /*more than 500M*/
+		dsi_phy_write(MIPI_DSI_HS_TIM,
+			      (dphy->hs_exit | (dphy->hs_trail << 8) |
+			      (dphy->hs_zero << 16) |
+			      (dphy->hs_prepare << 24)));
+	} else {
+		LCDPR("bit_rata = %d\n", pconf->lcd_timing.bit_rate);
+		dsi_phy_write(MIPI_DSI_HS_TIM,
+			      (dphy->hs_exit | ((dphy->hs_trail / 2) << 8) |
+			      (dphy->hs_zero << 16) |
+			      (dphy->hs_prepare << 24)));
+	}
 	/* 0x4a370e0e */
 	dsi_phy_write(MIPI_DSI_LP_TIM,
 		(dphy->lp_lpx | (dphy->lp_ta_sure << 8) |
-- 
2.7.4