From abff8b24b935f134fd6c09a659dcb2c3fd6a1051 Mon Sep 17 00:00:00 2001 From: James Zern Date: Fri, 24 Apr 2015 19:21:53 -0700 Subject: [PATCH] x86_simd_caps: check max cpuid before testing AVX2 MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit structured extended feature flags require eax = 7; avoids incorrectly detecting avx2 on some older processors that support avx. from [1]: INPUT EAX = 0: Returns CPUID’s Highest Value for Basic Processor Information and the Vendor Identification String [1] http://www.intel.com/content/www/us/en/processors/processor-identification-cpuid-instruction-note.html Change-Id: I6b4735b5f7b7729a815e428fca767d1e5a10bcab --- vpx_ports/x86.h | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/vpx_ports/x86.h b/vpx_ports/x86.h index ae349fb..7d93710 100644 --- a/vpx_ports/x86.h +++ b/vpx_ports/x86.h @@ -152,7 +152,7 @@ static INLINE int x86_simd_caps(void) { unsigned int flags = 0; unsigned int mask = ~0; - unsigned int reg_eax, reg_ebx, reg_ecx, reg_edx; + unsigned int max_cpuid_val, reg_eax, reg_ebx, reg_ecx, reg_edx; char *env; (void)reg_ebx; @@ -168,9 +168,9 @@ x86_simd_caps(void) { mask = strtol(env, NULL, 0); /* Ensure that the CPUID instruction supports extended features */ - cpuid(0, 0, reg_eax, reg_ebx, reg_ecx, reg_edx); + cpuid(0, 0, max_cpuid_val, reg_ebx, reg_ecx, reg_edx); - if (reg_eax < 1) + if (max_cpuid_val < 1) return 0; /* Get the standard feature flags */ @@ -193,10 +193,12 @@ x86_simd_caps(void) { if ((xgetbv() & 0x6) == 0x6) { flags |= HAS_AVX; - /* Get the leaf 7 feature flags. Needed to check for AVX2 support */ - cpuid(7, 0, reg_eax, reg_ebx, reg_ecx, reg_edx); + if (max_cpuid_val >= 7) { + /* Get the leaf 7 feature flags. Needed to check for AVX2 support */ + cpuid(7, 0, reg_eax, reg_ebx, reg_ecx, reg_edx); - if (reg_ebx & BIT(5)) flags |= HAS_AVX2; + if (reg_ebx & BIT(5)) flags |= HAS_AVX2; + } } } -- 2.7.4