From abd74d262b07f33d6c298f1b2fe03cfcdb3c72f7 Mon Sep 17 00:00:00 2001 From: Matt Roper Date: Thu, 23 Feb 2023 16:23:00 -0800 Subject: [PATCH] drm/i915: Stop whitelisting CS_CTX_TIMESTAMP on Xe_HP platforms Xe_HP architecture already makes the CS_CTX_TIMESTAMP readable by userspace on all engines; there's no longer a need to add it to the software-managed whitelist for the non-RCS engines. Bspec: 45545 Signed-off-by: Matt Roper Acked-by: Gustavo Sousa Link: https://patchwork.freedesktop.org/patch/msgid/20230224002300.3578985-2-matthew.d.roper@intel.com --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index 5461628d..5a1c56c 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -2251,17 +2251,10 @@ static void dg1_whitelist_build(struct intel_engine_cs *engine) RING_FORCE_TO_NONPRIV_ACCESS_RD); } -static void xehpsdv_whitelist_build(struct intel_engine_cs *engine) -{ - allow_read_ctx_timestamp(engine); -} - static void dg2_whitelist_build(struct intel_engine_cs *engine) { struct i915_wa_list *w = &engine->whitelist; - allow_read_ctx_timestamp(engine); - switch (engine->class) { case RENDER_CLASS: /* @@ -2312,8 +2305,6 @@ static void blacklist_trtt(struct intel_engine_cs *engine) static void pvc_whitelist_build(struct intel_engine_cs *engine) { - allow_read_ctx_timestamp(engine); - /* Wa_16014440446:pvc */ blacklist_trtt(engine); } @@ -2347,7 +2338,7 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine) else if (IS_DG2(i915)) dg2_whitelist_build(engine); else if (IS_XEHPSDV(i915)) - xehpsdv_whitelist_build(engine); + ; /* none needed */ else if (IS_DG1(i915)) dg1_whitelist_build(engine); else if (GRAPHICS_VER(i915) == 12) -- 2.7.4