From ab7218277c801836eb700626bc4aebf47dd2095b Mon Sep 17 00:00:00 2001 From: Sander de Smalen Date: Tue, 28 Jun 2022 08:43:43 +0100 Subject: [PATCH] [AArch64][SME] NFC: Extend tile_slice ComplexPattern to match default case. A tile slice offset of '0' is the default and by moving this into SelectSMETileSlice we can remove some redundant patterns. Reviewed By: kmclaughlin Differential Revision: https://reviews.llvm.org/D128506 --- llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 11 ++++--- llvm/lib/Target/AArch64/SMEInstrFormats.td | 41 ++++++------------------- 2 files changed, 16 insertions(+), 36 deletions(-) diff --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp index 71a1416..82fe577 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp @@ -5256,9 +5256,12 @@ bool AArch64DAGToDAGISel::SelectAllActivePredicate(SDValue N) { } bool AArch64DAGToDAGISel::SelectSMETileSlice(SDValue N, unsigned Scale, - SDValue &Vector, SDValue &Offset) { - if (N.getOpcode() != ISD::ADD) - return false; + SDValue &Base, SDValue &Offset) { + if (N.getOpcode() != ISD::ADD) { + Base = N; + Offset = CurDAG->getTargetConstant(0, SDLoc(N), MVT::i64); + return true; + } // Process an ADD node. const SDValue LHS = N.getOperand(0); @@ -5271,7 +5274,7 @@ bool AArch64DAGToDAGISel::SelectSMETileSlice(SDValue N, unsigned Scale, if (ImmOff < 0 || ImmOff > MaxSize) return false; - Vector = LHS; + Base = LHS; Offset = CurDAG->getTargetConstant(ImmOff, SDLoc(N), MVT::i64); return true; } diff --git a/llvm/lib/Target/AArch64/SMEInstrFormats.td b/llvm/lib/Target/AArch64/SMEInstrFormats.td index 2834792..9dd418a 100644 --- a/llvm/lib/Target/AArch64/SMEInstrFormats.td +++ b/llvm/lib/Target/AArch64/SMEInstrFormats.td @@ -251,25 +251,13 @@ multiclass sme_mem_ld_ss_patterns { - // base + // base, tileslice def : Pat<(Load PPR3bAny:$pg, GPR64sp:$base, tile_ty:$tile, - MatrixIndexGPR32Op12_15:$idx), - (Inst tile_ty:$tile, $idx, 0, $pg, $base, XZR)>; - // reg + reg - let AddedComplexity = 1 in { - def : Pat<(Load PPR3bAny:$pg, (addr GPR64sp:$base, GPR64:$offset), - tile_ty:$tile, MatrixIndexGPR32Op12_15:$idx), - (Inst tile_ty:$tile, $idx, 0, $pg, $base, $offset)>; - } + (i32 (tileslice MatrixIndexGPR32Op12_15:$idx, offset_ty:$imm))), + (Inst tile_ty:$tile, $idx, $imm, $pg, $base, XZR)>; - // base, tileslice - let AddedComplexity = 1 in { - def : Pat<(Load PPR3bAny:$pg, GPR64sp:$base, tile_ty:$tile, - (i32 (tileslice MatrixIndexGPR32Op12_15:$idx, offset_ty:$imm))), - (Inst tile_ty:$tile, $idx, $imm, $pg, $base, XZR)>; - } // reg + reg, tileslice - let AddedComplexity = 2 in { + let AddedComplexity = 1 in { def : Pat<(Load PPR3bAny:$pg, (addr GPR64sp:$base, GPR64:$offset), tile_ty:$tile, (i32 (tileslice MatrixIndexGPR32Op12_15:$idx, offset_ty:$imm))), @@ -410,24 +398,13 @@ multiclass sme_mem_st_ss_patterns { - // base - def : Pat<(Store PPR3bAny:$pg, GPR64sp:$base, (imm2tile untyped:$tile), - MatrixIndexGPR32Op12_15:$idx), - (Inst $tile, $idx, 0, $pg, $base, XZR)>; - // reg + reg - let AddedComplexity = 1 in { - def : Pat<(Store PPR3bAny:$pg, (addr GPR64sp:$base, GPR64:$offset), - (imm2tile untyped:$tile), MatrixIndexGPR32Op12_15:$idx), - (Inst $tile, $idx, 0, $pg, $base, $offset)>; - } // base, tileslice - let AddedComplexity = 1 in { - def : Pat<(Store PPR3bAny:$pg, GPR64sp:$base, (imm2tile untyped:$tile), - (i32 (tileslice MatrixIndexGPR32Op12_15:$idx, offset_ty:$imm))), - (Inst $tile, $idx, $imm, $pg, $base, XZR)>; - } + def : Pat<(Store PPR3bAny:$pg, GPR64sp:$base, (imm2tile untyped:$tile), + (i32 (tileslice MatrixIndexGPR32Op12_15:$idx, offset_ty:$imm))), + (Inst $tile, $idx, $imm, $pg, $base, XZR)>; + // reg + reg, tileslice - let AddedComplexity = 2 in { + let AddedComplexity = 1 in { def : Pat<(Store PPR3bAny:$pg, (addr GPR64sp:$base, GPR64:$offset), (imm2tile untyped:$tile), (i32 (tileslice MatrixIndexGPR32Op12_15:$idx, offset_ty:$imm))), -- 2.7.4