From ab197ad8d14aff1a0cb2be9f10445c6487b472fd Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Wed, 19 Apr 2017 03:12:55 +0200 Subject: [PATCH] radeonsi/gfx9: add GS user SGPRs MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_descriptors.c | 15 +++++++++++---- src/gallium/drivers/radeonsi/si_shader.c | 2 +- src/gallium/drivers/radeonsi/si_shader.h | 13 ++++++++++++- src/gallium/drivers/radeonsi/si_state_shaders.c | 2 +- 4 files changed, 25 insertions(+), 7 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c index 5b7298e..fc94e43 100644 --- a/src/gallium/drivers/radeonsi/si_descriptors.c +++ b/src/gallium/drivers/radeonsi/si_descriptors.c @@ -1992,10 +1992,13 @@ void si_init_all_descriptors(struct si_context *sctx) unsigned ce_offset = 0; STATIC_ASSERT(GFX9_SGPR_TCS_CONST_BUFFERS % 2 == 0); + STATIC_ASSERT(GFX9_SGPR_GS_CONST_BUFFERS % 2 == 0); for (i = 0; i < SI_NUM_SHADERS; i++) { bool gfx9_tcs = sctx->b.chip_class == GFX9 && i == PIPE_SHADER_TESS_CTRL; + bool gfx9_gs = sctx->b.chip_class == GFX9 && + i == PIPE_SHADER_GEOMETRY; /* GFX9 has only 4KB of CE, while previous chips had 32KB. * Rarely used descriptors don't use CE RAM. */ @@ -2010,27 +2013,31 @@ void si_init_all_descriptors(struct si_context *sctx) si_const_buffer_descriptors(sctx, i), SI_NUM_CONST_BUFFERS, gfx9_tcs ? GFX9_SGPR_TCS_CONST_BUFFERS : - SI_SGPR_CONST_BUFFERS, + gfx9_gs ? GFX9_SGPR_GS_CONST_BUFFERS : + SI_SGPR_CONST_BUFFERS, RADEON_USAGE_READ, RADEON_PRIO_CONST_BUFFER, &ce_offset); si_init_buffer_resources(&sctx->shader_buffers[i], si_shader_buffer_descriptors(sctx, i), SI_NUM_SHADER_BUFFERS, gfx9_tcs ? GFX9_SGPR_TCS_SHADER_BUFFERS : - SI_SGPR_SHADER_BUFFERS, + gfx9_gs ? GFX9_SGPR_GS_SHADER_BUFFERS : + SI_SGPR_SHADER_BUFFERS, RADEON_USAGE_READWRITE, RADEON_PRIO_SHADER_RW_BUFFER, shaderbufs_use_ce ? &ce_offset : NULL); si_init_descriptors(si_sampler_descriptors(sctx, i), gfx9_tcs ? GFX9_SGPR_TCS_SAMPLERS : - SI_SGPR_SAMPLERS, + gfx9_gs ? GFX9_SGPR_GS_SAMPLERS : + SI_SGPR_SAMPLERS, 16, SI_NUM_SAMPLERS, null_texture_descriptor, samplers_use_ce ? &ce_offset : NULL); si_init_descriptors(si_image_descriptors(sctx, i), gfx9_tcs ? GFX9_SGPR_TCS_IMAGES : - SI_SGPR_IMAGES, + gfx9_gs ? GFX9_SGPR_GS_IMAGES : + SI_SGPR_IMAGES, 8, SI_NUM_IMAGES, null_image_descriptor, images_use_ce ? &ce_offset : NULL); diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 21a166c..50efb13 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -7397,7 +7397,7 @@ static void si_get_ps_epilog_key(struct si_shader *shader, static void si_build_gs_prolog_function(struct si_shader_context *ctx, union si_shader_part_key *key) { - const unsigned num_sgprs = SI_GS_NUM_USER_SGPR + 2; + const unsigned num_sgprs = GFX6_GS_NUM_USER_SGPR + 2; const unsigned num_vgprs = 8; struct gallivm_state *gallivm = &ctx->gallivm; LLVMBuilderRef builder = gallivm->builder; diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h index 8d60ed9..8a779ae 100644 --- a/src/gallium/drivers/radeonsi/si_shader.h +++ b/src/gallium/drivers/radeonsi/si_shader.h @@ -130,8 +130,19 @@ enum { GFX9_SGPR_TCS_SHADER_BUFFERS_HI, GFX9_TCS_NUM_USER_SGPR, + /* GFX9: Merged ES-GS (VS-GS or TES-GS). */ + GFX9_SGPR_GS_CONST_BUFFERS = SI_VS_NUM_USER_SGPR, + GFX9_SGPR_GS_CONST_BUFFERS_HI, + GFX9_SGPR_GS_SAMPLERS, + GFX9_SGPR_GS_SAMPLERS_HI, + GFX9_SGPR_GS_IMAGES, + GFX9_SGPR_GS_IMAGES_HI, + GFX9_SGPR_GS_SHADER_BUFFERS, + GFX9_SGPR_GS_SHADER_BUFFERS_HI, + GFX9_GS_NUM_USER_SGPR, + /* GS limits */ - SI_GS_NUM_USER_SGPR = SI_NUM_RESOURCE_SGPRS, + GFX6_GS_NUM_USER_SGPR = SI_NUM_RESOURCE_SGPRS, SI_GSCOPY_NUM_USER_SGPR = SI_SGPR_RW_BUFFERS_HI + 1, /* PS only */ diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c index b04ad92..cb65c0a 100644 --- a/src/gallium/drivers/radeonsi/si_state_shaders.c +++ b/src/gallium/drivers/radeonsi/si_state_shaders.c @@ -644,7 +644,7 @@ static void si_shader_gs(struct si_shader *shader) S_00B228_DX10_CLAMP(1) | S_00B228_FLOAT_MODE(shader->config.float_mode)); si_pm4_set_reg(pm4, R_00B22C_SPI_SHADER_PGM_RSRC2_GS, - S_00B22C_USER_SGPR(SI_GS_NUM_USER_SGPR) | + S_00B22C_USER_SGPR(GFX6_GS_NUM_USER_SGPR) | S_00B22C_SCRATCH_EN(shader->config.scratch_bytes_per_wave > 0)); } -- 2.7.4