From a9f7b1993b709ffbbeeaeff232701639ca31ef95 Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Mon, 13 May 2019 14:31:15 +0200 Subject: [PATCH] clk: meson: g12a: add controller register init Add the MPLL common register initial setting Signed-off-by: Jerome Brunet --- drivers/clk/meson/g12a.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c index eda4990..9df90ba 100644 --- a/drivers/clk/meson/g12a.c +++ b/drivers/clk/meson/g12a.c @@ -2992,10 +2992,16 @@ static struct clk_regmap *const g12a_clk_regmaps[] = { &g12a_vdec_hevcf, }; +static const struct reg_sequence g12a_init_regs[] = { + { .reg = HHI_MPLL_CNTL0, .def = 0x00000543 }, +}; + static const struct meson_eeclkc_data g12a_clkc_data = { .regmap_clks = g12a_clk_regmaps, .regmap_clk_num = ARRAY_SIZE(g12a_clk_regmaps), - .hw_onecell_data = &g12a_hw_onecell_data + .hw_onecell_data = &g12a_hw_onecell_data, + .init_regs = g12a_init_regs, + .init_count = ARRAY_SIZE(g12a_init_regs), }; static const struct of_device_id clkc_match_table[] = { -- 2.7.4