From a9d3ac1e891f37fe405d8aaa4653d27ed818871c Mon Sep 17 00:00:00 2001 From: Richard Guenther Date: Tue, 24 Jan 2012 09:17:01 +0000 Subject: [PATCH] [multiple changes] 2012-01-24 Richard Guenther Forward-port to trunk 2010-09-21 Jakub Jelinek PR middle-end/45678 * expr.c (expand_expr_real_1) : If op0 isn't sufficiently aligned and there is movmisalignM insn for mode, use it to load op0 into a temporary register. From-SVN: r183470 --- gcc/ChangeLog | 10 ++++++++++ gcc/expr.c | 22 ++++++++++++++++++++++ 2 files changed, 32 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6455954..554ad1e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2012-01-24 Richard Guenther + + Forward-port to trunk + 2010-09-21 Jakub Jelinek + + PR middle-end/45678 + * expr.c (expand_expr_real_1) : If + op0 isn't sufficiently aligned and there is movmisalignM + insn for mode, use it to load op0 into a temporary register. + 2012-01-24 Jakub Jelinek PR target/51957 diff --git a/gcc/expr.c b/gcc/expr.c index fb93346..e181ee3 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -10044,10 +10044,32 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, results. */ if (MEM_P (op0)) { + enum insn_code icode; + op0 = copy_rtx (op0); if (TYPE_ALIGN_OK (type)) set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type))); + else if (mode != BLKmode + && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode) + /* If the target does have special handling for unaligned + loads of mode then use them. */ + && ((icode = optab_handler (movmisalign_optab, mode)) + != CODE_FOR_nothing)) + { + rtx reg, insn; + + op0 = adjust_address (op0, mode, 0); + /* We've already validated the memory, and we're creating a + new pseudo destination. The predicates really can't + fail. */ + reg = gen_reg_rtx (mode); + + /* Nor can the insn generator. */ + insn = GEN_FCN (icode) (reg, op0); + emit_insn (insn); + return reg; + } else if (STRICT_ALIGNMENT && mode != BLKmode && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode)) -- 2.7.4