From a878e1ffe29c25b48b5ba24e5924cc1e06632d4b Mon Sep 17 00:00:00 2001
From: Evoke Zhang <evoke.zhang@amlogic.com>
Date: Fri, 16 Aug 2019 19:56:21 +0800
Subject: [PATCH] tvafe: add pq table management [1/1]

PD#SWPL-12842

Problem:
tvafe pq setting logic is not very clear

Solution:
add pq table management for different port and format

Verify:
x301

Change-Id: I9d7ae16166c73a997d9697e61bf77a87ba743d5c
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
---
 MAINTAINERS                                        |   4 +
 drivers/amlogic/media/vin/tvin/tvafe/Makefile      |   2 +-
 drivers/amlogic/media/vin/tvin/tvafe/tvafe.c       | 114 ++--
 drivers/amlogic/media/vin/tvin/tvafe/tvafe.h       |   5 +-
 drivers/amlogic/media/vin/tvin/tvafe/tvafe_cvd.c   | 147 ++----
 drivers/amlogic/media/vin/tvin/tvafe/tvafe_cvd.h   |   2 +-
 drivers/amlogic/media/vin/tvin/tvafe/tvafe_debug.c |  33 +-
 .../amlogic/media/vin/tvin/tvafe/tvafe_general.c   |  86 +--
 .../amlogic/media/vin/tvin/tvafe/tvafe_general.h   |  23 +-
 .../amlogic/media/vin/tvin/tvafe/tvafe_pq_table.c  | 582 +++++++++++++++++++++
 drivers/amlogic/media/vin/tvin/tvafe/tvafe_vbi.c   |  51 +-
 11 files changed, 757 insertions(+), 292 deletions(-)
 create mode 100644 drivers/amlogic/media/vin/tvin/tvafe/tvafe_pq_table.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 307ec06..ceeffc1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -15105,6 +15105,10 @@ M:  huijie huang <huijie.huang@amlogic.com>
 F:  arch/arm/boot/dts/amlogic/sm1_s905y3_ac223.dts
 F:  arch/arm64/boot/dts/amlogic/sm1_s905y3_ac223.dts
 
+AMLOGIC TVAFE DRIVER
+M:      Evoke Zhang <evoke.zhang@amlogic.com>
+F:      drivers/amlogic/media/vin/tvin/tvafe/tvafe_pq_table.c
+
 AMLOGIC DEINTERLACE DRIVER
 M:	Jihong Sui <jihong.sui@amlogic.com>
 F:	drivers/amlogic/media/deinterlace/di_pqa.h
diff --git a/drivers/amlogic/media/vin/tvin/tvafe/Makefile b/drivers/amlogic/media/vin/tvin/tvafe/Makefile
index ae1b0e6..c0321e4 100644
--- a/drivers/amlogic/media/vin/tvin/tvafe/Makefile
+++ b/drivers/amlogic/media/vin/tvin/tvafe/Makefile
@@ -2,7 +2,7 @@
 # Makefile for TVAFE.
 #
 obj-$(CONFIG_AMLOGIC_MEDIA_TVIN_AFE) += tvin_afe.o
-tvin_afe-objs := tvafe_cvd.o tvafe_general.o tvafe_debug.o tvafe.o
+tvin_afe-objs := tvafe_cvd.o tvafe_general.o tvafe_debug.o tvafe_pq_table.o tvafe.o
 
 obj-$(CONFIG_AMLOGIC_MEDIA_TVIN_VBI) += tvafe_vbi.o
 obj-$(CONFIG_AMLOGIC_MEDIA_TVIN_AVDETECT) += tvin_avin_detect.o
diff --git a/drivers/amlogic/media/vin/tvin/tvafe/tvafe.c b/drivers/amlogic/media/vin/tvin/tvafe/tvafe.c
index b021b348..a43c8fd 100644
--- a/drivers/amlogic/media/vin/tvin/tvafe/tvafe.c
+++ b/drivers/amlogic/media/vin/tvin/tvafe/tvafe.c
@@ -81,6 +81,7 @@ static struct am_regs_s tvaferegs;
 static struct tvafe_pin_mux_s tvafe_pinmux;
 static struct meson_tvafe_data *s_tvafe_data;
 static struct tvafe_clkgate_type tvafe_clkgate;
+static struct tvafe_dev_s *tvafe_dev_local;
 
 static bool enable_db_reg = true;
 module_param(enable_db_reg, bool, 0644);
@@ -154,6 +155,31 @@ struct tvafe_user_param_s *tvafe_get_user_param(void)
 	return &tvafe_user_param;
 }
 
+struct tvafe_dev_s *tvafe_get_dev(void)
+{
+	return tvafe_dev_local;
+}
+
+static int tvafe_pq_config_update(struct tvafe_dev_s *devp,
+				  enum tvin_port_e port)
+{
+	if ((port == TVIN_PORT_CVBS1) || (port == TVIN_PORT_CVBS2)) {
+		devp->pq_conf = s_tvafe_data->cvbs_pq_conf;
+		if (tvafe_dbg_print & TVAFE_DBG_NORMAL) {
+			tvafe_pr_info("%s: select cvbs_pq config\n",
+				      __func__);
+		}
+	} else {
+		devp->pq_conf = s_tvafe_data->rf_pq_conf;
+		if (tvafe_dbg_print & TVAFE_DBG_NORMAL) {
+			tvafe_pr_info("%s: select rf_pq config\n",
+				      __func__);
+		}
+	}
+
+	return 0;
+}
+
 /*
  * tvafe check support port
  */
@@ -284,6 +310,7 @@ static int tvafe_dec_open(struct tvin_frontend_s *fe, enum tvin_port_e port)
 #endif
 	/* init variable */
 	memset(tvafe, 0, sizeof(struct tvafe_info_s));
+	tvafe_pq_config_update(devp, port);
 	/**enable and reset tvafe clock**/
 	tvafe_enable_module(true);
 	devp->flags &= (~TVAFE_POWERDOWN_IN_IDLE);
@@ -1266,50 +1293,46 @@ static void tvafe_user_parameters_config(struct device_node *of_node)
 	}
 }
 
-struct meson_tvafe_data meson_gxtvbb_tvafe_data = {
-	.cpu_id = CPU_TYPE_GXTVBB,
-	.name = "meson-gxtvbb-tvafe",
-};
-
-struct meson_tvafe_data meson_txl_tvafe_data = {
+static struct meson_tvafe_data meson_txl_tvafe_data = {
 	.cpu_id = CPU_TYPE_TXL,
 	.name = "meson-txl-tvafe",
+
+	.cvbs_pq_conf = NULL,
+	.rf_pq_conf = NULL,
 };
 
-struct meson_tvafe_data meson_txlx_tvafe_data = {
+static struct meson_tvafe_data meson_txlx_tvafe_data = {
 	.cpu_id = CPU_TYPE_TXLX,
 	.name = "meson-txlx-tvafe",
-};
 
-struct meson_tvafe_data meson_txhd_tvafe_data = {
-	.cpu_id = CPU_TYPE_TXHD,
-	.name = "meson-txhd-tvafe",
+	.cvbs_pq_conf = NULL,
+	.rf_pq_conf = NULL,
 };
 
-struct meson_tvafe_data meson_tl1_tvafe_data = {
+static struct meson_tvafe_data meson_tl1_tvafe_data = {
 	.cpu_id = CPU_TYPE_TL1,
 	.name = "meson-tl1-tvafe",
+
+	.cvbs_pq_conf = NULL,
+	.rf_pq_conf = NULL,
 };
 
-struct meson_tvafe_data meson_tm2_tvafe_data = {
+static struct meson_tvafe_data meson_tm2_tvafe_data = {
 	.cpu_id = CPU_TYPE_TM2,
 	.name = "meson-tm2-tvafe",
+
+	.cvbs_pq_conf = NULL,
+	.rf_pq_conf = NULL,
 };
 
 static const struct of_device_id meson_tvafe_dt_match[] = {
 	{
-		.compatible = "amlogic, tvafe-gxtvbb",
-		.data		= &meson_gxtvbb_tvafe_data,
-	}, {
 		.compatible = "amlogic, tvafe-txl",
 		.data		= &meson_txl_tvafe_data,
 	}, {
 		.compatible = "amlogic, tvafe-txlx",
 		.data		= &meson_txlx_tvafe_data,
 	}, {
-		.compatible = "amlogic, tvafe-txhd",
-		.data		= &meson_txhd_tvafe_data,
-	}, {
 		.compatible = "amlogic, tvafe-tl1",
 		.data		= &meson_tl1_tvafe_data,
 	}, {
@@ -1341,9 +1364,24 @@ static int tvafe_drv_probe(struct platform_device *pdev)
 	s_tvafe_data = (struct meson_tvafe_data *)match->data;
 	tvafe_pr_info("%s:cpu_id:%d,name:%s\n", __func__,
 		s_tvafe_data->cpu_id, s_tvafe_data->name);
+	tvafe_pq_config_probe(s_tvafe_data);
 
 	tvafe_clktree_probe(&pdev->dev);
 
+	ret = alloc_chrdev_region(&tvafe_devno, 0, 1, TVAFE_NAME);
+	if (ret < 0) {
+		tvafe_pr_err("%s: failed to allocate major number\n", __func__);
+		goto fail_alloc_cdev_region;
+	}
+	tvafe_pr_info("%s: major %d\n", __func__, MAJOR(tvafe_devno));
+
+	tvafe_clsp = class_create(THIS_MODULE, TVAFE_NAME);
+	if (IS_ERR(tvafe_clsp)) {
+		ret = PTR_ERR(tvafe_clsp);
+		tvafe_pr_err("%s: failed to create class\n", __func__);
+		goto fail_class_create;
+	}
+
 	/* allocate memory for the per-device structure */
 	tdevp = kzalloc(sizeof(struct tvafe_dev_s), GFP_KERNEL);
 	if (!tdevp)
@@ -1492,6 +1530,7 @@ static int tvafe_drv_probe(struct platform_device *pdev)
 	av2_plugin_state = 0;
 #endif
 
+	tvafe_dev_local = tdevp;
 	tdevp->sizeof_tvafe_dev_s = sizeof(struct tvafe_dev_s);
 
 	disableapi = false;
@@ -1510,8 +1549,11 @@ fail_get_id:
 	kfree(tdevp);
 fail_kzalloc_tdev:
 	tvafe_pr_err("tvafe: kzalloc memory failed.\n");
+	class_destroy(tvafe_clsp);
+fail_class_create:
+	unregister_chrdev_region(tvafe_devno, 1);
+fail_alloc_cdev_region:
 	return ret;
-
 }
 
 static int tvafe_drv_remove(struct platform_device *pdev)
@@ -1531,6 +1573,11 @@ static int tvafe_drv_remove(struct platform_device *pdev)
 	tvafe_delete_device(tdevp->index);
 	cdev_del(&tdevp->cdev);
 	kfree(tdevp);
+	tvafe_dev_local = NULL;
+
+	class_destroy(tvafe_clsp);
+	unregister_chrdev_region(tvafe_devno, 1);
+
 	tvafe_pr_info("driver removed ok.\n");
 	return 0;
 }
@@ -1610,42 +1657,17 @@ static int __init tvafe_drv_init(void)
 {
 	int ret = 0;
 
-	ret = alloc_chrdev_region(&tvafe_devno, 0, 1, TVAFE_NAME);
-	if (ret < 0) {
-		tvafe_pr_err("%s: failed to allocate major number\n", __func__);
-		goto fail_alloc_cdev_region;
-	}
-	tvafe_pr_info("%s: major %d\n", __func__, MAJOR(tvafe_devno));
-
-	tvafe_clsp = class_create(THIS_MODULE, TVAFE_NAME);
-	if (IS_ERR(tvafe_clsp)) {
-		ret = PTR_ERR(tvafe_clsp);
-		tvafe_pr_err("%s: failed to create class\n", __func__);
-		goto fail_class_create;
-	}
-
 	ret = platform_driver_register(&tvafe_driver);
 	if (ret != 0) {
 		tvafe_pr_err("%s: failed to register driver\n", __func__);
-		goto fail_pdrv_register;
+		return ret;
 	}
 	/*tvafe_pr_info("tvafe_drv_init.\n");*/
 	return 0;
-
-fail_pdrv_register:
-	class_destroy(tvafe_clsp);
-fail_class_create:
-	unregister_chrdev_region(tvafe_devno, 1);
-fail_alloc_cdev_region:
-	return ret;
-
-
 }
 
 static void __exit tvafe_drv_exit(void)
 {
-	class_destroy(tvafe_clsp);
-	unregister_chrdev_region(tvafe_devno, 1);
 	platform_driver_unregister(&tvafe_driver);
 	tvafe_pr_info("tvafe_drv_exit.\n");
 }
diff --git a/drivers/amlogic/media/vin/tvin/tvafe/tvafe.h b/drivers/amlogic/media/vin/tvin/tvafe/tvafe.h
index b66039d..466aa0f 100644
--- a/drivers/amlogic/media/vin/tvin/tvafe/tvafe.h
+++ b/drivers/amlogic/media/vin/tvin/tvafe/tvafe.h
@@ -51,7 +51,6 @@
 /************************************************************* */
 /* *** structure definitions ********************************************* */
 /************************************************************* */
-
 /* tvafe module structure */
 struct tvafe_info_s {
 	struct tvin_parm_s parm;
@@ -105,6 +104,8 @@ struct tvafe_dev_s {
 
 	struct tvafe_info_s tvafe;
 
+	struct tvafe_reg_table_s **pq_conf;
+
 	unsigned int cma_config_en;
 	/*cma_config_flag:1:share with codec_mm;0:cma alone*/
 	unsigned int cma_config_flag;
@@ -122,6 +123,7 @@ bool tvafe_get_snow_cfg(void);
 void tvafe_set_snow_cfg(bool cfg);
 
 struct tvafe_user_param_s *tvafe_get_user_param(void);
+struct tvafe_dev_s *tvafe_get_dev(void);
 
 typedef int (*hook_func_t)(void);
 typedef int (*hook_func1_t)(bool);
@@ -136,6 +138,7 @@ extern int tvafe_hiu_reg_read(unsigned int reg, unsigned int *val);
 extern int tvafe_hiu_reg_write(unsigned int reg, unsigned int val);
 extern int tvafe_device_create_file(struct device *dev);
 extern void tvafe_remove_device_files(struct device *dev);
+int tvafe_pq_config_probe(struct meson_tvafe_data *tvafe_data);
 
 extern bool disableapi;
 extern bool force_stable;
diff --git a/drivers/amlogic/media/vin/tvin/tvafe/tvafe_cvd.c b/drivers/amlogic/media/vin/tvin/tvafe/tvafe_cvd.c
index 7248451..438a810 100644
--- a/drivers/amlogic/media/vin/tvin/tvafe/tvafe_cvd.c
+++ b/drivers/amlogic/media/vin/tvin/tvafe/tvafe_cvd.c
@@ -110,7 +110,6 @@ static const unsigned int cvd_mem_4f_length[TVIN_SIG_FMT_CVBS_SECAM-
 static int force_fmt_flag;
 static bool scene_colorful_old;
 static int lock_cnt;
-static unsigned int cvd_reg8a = 0xa;
 static bool ntsc50_en;
 
 static int cdto_adj_th = TVAFE_CVD2_CDTO_ADJ_TH;
@@ -382,10 +381,9 @@ static void tvafe_cvd2_write_mode_reg(struct tvafe_cvd2_s *cvd2,
 				TVIN_SIG_FMT_CVBS_NTSC_M][i]));
 	}
 
-	/*setting for txhd snow*/
+	/*setting for snow*/
 	if (tvafe_get_snow_cfg() &&
-		(tvafe_cpu_type() == CPU_TYPE_TXHD ||
-		tvafe_cpu_type() == CPU_TYPE_TL1 ||
+		(tvafe_cpu_type() == CPU_TYPE_TL1 ||
 		tvafe_cpu_type() == CPU_TYPE_TM2)) {
 		W_APB_BIT(CVD2_OUTPUT_CONTROL, 3, 5, 2);
 		W_APB_REG(ACD_REG_6C, 0x80500000);
@@ -407,34 +405,6 @@ static void tvafe_cvd2_write_mode_reg(struct tvafe_cvd2_s *cvd2,
 		W_APB_REG(CVD2_REG_B6, 0x0);
 	}
 
-	if ((cvd2->vd_port == TVIN_PORT_CVBS1) ||
-		(cvd2->vd_port == TVIN_PORT_CVBS2)) { /* avin */
-		if (cvd2->config_fmt == TVIN_SIG_FMT_CVBS_NTSC_M) {
-			W_APB_REG(CVD2_VSYNC_SIGNAL_THRESHOLD, 0x7d);
-			if (tvafe_cpu_type() == CPU_TYPE_TL1) {
-				W_APB_REG(CVD2_CONTROL1, 0x8);
-				W_APB_REG(CVD2_2DCOMB_NOISE_TH, 0x84);
-				W_APB_REG(CVD2_REG_B0, 0x0);
-				W_APB_REG(CVD2_3DCOMB_FILTER, 0xf);
-			}
-		}
-		if (cvd2->config_fmt == TVIN_SIG_FMT_CVBS_PAL_I) {
-			if (tvafe_cpu_type() == CPU_TYPE_TL1) {
-				W_APB_REG(ACD_REG_89, 0x80010004);
-				W_APB_REG(ACD_REG_8A, 0x100004);
-				W_APB_REG(ACD_REG_8B, 0x100000);
-				W_APB_REG(ACD_REG_8C, 0x38000);
-			}
-		}
-	} else if ((cvd2->vd_port == TVIN_PORT_CVBS3) ||
-			(cvd2->vd_port == TVIN_PORT_CVBS0)) { /* atv */
-		if (cvd2->config_fmt == TVIN_SIG_FMT_CVBS_PAL_I) {
-			if (user_param->force_vs_th_flag)
-				W_APB_REG(CVD2_VSYNC_SIGNAL_THRESHOLD,
-					(user_param->nostd_vs_th & 0xff));
-		}
-	}
-
 	/* reload CVD2 reg 0x87, 0x93, 0x94, 0x95, 0x96, 0xe6, 0xfa (int) */
 	W_APB_REG(((CVD_BASE_ADD+CVD_PART3_REG_0)<<2),
 		cvd_part3_table[cvd2->config_fmt-TVIN_SIG_FMT_CVBS_NTSC_M][0]);
@@ -450,45 +420,23 @@ static void tvafe_cvd2_write_mode_reg(struct tvafe_cvd2_s *cvd2,
 		cvd_part3_table[cvd2->config_fmt-TVIN_SIG_FMT_CVBS_NTSC_M][5]);
 	W_APB_REG(((CVD_BASE_ADD+CVD_PART3_REG_6)<<2),
 		cvd_part3_table[cvd2->config_fmt-TVIN_SIG_FMT_CVBS_NTSC_M][6]);
-
-	/* for tuner picture quality */
-
 	if ((cvd2->vd_port == TVIN_PORT_CVBS3) ||
-		(cvd2->vd_port == TVIN_PORT_CVBS0)) {
-
-		W_APB_REG(CVD2_REG_B0, 0xf0);
-		W_APB_BIT(CVD2_REG_B2, 0,
-			ADAPTIVE_CHROMA_MODE_BIT, ADAPTIVE_CHROMA_MODE_WID);
-		W_APB_BIT(CVD2_CONTROL1, 0, CHROMA_BW_LO_BIT, CHROMA_BW_LO_WID);
-
-	} else {
-		W_APB_REG(CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0);
+			(cvd2->vd_port == TVIN_PORT_CVBS0)) { /* atv */
 		if (cvd2->config_fmt == TVIN_SIG_FMT_CVBS_PAL_I) {
-				/*add for chroma state adjust dynamicly*/
-			W_APB_REG(CVD2_CHROMA_LOOPFILTER_STATE, cvd_reg8a);
-		}
-		if ((cvd2->config_fmt == TVIN_SIG_FMT_CVBS_NTSC_M) ||
-			(cvd2->config_fmt == TVIN_SIG_FMT_CVBS_PAL_M) ||
-			(cvd2->config_fmt == TVIN_SIG_FMT_CVBS_SECAM)) {
-			W_APB_BIT(CVD2_REG_B2, 1,
-			ADAPTIVE_CHROMA_MODE_BIT, ADAPTIVE_CHROMA_MODE_WID);
-			W_APB_REG(CVD2_CHROMA_EDGE_ENHANCEMENT, 0x22);
-		}
-		if (cvd2->config_fmt == TVIN_SIG_FMT_CVBS_NTSC_M) {
-			if (tvafe_cpu_type() >= CPU_TYPE_TL1) {
-				/* fix Purple and green junctions is wider */
-				W_APB_BIT(CVD2_REG_FA, 0,
-					UV_FILTER_TYPE_BIT, UV_FILTER_TYPE_WID);
-			}
+			if (user_param->force_vs_th_flag)
+				W_APB_REG(CVD2_VSYNC_SIGNAL_THRESHOLD,
+					  (user_param->nostd_vs_th & 0xff));
 		}
 	}
+
 #ifdef TVAFE_CVD2_CC_ENABLE
 	W_APB_REG(CVD2_VBI_DATA_TYPE_LINE21, 0x00000011);
 	W_APB_REG(CVD2_VSYNC_VBI_LOCKOUT_START, 0x00000000);
 	W_APB_REG(CVD2_VSYNC_VBI_LOCKOUT_END, 0x00000025);
 	W_APB_REG(CVD2_VSYNC_TIME_CONSTANT, 0x0000000a);
 	W_APB_REG(CVD2_VBI_CC_START, 0x00000054);
-	W_APB_REG(CVD2_VBI_FRAME_CODE_CTL, 0x11);
+	/*disable vbi*/
+	W_APB_REG(CVD2_VBI_FRAME_CODE_CTL, 0x10);
 	W_APB_REG(ACD_REG_22, 0x82080000); /* manuel reset vbi */
 	W_APB_REG(ACD_REG_22, 0x04080000);
 	/* vbi reset release, vbi agent enable */
@@ -510,16 +458,6 @@ static void tvafe_cvd2_write_mode_reg(struct tvafe_cvd2_s *cvd2,
 	}
 #endif
 
-	/* add for board e04&e08  */
-	if (((cvd2->vd_port == TVIN_PORT_CVBS3) ||
-		(cvd2->vd_port == TVIN_PORT_CVBS0)) &&
-		(CVD_REG07_PAL != 0x03)
-		&& (cvd2->config_fmt == TVIN_SIG_FMT_CVBS_PAL_I))
-		W_APB_REG(CVD2_OUTPUT_CONTROL, CVD_REG07_PAL);
-
-	/*disable vbi*/
-	W_APB_REG(CVD2_VBI_FRAME_CODE_CTL, 0x10);
-
 	/* 3D comb filter buffer assignment */
 	tvafe_cvd2_memory_init(mem, cvd2->config_fmt);
 
@@ -544,24 +482,34 @@ static void tvafe_cvd2_write_mode_reg(struct tvafe_cvd2_s *cvd2,
 		W_APB_BIT(CVD2_VSYNC_TIME_CONSTANT, 0, 7, 1);
 
 	W_APB_REG(ACD_REG_22, 0x04080000);
-	/*enable vbi*/
-	W_APB_REG(CVD2_VBI_FRAME_CODE_CTL, 0x11);
-	pr_info("[tvafe..] %s: enable vbi\n", __func__);
 #endif
-	/*for palm moonoscope pattern color flash*/
-	if (cvd2->config_fmt == TVIN_SIG_FMT_CVBS_PAL_M) {
-		W_APB_REG(ACD_REG_22, 0x2020000);
-		W_APB_REG(CVD2_NOISE_THRESHOLD, 0xff);
-		W_APB_REG(CVD2_NON_STANDARD_SIGNAL_THRESHOLD, 0x20);
-	}
 
-	/*set for wipe off vertical stripes*/
-	if (cvd2->vd_port == TVIN_PORT_CVBS1 ||
-		cvd2->vd_port == TVIN_PORT_CVBS2) {
-		if (tvafe_cpu_type() >= CPU_TYPE_TL1)
-			W_APB_REG(ACD_REG_25, 0xeafb4e8e);
-		else if (tvafe_cpu_type() >= CPU_TYPE_TXL)
-			W_APB_REG(ACD_REG_25, 0x00e941a8);
+	/* for tuner picture quality */
+	if (cvd2->pq_conf) {
+		i = 0;
+		while (i < TVAFE_PQ_CONFIG_NUM_MAX) {
+			if (cvd2->pq_conf[i].reg == 0xffffffff)
+				break;
+			if (cvd2->pq_conf[i].mask == 0xffffffff) {
+				W_APB_REG(cvd2->pq_conf[i].reg,
+					  cvd2->pq_conf[i].val);
+			} else {
+				W_APB_REG(cvd2->pq_conf[i].reg,
+					  (R_APB_REG(cvd2->pq_conf[i].reg) &
+						(~(cvd2->pq_conf[i].mask))) |
+					(cvd2->pq_conf[i].val &
+						cvd2->pq_conf[i].mask));
+			}
+			if (tvafe_dbg_print & TVAFE_DBG_NORMAL) {
+				tvafe_pr_info("%s: pq: 0x%x=0x%x val=0x%x mask=0x%x\n",
+					      __func__,
+					(cvd2->pq_conf[i].reg >> 2),
+					R_APB_REG(cvd2->pq_conf[i].reg),
+					cvd2->pq_conf[i].val,
+					cvd2->pq_conf[i].mask);
+			}
+			i++;
+		}
 	}
 
 	/* enable CVD2 */
@@ -843,11 +791,22 @@ void tvafe_cvd2_set_default_cdto(struct tvafe_cvd2_s *cvd2)
 
 static void tvafe_cvd2_info_init(struct tvafe_cvd2_s *cvd2)
 {
+	struct tvafe_dev_s *devp = tvafe_get_dev();
+	unsigned int index;
+
 	/* init variable */
 	memset(&cvd2->info, 0, sizeof(struct tvafe_cvd2_info_s));
 
 	/* set default value if needed */
 	cvd2->info.scene_colorful = 1;
+
+	if (devp->pq_conf) {
+		index = cvd2->config_fmt - TVIN_SIG_FMT_CVBS_NTSC_M;
+		cvd2->pq_conf = devp->pq_conf[index];
+	} else {
+		tvafe_pr_err("%s: cvd2 pq_conf is null\n",
+			     __func__);
+	}
 }
 
 /*
@@ -871,8 +830,8 @@ inline void tvafe_cvd2_try_format(struct tvafe_cvd2_s *cvd2,
 		tvafe_pr_info("%s: try new fmt:%s\n",
 				__func__, tvin_sig_fmt_str(fmt));
 		cvd2->config_fmt = fmt;
-		tvafe_cvd2_write_mode_reg(cvd2, mem);
 		tvafe_cvd2_info_init(cvd2);
+		tvafe_cvd2_write_mode_reg(cvd2, mem);
 	}
 }
 
@@ -2732,12 +2691,6 @@ void tvafe_cvd2_hold_rst(void)
 	W_APB_BIT(CVD2_RESET_REGISTER, 1, SOFT_RST_BIT, SOFT_RST_WID);
 }
 
-void tvafe_cvd2_set_reg8a(unsigned int v)
-{
-	cvd_reg8a = v;
-	W_APB_REG(CVD2_CHROMA_LOOPFILTER_STATE, cvd_reg8a);
-}
-
 void tvafe_cvd2_rf_ntsc50_en(bool v)
 {
 	ntsc50_en = v;
@@ -2746,7 +2699,6 @@ void tvafe_cvd2_rf_ntsc50_en(bool v)
 void tvafe_snow_config(unsigned int onoff)
 {
 	if (tvafe_snow_function_flag == 0 ||
-		tvafe_cpu_type() == CPU_TYPE_TXHD ||
 		tvafe_cpu_type() == CPU_TYPE_TL1 ||
 		tvafe_cpu_type() == CPU_TYPE_TM2)
 		return;
@@ -2758,9 +2710,8 @@ void tvafe_snow_config(unsigned int onoff)
 
 void tvafe_snow_config_clamp(unsigned int onoff)
 {
-	if (tvafe_cpu_type() == CPU_TYPE_TXHD ||
-		tvafe_cpu_type() == CPU_TYPE_TL1 ||
-		tvafe_cpu_type() == CPU_TYPE_TM2) {
+	if (tvafe_cpu_type() == CPU_TYPE_TL1 ||
+	    tvafe_cpu_type() == CPU_TYPE_TM2) {
 		if (onoff)
 			vdin_adjust_tvafesnow_brightness();
 		return;
diff --git a/drivers/amlogic/media/vin/tvin/tvafe/tvafe_cvd.h b/drivers/amlogic/media/vin/tvin/tvafe/tvafe_cvd.h
index 7ecfea2..d034d27 100644
--- a/drivers/amlogic/media/vin/tvin/tvafe/tvafe_cvd.h
+++ b/drivers/amlogic/media/vin/tvin/tvafe/tvafe_cvd.h
@@ -170,6 +170,7 @@ struct tvafe_cvd2_s {
 	struct tvafe_cvd2_hw_data_s hw_data[3];
 	struct tvafe_cvd2_hw_data_s hw;
 	struct tvafe_cvd2_info_s info;
+	struct tvafe_reg_table_s *pq_conf;
 	unsigned int fmt_loop_cnt;
 	unsigned char hw_data_cur;
 	enum tvin_port_e vd_port;
@@ -212,7 +213,6 @@ extern enum tvafe_cvbs_video_e tvafe_cvd2_get_lock_status(
 extern int tvafe_cvd2_get_atv_format(void);
 extern int tvafe_cvd2_get_hv_lock(void);
 extern void tvafe_cvd2_hold_rst(void);
-extern void tvafe_cvd2_set_reg8a(unsigned int v);
 extern void tvafe_snow_config(unsigned int onoff);
 extern void tvafe_snow_config_clamp(unsigned int onoff);
 extern void tvafe_snow_config_acd(void);
diff --git a/drivers/amlogic/media/vin/tvin/tvafe/tvafe_debug.c b/drivers/amlogic/media/vin/tvin/tvafe/tvafe_debug.c
index 4648832..f1b56dc 100644
--- a/drivers/amlogic/media/vin/tvin/tvafe/tvafe_debug.c
+++ b/drivers/amlogic/media/vin/tvin/tvafe/tvafe_debug.c
@@ -469,6 +469,13 @@ static ssize_t tvafe_store(struct device *dev,
 		}
 		pr_info("[tvafe..]%s: tvafe_dbg_print = 0x%x\n",
 			__func__, tvafe_dbg_print);
+	} else if (!strncmp(buff, "print", strlen("print"))) {
+		if (parm[1]) {
+			if (kstrtouint(parm[1], 16, &tvafe_dbg_print) < 0)
+				goto tvafe_store_err;
+		}
+		pr_info("[tvafe..]%s: tvafe_dbg_print = 0x%x\n",
+			__func__, tvafe_dbg_print);
 	} else
 		tvafe_pr_info("[%s]:invaild command.\n", __func__);
 	kfree(buf_orig);
@@ -507,7 +514,7 @@ static const char *tvafe_debug_usage_str = {
 "\n"
 "    echo skip_vf_num val(d) > /sys/class/tvafe/tvafe0/debug;set skip_vf_num for vdin\n"
 "\n"
-"    echo dbg_print val(h) > /sys/class/tvafe/tvafe0/debug;enable debug print\n"
+"    echo print val(h) > /sys/class/tvafe/tvafe0/debug;enable debug print\n"
 "    bit[0]: normal debug info\n"
 "    bit[4]: vsync isr debug info\n"
 "    bit[8]: smr debug info\n"
@@ -621,28 +628,6 @@ static ssize_t tvafe_dumpmem_store(struct device *dev,
 
 static DEVICE_ATTR(dumpmem, 0200, NULL, tvafe_dumpmem_store);
 
-/*echo n >/sys/class/tvafe/tvafe0/cvd_reg8a set register of cvd2*/
-static ssize_t tvafe_cvd_reg8a_store(struct device *dev,
-		struct device_attribute *attr, const char *buff, size_t count)
-{
-	unsigned int n;
-	struct tvafe_dev_s *devp;
-
-	devp = dev_get_drvdata(dev);
-	if (kstrtouint(buff, 10, &n) != 0)
-		return -1;
-	if (!(devp->flags & TVAFE_FLAG_DEV_OPENED)) {
-
-		tvafe_pr_err("tvafe havn't opened, error!!!\n");
-		return count;
-	}
-	tvafe_cvd2_set_reg8a(n);
-	tvafe_pr_info(" set register of cvd 0x8a to %u.\n", n);
-	return count;
-}
-
-static DEVICE_ATTR(cvd_reg8a, 0200, NULL, tvafe_cvd_reg8a_store);
-
 static ssize_t tvafereg_store(struct device *dev,
 		struct device_attribute *attr, const char *buff, size_t count)
 {
@@ -867,7 +852,6 @@ int tvafe_device_create_file(struct device *dev)
 	int ret = 0;
 
 	ret |= device_create_file(dev, &dev_attr_debug);
-	ret |= device_create_file(dev, &dev_attr_cvd_reg8a);
 	ret |= device_create_file(dev, &dev_attr_dumpmem);
 	ret |= device_create_file(dev, &dev_attr_reg);
 	ret |= device_create_file(dev, &dev_attr_cutwin);
@@ -880,7 +864,6 @@ void tvafe_remove_device_files(struct device *dev)
 	device_remove_file(dev, &dev_attr_cutwin);
 	device_remove_file(dev, &dev_attr_debug);
 	device_remove_file(dev, &dev_attr_dumpmem);
-	device_remove_file(dev, &dev_attr_cvd_reg8a);
 	device_remove_file(dev, &dev_attr_debug);
 }
 
diff --git a/drivers/amlogic/media/vin/tvin/tvafe/tvafe_general.c b/drivers/amlogic/media/vin/tvin/tvafe/tvafe_general.c
index 6685246..40058c4 100644
--- a/drivers/amlogic/media/vin/tvin/tvafe/tvafe_general.c
+++ b/drivers/amlogic/media/vin/tvin/tvafe/tvafe_general.c
@@ -284,6 +284,9 @@ static void tvafe_pq_apb_reg_trust_write(unsigned int addr,
 			break;
 		i++;
 	}
+	if (i >= size)
+		return;
+
 	/* check mask trust */
 	if ((mask & tvafe_pq_reg_trust_table[i][1]) != mask) {
 		tvafe_pr_info("%s: warning: reg 0x%x mask 0x%x is out of trust mask 0x%x, change to 0x%x!\n",
@@ -315,7 +318,6 @@ static enum tvafe_adc_ch_e tvafe_adc_pin_muxing(
 
 	if (tvafe_cpu_type() == CPU_TYPE_TXL ||
 		tvafe_cpu_type() == CPU_TYPE_TXLX ||
-		tvafe_cpu_type() == CPU_TYPE_TXHD ||
 		tvafe_cpu_type() >= CPU_TYPE_TL1) {
 		tvafe_pr_info("[tvafe]%s:pin:%d\n",
 			__func__, (unsigned int)pin);
@@ -450,11 +452,6 @@ static void tvafe_set_cvbs_default(struct tvafe_cvd2_s *cvd2,
 			W_HIU_REG(HHI_DADC_CNTL, 0x00102038);
 			W_HIU_REG(HHI_DADC_CNTL2, 0x00000406);
 			W_HIU_REG(HHI_DADC_CNTL3, 0x00082183);
-		} else if (tvafe_cpu_type() == CPU_TYPE_TXHD) {
-			/** DADC CNTL for LIF signal input **/
-			W_HIU_REG(HHI_DADC_CNTL, 0x00102038);
-			W_HIU_REG(HHI_DADC_CNTL2, 0x00000401);
-			W_HIU_REG(HHI_DADC_CNTL3, 0x00082183);
 		} else if (tvafe_cpu_type() >= CPU_TYPE_TL1) {
 			/** DADC CNTL for LIF signal input **/
 			W_HIU_REG(HHI_DADC_CNTL, 0x00303044);
@@ -472,10 +469,6 @@ static void tvafe_set_cvbs_default(struct tvafe_cvd2_s *cvd2,
 			tvafe_cpu_type() == CPU_TYPE_TXLX) {
 			W_HIU_REG(HHI_CADC_CNTL, 0x02000A08);
 			W_HIU_REG(HHI_CADC_CNTL2, 0x04007B05);
-		} else if (tvafe_cpu_type() == CPU_TYPE_TXHD) {
-			W_HIU_REG(HHI_DADC_CNTL, 0x00102038);
-			W_HIU_REG(HHI_DADC_CNTL2, 0x00000400);
-			W_HIU_REG(HHI_DADC_CNTL3, 0x00082183);
 		} else if (tvafe_cpu_type() >= CPU_TYPE_TL1) {
 			W_HIU_REG(HHI_DADC_CNTL, 0x00303044);
 			W_HIU_REG(HHI_DADC_CNTL2, 0x00003400);
@@ -494,7 +487,6 @@ static void tvafe_set_cvbs_default(struct tvafe_cvd2_s *cvd2,
 	}
 	if (tvafe_cpu_type() == CPU_TYPE_TXL ||
 		tvafe_cpu_type() == CPU_TYPE_TXLX ||
-		tvafe_cpu_type() == CPU_TYPE_TXHD ||
 		tvafe_cpu_type() >= CPU_TYPE_TL1) {
 		if (tvafe_cpu_type() >= CPU_TYPE_TL1) {
 			if (port == TVIN_PORT_CVBS3) {
@@ -511,42 +503,6 @@ static void tvafe_set_cvbs_default(struct tvafe_cvd2_s *cvd2,
 			W_APB_REG(TVFE_VAFE_CTRL0, 0x00090b00);
 			W_APB_REG(TVFE_VAFE_CTRL1, 0x00000110);
 			W_APB_REG(TVFE_VAFE_CTRL2, 0x0010ef93);
-			if (tvafe_cpu_type() == CPU_TYPE_TXHD) {
-				if (port == TVIN_PORT_CVBS3) {
-					/*enable fitler for atv/dtv*/
-					W_APB_BIT(TVFE_VAFE_CTRL0, 1,
-					VAFE_FILTER_EN_BIT, VAFE_FILTER_EN_WID);
-					/*increase current*/
-					W_APB_BIT(TVFE_VAFE_CTRL0, 2,
-						VAFE_FILTER_BIAS_ADJ_BIT,
-						VAFE_FILTER_BIAS_ADJ_WID);
-					/*increase band for atv/dtv*/
-					W_APB_BIT(TVFE_VAFE_CTRL0, 7,
-					VAFE_BW_SEL_BIT, VAFE_BW_SEL_WID);
-					W_APB_BIT(TVFE_VAFE_CTRL0, 0x10,
-						VAFE_FILTER_RESV_BIT,
-						VAFE_FILTER_RESV_WID);
-					/*disable pga for atv/dtv*/
-					W_APB_BIT(TVFE_VAFE_CTRL1, 0,
-					VAFE_PGA_EN_BIT, VAFE_PGA_EN_WID);
-					/*config from vlsi-xiaoniu for atv/dtv*/
-					/*disable afe buffer(bit0),*/
-					/*enable vafe buffer(bit28)*/
-					W_APB_REG(TVFE_VAFE_CTRL2, 0x1010eeb0);
-				/*W_APB_BIT(TVFE_VAFE_CTRL2, 1, 28, 1);*/
-				/*W_APB_BIT(TVFE_VAFE_CTRL2, 0, 0, 1);*/
-				} else if ((port == TVIN_PORT_CVBS1) ||
-					(port == TVIN_PORT_CVBS2)) {
-					W_APB_BIT(TVFE_VAFE_CTRL0, 1,
-					VAFE_FILTER_EN_BIT, VAFE_FILTER_EN_WID);
-					W_APB_BIT(TVFE_VAFE_CTRL1, 1,
-					VAFE_PGA_EN_BIT, VAFE_PGA_EN_WID);
-					/*enable Vref buffer*/
-					W_APB_BIT(TVFE_VAFE_CTRL2, 1, 28, 1);
-					/*enable afe buffer*/
-					W_APB_BIT(TVFE_VAFE_CTRL2, 1, 0, 1);
-				}
-			}
 		}
 
 #if (defined(CONFIG_ADC_DOUBLE_SAMPLING_FOR_CVBS) && defined(CRYSTAL_24M))
@@ -592,19 +548,6 @@ void tvafe_set_ddemod_default(void)
 		/*W_HIU_REG(HHI_VDAC_CNTL0, 0x00000200);*/
 		W_HIU_BIT(HHI_VDAC_CNTL0, 1, 9, 1);
 
-	} else if (tvafe_cpu_type() == CPU_TYPE_TXHD) {
-		W_HIU_REG(HHI_DADC_CNTL, 0x00102038);
-		W_HIU_REG(HHI_DADC_CNTL2, 0x00000401);
-		W_HIU_REG(HHI_DADC_CNTL3, 0x00082183);
-
-		/*W_HIU_REG(HHI_VDAC_CNTL0, 0x00000200);*/
-		W_HIU_BIT(HHI_VDAC_CNTL0, 1, 9, 1);
-
-		/*enable fitler */
-		/*config from vlsi-xiaoniu */
-		W_APB_REG(TVFE_VAFE_CTRL0, 0x000d0710);
-		W_APB_REG(TVFE_VAFE_CTRL1, 0x0);
-		W_APB_REG(TVFE_VAFE_CTRL2, 0x1010eeb0);
 	} else if (tvafe_cpu_type() >= CPU_TYPE_TL1) {
 		W_APB_REG(TVFE_VAFE_CTRL0, 0x000d0710);
 		W_APB_REG(TVFE_VAFE_CTRL1, 0x3000);
@@ -625,7 +568,6 @@ void tvafe_enable_avout(enum tvin_port_e port, bool enable)
 {
 	if (tvafe_cpu_type() == CPU_TYPE_TXL ||
 		tvafe_cpu_type() == CPU_TYPE_TXLX ||
-		tvafe_cpu_type() == CPU_TYPE_TXHD ||
 		tvafe_cpu_type() >= CPU_TYPE_TL1) {
 		if (enable) {
 			tvafe_clk_gate_ctrl(1);
@@ -716,8 +658,7 @@ int adc_set_pll_cntl(bool on, unsigned int module_sel, void *pDtvPara)
 		} else {
 			do {
 			if (tvafe_cpu_type() == CPU_TYPE_TXL ||
-				tvafe_cpu_type() == CPU_TYPE_TXLX ||
-				tvafe_cpu_type() == CPU_TYPE_TXHD) {
+				tvafe_cpu_type() == CPU_TYPE_TXLX) {
 				W_HIU_REG(HHI_ADC_PLL_CNTL3, 0x4a6a2110);
 				W_HIU_REG(HHI_ADC_PLL_CNTL, 0x30f14250);
 				W_HIU_REG(HHI_ADC_PLL_CNTL1, 0x22000442);
@@ -807,19 +748,6 @@ int adc_set_pll_cntl(bool on, unsigned int module_sel, void *pDtvPara)
 				W_HIU_REG(HHI_ADC_PLL_CNTL6, 0x00005000);
 				W_HIU_REG(HHI_ADC_PLL_CNTL3, 0xca6a2110);
 				W_HIU_REG(HHI_ADC_PLL_CNTL3, 0x4a6a2110);
-			} else if (tvafe_cpu_type() == CPU_TYPE_TXHD) {
-				W_HIU_REG(HHI_ADC_PLL_CNTL3, 0x4a6a2110);
-				W_HIU_REG(HHI_ADC_PLL_CNTL, 0x30f14250);
-				W_HIU_REG(HHI_ADC_PLL_CNTL1, 0x22000442);
-				/*0x5ba00380 from pll;0x5ba00385 clk*/
-				/*form crystal*/
-				W_HIU_REG(HHI_ADC_PLL_CNTL2, 0x5ba00385);
-				W_HIU_REG(HHI_ADC_PLL_CNTL3, 0x4a6a2110);
-				W_HIU_REG(HHI_ADC_PLL_CNTL4, 0x02913004);
-				W_HIU_REG(HHI_ADC_PLL_CNTL5, 0x00034a00);
-				W_HIU_REG(HHI_ADC_PLL_CNTL6, 0x00005000);
-				W_HIU_REG(HHI_ADC_PLL_CNTL3, 0xca6a2110);
-				W_HIU_REG(HHI_ADC_PLL_CNTL3, 0x4a6a2110);
 			} else {
 				W_HIU_REG(HHI_ADC_PLL_CNTL3, 0xca2a2110);
 				W_HIU_REG(HHI_ADC_PLL_CNTL4, 0x2933800);
@@ -873,8 +801,7 @@ int adc_set_pll_cntl(bool on, unsigned int module_sel, void *pDtvPara)
 			W_HIU_REG(HHI_DEMOD_CLK_CNTL, 0x501);
 
 		} else if (tvafe_cpu_type() == CPU_TYPE_TXL ||
-			tvafe_cpu_type() == CPU_TYPE_TXLX ||
-			tvafe_cpu_type() == CPU_TYPE_TXHD) {
+			tvafe_cpu_type() == CPU_TYPE_TXLX) {
 			do {
 				W_HIU_REG(HHI_ADC_PLL_CNTL3, 0x4a6a2110);
 				W_HIU_REG(HHI_ADC_PLL_CNTL,  0x5d414260);
@@ -935,8 +862,7 @@ int adc_set_pll_cntl(bool on, unsigned int module_sel, void *pDtvPara)
 		mutex_lock(&pll_mutex);
 
 		if (tvafe_cpu_type() == CPU_TYPE_TXL ||
-			tvafe_cpu_type() == CPU_TYPE_TXLX ||
-			tvafe_cpu_type() == CPU_TYPE_TXHD) {
+			tvafe_cpu_type() == CPU_TYPE_TXLX) {
 			do {
 				/*reset*/
 				W_HIU_REG(HHI_ADC_PLL_CNTL3, 0xca6a2110);
diff --git a/drivers/amlogic/media/vin/tvin/tvafe/tvafe_general.h b/drivers/amlogic/media/vin/tvin/tvafe/tvafe_general.h
index f2067aa..182dca1 100644
--- a/drivers/amlogic/media/vin/tvin/tvafe/tvafe_general.h
+++ b/drivers/amlogic/media/vin/tvin/tvafe/tvafe_general.h
@@ -153,18 +153,27 @@ enum tvafe_adc_ch_e {
 };
 
 enum tvafe_cpu_type {
-	CPU_TYPE_GXTVBB = 0,
-	CPU_TYPE_TXL  = 1,
-	CPU_TYPE_TXLX  = 2,
-	CPU_TYPE_TXHD = 3,
-	CPU_TYPE_GXLX = 4,
-	CPU_TYPE_TL1 = 5,
-	CPU_TYPE_TM2 = 6,
+	CPU_TYPE_TXL  = 0,
+	CPU_TYPE_TXLX = 1,
+	CPU_TYPE_GXLX = 2,
+	CPU_TYPE_TL1  = 3,
+	CPU_TYPE_TM2  = 4,
+	CPU_TYPE_MAX,
+};
+
+#define TVAFE_PQ_CONFIG_NUM_MAX    20
+struct tvafe_reg_table_s {
+	unsigned int reg;
+	unsigned int val;
+	unsigned int mask;
 };
 
 struct meson_tvafe_data {
 	enum tvafe_cpu_type cpu_id;
 	const char *name;
+
+	struct tvafe_reg_table_s **cvbs_pq_conf;
+	struct tvafe_reg_table_s **rf_pq_conf;
 };
 
 struct tvafe_clkgate_type {
diff --git a/drivers/amlogic/media/vin/tvin/tvafe/tvafe_pq_table.c b/drivers/amlogic/media/vin/tvin/tvafe/tvafe_pq_table.c
new file mode 100644
index 0000000..237860b
--- /dev/null
+++ b/drivers/amlogic/media/vin/tvin/tvafe/tvafe_pq_table.c
@@ -0,0 +1,582 @@
+/*
+ * drivers/amlogic/media/vin/tvin/tvafe/tvafe_pq_table.c
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include "tvafe_regs.h"
+#include "tvafe_general.h"
+#include "tvafe_debug.h"
+#include "tvafe.h"
+
+/* ******************************************************
+ *  txl pq table
+ ********************************************************
+ */
+/* ************* cvbs(avin, port1/2) *************** */
+static struct tvafe_reg_table_s cvbs_ntscm_table_txl[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_SIGNAL_THRESHOLD, 0x7d, 0xff},
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x08, 0x18},
+	{CVD2_CHROMA_EDGE_ENHANCEMENT, 0x22, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0x00e941a8, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s cvbs_ntsc443_table_txl[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0x00e941a8, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s cvbs_pali_table_txl[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	/*chroma state adjust dynamicly*/
+	{CVD2_CHROMA_LOOPFILTER_STATE, 0x0a, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0x00e941a8, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s cvbs_palm_table_txl[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x08, 0x18},
+	{CVD2_CHROMA_EDGE_ENHANCEMENT, 0x22, 0xff},
+	/*for moonoscope pattern color flash*/
+	{ACD_REG_22, 0x2020000, 0xffffffff},
+	{CVD2_NOISE_THRESHOLD, 0xff, 0xff},
+	{CVD2_NON_STANDARD_SIGNAL_THRESHOLD, 0x20, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0x00e941a8, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s cvbs_pal60_table_txl[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0x00e941a8, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s cvbs_palcn_table_txl[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0x00e941a8, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s cvbs_secam_table_txl[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x08, 0x18},
+	{CVD2_CHROMA_EDGE_ENHANCEMENT, 0x22, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0x00e941a8, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s cvbs_ntsc50_table_txl[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0x00e941a8, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+/* *************** rf(atv, port0/3) ********************* */
+static struct tvafe_reg_table_s rf_ntscm_table_txl[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s rf_ntsc443_table_txl[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s rf_pali_table_txl[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s rf_palm_table_txl[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	/*for moonoscope pattern color flash*/
+	{ACD_REG_22, 0x2020000, 0xffffffff},
+	{CVD2_NOISE_THRESHOLD, 0xff, 0xff},
+	{CVD2_NON_STANDARD_SIGNAL_THRESHOLD, 0x20, 0xff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s rf_pal60_table_txl[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s rf_palcn_table_txl[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s rf_secam_table_txl[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s rf_ntsc50_table_txl[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	{0xffffffff, 0, 0},
+};
+
+/* ******************************************************
+ *  txlx pq table
+ ********************************************************
+ */
+/* ************* cvbs(avin, port1/2) *************** */
+static struct tvafe_reg_table_s cvbs_ntscm_table_txlx[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_SIGNAL_THRESHOLD, 0x7d, 0xff},
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x08, 0x18},
+	{CVD2_CHROMA_EDGE_ENHANCEMENT, 0x22, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0x00e941a8, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s cvbs_ntsc443_table_txlx[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0x00e941a8, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s cvbs_pali_table_txlx[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	/*chroma state adjust dynamicly*/
+	{CVD2_CHROMA_LOOPFILTER_STATE, 0x0a, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0x00e941a8, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s cvbs_palm_table_txlx[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x08, 0x18},
+	{CVD2_CHROMA_EDGE_ENHANCEMENT, 0x22, 0xff},
+	/*for moonoscope pattern color flash*/
+	{ACD_REG_22, 0x2020000, 0xffffffff},
+	{CVD2_NOISE_THRESHOLD, 0xff, 0xff},
+	{CVD2_NON_STANDARD_SIGNAL_THRESHOLD, 0x20, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0x00e941a8, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s cvbs_pal60_table_txlx[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0x00e941a8, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s cvbs_palcn_table_txlx[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0x00e941a8, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s cvbs_secam_table_txlx[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x08, 0x18},
+	{CVD2_CHROMA_EDGE_ENHANCEMENT, 0x22, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0x00e941a8, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s cvbs_ntsc50_table_txlx[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0x00e941a8, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+/* *************** rf(atv, port0/3) ********************* */
+static struct tvafe_reg_table_s rf_ntscm_table_txlx[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s rf_ntsc443_table_txlx[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s rf_pali_table_txlx[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s rf_palm_table_txlx[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	/*for moonoscope pattern color flash*/
+	{ACD_REG_22, 0x2020000, 0xffffffff},
+	{CVD2_NOISE_THRESHOLD, 0xff, 0xff},
+	{CVD2_NON_STANDARD_SIGNAL_THRESHOLD, 0x20, 0xff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s rf_pal60_table_txlx[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s rf_palcn_table_txlx[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s rf_secam_table_txlx[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s rf_ntsc50_table_txlx[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	{0xffffffff, 0, 0},
+};
+
+/* ******************************************************
+ *  tl1 pq table
+ ********************************************************
+ */
+/* ************* cvbs(avin, port1/2) *************** */
+static struct tvafe_reg_table_s cvbs_ntscm_table_tl1[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_SIGNAL_THRESHOLD, 0x7d, 0xff},
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	{CVD2_CONTROL1, 0x08, 0xff},
+	{CVD2_2DCOMB_NOISE_TH, 0x84, 0xff},
+	{CVD2_REG_B0, 0x00, 0xff},
+	{CVD2_3DCOMB_FILTER, 0x0f, 0xff},
+	{CVD2_REG_B2, 0x08, 0x18},
+	{CVD2_CHROMA_EDGE_ENHANCEMENT, 0x22, 0xff},
+	/* fix Purple and green junctions is wider */
+	{CVD2_REG_FA, 0x00, 0x80},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0xeafb4e8e, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s cvbs_ntsc443_table_tl1[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0xeafb4e8e, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s cvbs_pali_table_tl1[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	/*chroma state adjust dynamicly*/
+	{CVD2_CHROMA_LOOPFILTER_STATE, 0x0a, 0xff},
+	{ACD_REG_89, 0x80010004, 0xffffffff},
+	{ACD_REG_8A, 0x100004, 0xffffffff},
+	{ACD_REG_8B, 0x100000, 0xffffffff},
+	{ACD_REG_8C, 0x38000, 0xffffffff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0xeafb4e8e, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s cvbs_palm_table_tl1[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x08, 0x18},
+	{CVD2_CHROMA_EDGE_ENHANCEMENT, 0x22, 0xff},
+	/*for moonoscope pattern color flash*/
+	{ACD_REG_22, 0x2020000, 0xffffffff},
+	{CVD2_NOISE_THRESHOLD, 0xff, 0xff},
+	{CVD2_NON_STANDARD_SIGNAL_THRESHOLD, 0x20, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0xeafb4e8e, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s cvbs_pal60_table_tl1[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0xeafb4e8e, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s cvbs_palcn_table_tl1[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0xeafb4e8e, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s cvbs_secam_table_tl1[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x08, 0x18},
+	{CVD2_CHROMA_EDGE_ENHANCEMENT, 0x22, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0xeafb4e8e, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s cvbs_ntsc50_table_tl1[] = {
+	/* reg,     val,     mask */
+	{CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0, 0xff},
+	/*set for wipe off vertical stripes*/
+	{ACD_REG_25, 0xeafb4e8e, 0xffffffff},
+	{0xffffffff, 0, 0},
+};
+
+/* *************** rf(atv, port0/3) ********************* */
+static struct tvafe_reg_table_s rf_ntscm_table_tl1[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s rf_ntsc443_table_tl1[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s rf_pali_table_tl1[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s rf_palm_table_tl1[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	/*for moonoscope pattern color flash*/
+	{ACD_REG_22, 0x2020000, 0xffffffff},
+	{CVD2_NOISE_THRESHOLD, 0xff, 0xff},
+	{CVD2_NON_STANDARD_SIGNAL_THRESHOLD, 0x20, 0xff},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s rf_pal60_table_tl1[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s rf_palcn_table_tl1[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s rf_secam_table_tl1[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	{0xffffffff, 0, 0},
+};
+
+static struct tvafe_reg_table_s rf_ntsc50_table_tl1[] = {
+	/* reg,     val,     mask */
+	{CVD2_REG_B0, 0xf0, 0xff},
+	{CVD2_REG_B2, 0x00, 0x18},
+	{CVD2_CONTROL1, 0x00, 0x0c},
+	{0xffffffff, 0, 0},
+};
+
+/* ******************************************************
+ *  pq table assemble
+ ********************************************************
+ */
+static struct tvafe_reg_table_s *cvbs_pq_config_txl[] = {
+	cvbs_ntscm_table_txl,
+	cvbs_ntsc443_table_txl,
+	cvbs_pali_table_txl,
+	cvbs_palm_table_txl,
+	cvbs_pal60_table_txl,
+	cvbs_palcn_table_txl,
+	cvbs_secam_table_txl,
+	cvbs_ntsc50_table_txl,
+};
+
+static struct tvafe_reg_table_s *rf_pq_config_txl[] = {
+	rf_ntscm_table_txl,
+	rf_ntsc443_table_txl,
+	rf_pali_table_txl,
+	rf_palm_table_txl,
+	rf_pal60_table_txl,
+	rf_palcn_table_txl,
+	rf_secam_table_txl,
+	rf_ntsc50_table_txl,
+};
+
+static struct tvafe_reg_table_s *cvbs_pq_config_txlx[] = {
+	cvbs_ntscm_table_txlx,
+	cvbs_ntsc443_table_txlx,
+	cvbs_pali_table_txlx,
+	cvbs_palm_table_txlx,
+	cvbs_pal60_table_txlx,
+	cvbs_palcn_table_txlx,
+	cvbs_secam_table_txlx,
+	cvbs_ntsc50_table_txlx,
+};
+
+static struct tvafe_reg_table_s *rf_pq_config_txlx[] = {
+	rf_ntscm_table_txlx,
+	rf_ntsc443_table_txlx,
+	rf_pali_table_txlx,
+	rf_palm_table_txlx,
+	rf_pal60_table_txlx,
+	rf_palcn_table_txlx,
+	rf_secam_table_txlx,
+	rf_ntsc50_table_txlx,
+};
+
+static struct tvafe_reg_table_s *cvbs_pq_config_tl1[] = {
+	cvbs_ntscm_table_tl1,
+	cvbs_ntsc443_table_tl1,
+	cvbs_pali_table_tl1,
+	cvbs_palm_table_tl1,
+	cvbs_pal60_table_tl1,
+	cvbs_palcn_table_tl1,
+	cvbs_secam_table_tl1,
+	cvbs_ntsc50_table_tl1,
+};
+
+static struct tvafe_reg_table_s *rf_pq_config_tl1[] = {
+	rf_ntscm_table_tl1,
+	rf_ntsc443_table_tl1,
+	rf_pali_table_tl1,
+	rf_palm_table_tl1,
+	rf_pal60_table_tl1,
+	rf_palcn_table_tl1,
+	rf_secam_table_tl1,
+	rf_ntsc50_table_tl1,
+};
+
+int tvafe_pq_config_probe(struct meson_tvafe_data *tvafe_data)
+{
+	if (!tvafe_data) {
+		tvafe_pr_err("%s: tvafe_data is null\n", __func__);
+		return -1;
+	}
+
+	switch (tvafe_data->cpu_id) {
+	case CPU_TYPE_TXL:
+		tvafe_data->cvbs_pq_conf = cvbs_pq_config_txl;
+		tvafe_data->rf_pq_conf = rf_pq_config_txl;
+		break;
+	case CPU_TYPE_TXLX:
+		tvafe_data->cvbs_pq_conf = cvbs_pq_config_txlx;
+		tvafe_data->rf_pq_conf = rf_pq_config_txlx;
+		break;
+	case CPU_TYPE_TL1:
+	case CPU_TYPE_TM2:
+		tvafe_data->cvbs_pq_conf = cvbs_pq_config_tl1;
+		tvafe_data->rf_pq_conf = rf_pq_config_tl1;
+		break;
+	default:
+		break;
+	}
+
+	return 0;
+}
diff --git a/drivers/amlogic/media/vin/tvin/tvafe/tvafe_vbi.c b/drivers/amlogic/media/vin/tvin/tvafe/tvafe_vbi.c
index 9cd74d8..a8b3a4d 100644
--- a/drivers/amlogic/media/vin/tvin/tvafe/tvafe_vbi.c
+++ b/drivers/amlogic/media/vin/tvin/tvafe/tvafe_vbi.c
@@ -2092,18 +2092,6 @@ static ssize_t vbi_store(struct device *dev,
 		W_VBI_APB_REG(ACD_REG_22, 0x06080000);
 		W_VBI_APB_REG(CVD2_VBI_FRAME_CODE_CTL, 0x10);
 		tvafe_pr_info("[vbi..]device release OK.\n");
-	} else if (!strncmp(parm[0], "release", strlen("release"))) {
-		ret = vbi_slicer_free(devp, vbi_slicer);
-		devp->slicer_enable = false;
-		devp->vbi_start = false;  /*disable data capture function*/
-		/* free irq */
-		if (devp->irq_free_status == 1)
-			free_irq(devp->vs_irq, (void *)devp);
-		devp->irq_free_status = 0;
-		/* vbi reset release, vbi agent enable */
-		W_VBI_APB_REG(ACD_REG_22, 0x06080000);
-		W_VBI_APB_REG(CVD2_VBI_FRAME_CODE_CTL, 0x10);
-		tvafe_pr_info("[vbi..]device release OK.\n");
 	} else {
 		tvafe_pr_info("[vbi..]unsupport cmd!!!\n");
 	}
@@ -2125,6 +2113,18 @@ static int vbi_probe(struct platform_device *pdev)
 	struct resource *res;
 	struct vbi_dev_s *vbi_dev;
 
+	ret = alloc_chrdev_region(&vbi_id, 0, 1, VBI_NAME);
+	if (ret < 0) {
+		tvafe_pr_err(": failed to allocate major number\n");
+		goto fail_alloc_cdev_region;
+	}
+
+	vbi_clsp = class_create(THIS_MODULE, VBI_NAME);
+	if (IS_ERR(vbi_clsp)) {
+		tvafe_pr_err(": can't get vbi_clsp\n");
+		goto fail_class_create;
+	}
+
 	/* allocate memory for the per-device structure */
 	vbi_dev = kzalloc(sizeof(struct vbi_dev_s), GFP_KERNEL);
 	if (!vbi_dev) {
@@ -2262,6 +2262,10 @@ fail_add_cdev:
 	kfree(vbi_dev);
 fail_kzalloc_mem:
 	tvafe_pr_err(": failed to allocate memory for vbi device\n");
+	class_destroy(vbi_clsp);
+fail_class_create:
+	unregister_chrdev_region(vbi_id, 1);
+fail_alloc_cdev_region:
 	return ret;
 }
 
@@ -2347,40 +2351,21 @@ static int __init vbi_init(void)
 {
 	int ret = 0;
 
-	ret = alloc_chrdev_region(&vbi_id, 0, 1, VBI_NAME);
-	if (ret < 0) {
-		tvafe_pr_err(": failed to allocate major number\n");
-		goto fail_alloc_cdev_region;
-	}
-
-	vbi_clsp = class_create(THIS_MODULE, VBI_NAME);
-	if (IS_ERR(vbi_clsp)) {
-		tvafe_pr_err(": can't get vbi_clsp\n");
-		goto fail_class_create;
-	}
-
 	ret = platform_driver_register(&vbi_driver);
 	if (ret != 0) {
 		tvafe_pr_err("failed to register vbi module, error %d\n",
 			ret);
-		goto fail_pdrv_register;
 		return -ENODEV;
 	}
-	tvafe_pr_info("vbi: vbi_init.\n");
+	/*tvafe_pr_info("vbi: vbi_init.\n");*/
 	return 0;
-
-fail_pdrv_register:
-	class_destroy(vbi_clsp);
-fail_class_create:
-	unregister_chrdev_region(vbi_id, 1);
-fail_alloc_cdev_region:
-	return ret;
 }
 
 static void __exit vbi_exit(void)
 {
 	platform_driver_unregister(&vbi_driver);
 }
+
 static int vbi_mem_device_init(struct reserved_mem *rmem,
 		struct device *dev)
 {
-- 
2.7.4