From a85b86a9828c105f834dd3c14aa3f338ea7fd8c1 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Fri, 20 Jul 2018 15:51:01 +0000 Subject: [PATCH] [X86][AVX] Add support for i16 256-bit vector horizontal op redundant shuffle removal llvm-svn: 337566 --- llvm/lib/Target/X86/X86ISelLowering.cpp | 4 +++- llvm/test/CodeGen/X86/haddsub-shuf.ll | 2 -- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index e1b7adf..3e57c3c 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -31164,7 +31164,9 @@ static SDValue foldShuffleOfHorizOp(SDNode *N) { if (HOp.getValueSizeInBits() == 256 && (isTargetShuffleEquivalent(Mask, {0, 0, 2, 2}) || - isTargetShuffleEquivalent(Mask, {0, 1, 0, 1, 4, 5, 4, 5}))) + isTargetShuffleEquivalent(Mask, {0, 1, 0, 1, 4, 5, 4, 5}) || + isTargetShuffleEquivalent( + Mask, {0, 1, 2, 3, 0, 1, 2, 3, 8, 9, 10, 11, 8, 9, 10, 11}))) return HOp; return SDValue(); diff --git a/llvm/test/CodeGen/X86/haddsub-shuf.ll b/llvm/test/CodeGen/X86/haddsub-shuf.ll index 935d325..1a602d1 100644 --- a/llvm/test/CodeGen/X86/haddsub-shuf.ll +++ b/llvm/test/CodeGen/X86/haddsub-shuf.ll @@ -432,7 +432,6 @@ define <16 x i16> @hadd_v16i16b(<16 x i16> %a) { ; AVX2-LABEL: hadd_v16i16b: ; AVX2: # %bb.0: ; AVX2-NEXT: vphaddw %ymm0, %ymm0, %ymm0 -; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,1,0,1,4,5,4,5] ; AVX2-NEXT: retq %a0 = shufflevector <16 x i16> %a, <16 x i16> undef, <16 x i32> %a1 = shufflevector <16 x i16> %a, <16 x i16> undef, <16 x i32> @@ -513,7 +512,6 @@ define <16 x i16> @hsub_v16i16b(<16 x i16> %a) { ; AVX2-LABEL: hsub_v16i16b: ; AVX2: # %bb.0: ; AVX2-NEXT: vphsubw %ymm0, %ymm0, %ymm0 -; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,1,0,1,4,5,4,5] ; AVX2-NEXT: retq %a0 = shufflevector <16 x i16> %a, <16 x i16> undef, <16 x i32> %a1 = shufflevector <16 x i16> %a, <16 x i16> undef, <16 x i32> -- 2.7.4