From a83403892ac33484c0a830a21313fdf2473bcd0f Mon Sep 17 00:00:00 2001 From: Matthias Braun Date: Tue, 30 Oct 2018 23:28:27 +0000 Subject: [PATCH] MachineOperand/MIParser: Do not print debug-use flag, infer it The debug-use flag must be set exactly for uses on DBG_VALUEs. This is so obvious that it can be trivially inferred while parsing. This will reduce noise when printing while omitting an information that has little value to the user. The parser will keep recognizing the flag for compatibility with old `.mir` files. Differential Revision: https://reviews.llvm.org/D53903 llvm-svn: 345671 --- llvm/lib/CodeGen/MIRParser/MIParser.cpp | 2 + llvm/lib/CodeGen/MachineOperand.cpp | 4 +- .../CodeGen/AArch64/GlobalISel/debug-cpp.ll | 2 +- .../CodeGen/AArch64/GlobalISel/debug-insts.ll | 6 +- .../GlobalISel/regbankselect-dbg-value.mir | 4 +- .../AArch64/GlobalISel/select-dbg-value.mir | 8 +- llvm/test/CodeGen/AArch64/phi-dbg.ll | 4 +- ...ld-immediate-operand-shrink-with-carry.mir | 4 +- llvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir | 2 +- .../CodeGen/AMDGPU/sched-crash-dbg-value.mir | 4 +- llvm/test/CodeGen/ARM/ARMLoadStoreDBG.mir | 22 +++--- llvm/test/CodeGen/ARM/dbg-range-extension.mir | 52 ++++++------- .../test/CodeGen/ARM/sched-it-debug-nodes.mir | 22 +++--- llvm/test/CodeGen/Hexagon/early-if-debug.mir | 20 ++--- llvm/test/CodeGen/MIR/X86/diexpr-win32.mir | 6 +- .../MIR/X86/instructions-debug-location.mir | 6 +- llvm/test/CodeGen/MIR/X86/pr38773.mir | 4 +- .../CodeGen/PowerPC/debuginfo-split-int.ll | 4 +- .../CodeGen/PowerPC/debuginfo-stackarg.ll | 2 +- .../X86/coalesce-dbg-value-subreg-rewrite.mir | 4 +- .../dbg-changes-codegen-branch-folding2.mir | 2 +- .../CodeGen/X86/dbg-value-superreg-copy.mir | 2 +- llvm/test/CodeGen/X86/lea-opt-with-debug.mir | 4 +- llvm/test/CodeGen/X86/machine-cp-debug.mir | 2 +- llvm/test/CodeGen/X86/opt_phis.mir | 2 +- .../CodeGen/X86/post-ra-sched-with-debug.mir | 14 ++-- .../CodeGen/X86/postra-ignore-dbg-instrs.mir | 6 +- .../CodeGen/X86/shrink_wrap_dbg_value.mir | 8 +- .../compiler-gen-bbs-livedebugvalues.ll | 10 +-- llvm/test/DebugInfo/ARM/sdag-split-arg1.ll | 2 +- .../test/DebugInfo/MIR/AArch64/clobber-sp.mir | 12 +-- .../MIR/ARM/live-debug-values-reg-copy.mir | 10 +-- .../MIR/ARM/split-superreg-complex.mir | 2 +- .../MIR/ARM/split-superreg-piece.mir | 2 +- .../test/DebugInfo/MIR/ARM/split-superreg.mir | 2 +- .../DebugInfo/MIR/Mips/last-inst-bundled.mir | 10 +-- .../MIR/Mips/live-debug-values-reg-copy.mir | 20 ++--- llvm/test/DebugInfo/MIR/X86/bit-piece-dh.mir | 2 +- .../DebugInfo/MIR/X86/kill-after-spill.mir | 12 +-- .../MIR/X86/live-debug-values-3preds.mir | 68 ++++++++--------- .../MIR/X86/live-debug-values-reg-copy.mir | 8 +- .../MIR/X86/live-debug-values-spill.mir | 74 +++++++++---------- .../DebugInfo/MIR/X86/live-debug-values.mir | 18 ++--- .../live-debug-vars-unused-arg-debugonly.mir | 16 ++-- .../MIR/X86/live-debug-vars-unused-arg.mir | 18 ++--- .../MIR/X86/livedebugvalues-limit.mir | 28 +++---- llvm/test/DebugInfo/MIR/X86/mlicm-hoist.mir | 8 +- llvm/test/DebugInfo/MIR/X86/regcoalescer.mir | 4 +- llvm/test/DebugInfo/MSP430/sdagsplit-1.ll | 8 +- .../WebAssembly/dbg-value-live-interval.ll | 2 +- .../DebugInfo/WebAssembly/dbg-value-move-2.ll | 2 +- .../DebugInfo/WebAssembly/dbg-value-move.ll | 2 +- llvm/test/DebugInfo/X86/bbjoin.ll | 8 +- .../X86/live-debug-vars-discard-invalid.mir | 38 +++++----- .../DebugInfo/X86/live-debug-vars-dse.mir | 2 +- .../DebugInfo/X86/live-debug-vars-index.mir | 8 +- llvm/test/DebugInfo/X86/pr34545.ll | 10 +-- llvm/test/DebugInfo/X86/sdag-combine.ll | 2 +- .../DebugInfo/X86/sdag-dangling-dbgvalue.ll | 24 +++--- .../DebugInfo/X86/sdag-dbgvalue-phi-use-1.ll | 8 +- .../DebugInfo/X86/sdag-dbgvalue-phi-use-2.ll | 12 +-- .../DebugInfo/X86/sdag-dbgvalue-phi-use-3.ll | 12 +-- .../DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll | 10 +-- .../DebugInfo/X86/sdag-legalize-multires.ll | 4 +- llvm/test/DebugInfo/X86/sdag-salvage-add.ll | 4 +- llvm/test/DebugInfo/X86/sdagsplit-1.ll | 4 +- 66 files changed, 357 insertions(+), 351 deletions(-) diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp index da758da873c8..1a6174bf9ee2 100644 --- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp +++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp @@ -752,6 +752,8 @@ bool MIParser::parse(MachineInstr *&MI) { Optional TiedDefIdx; if (parseMachineOperandAndTargetFlags(MO, TiedDefIdx)) return true; + if (OpCode == TargetOpcode::DBG_VALUE && MO.isReg()) + MO.setIsDebug(); Operands.push_back( ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx)); if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) || diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp index 97d32a5d66a2..4fe51f662481 100644 --- a/llvm/lib/CodeGen/MachineOperand.cpp +++ b/llvm/lib/CodeGen/MachineOperand.cpp @@ -744,10 +744,10 @@ void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST, OS << "undef "; if (isEarlyClobber()) OS << "early-clobber "; - if (isDebug()) - OS << "debug-use "; if (TargetRegisterInfo::isPhysicalRegister(getReg()) && isRenamable()) OS << "renamable "; + // isDebug() is exactly true for register operands of a DBG_VALUE. So we + // simply infer it when parsing and do not need to print it. const MachineRegisterInfo *MRI = nullptr; if (TargetRegisterInfo::isVirtualRegister(Reg)) { diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll b/llvm/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll index e603af678de6..caf0a2eebca5 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll +++ b/llvm/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll @@ -18,7 +18,7 @@ target triple = "aarch64-unknown-linux-gnu" %struct.NTCopy = type { i32 } ; CHECK-LABEL: name: _Z3foo6NTCopy -; CHECK: DBG_VALUE debug-use %{{[0-9]+}}(p0), 0, !23, !DIExpression(), debug-location !24 +; CHECK: DBG_VALUE %{{[0-9]+}}(p0), 0, !23, !DIExpression(), debug-location !24 ; Function Attrs: noinline nounwind optnone define dso_local i32 @_Z3foo6NTCopy(%struct.NTCopy* %o) #0 !dbg !7 { entry: diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/debug-insts.ll b/llvm/test/CodeGen/AArch64/GlobalISel/debug-insts.ll index 256eb37f6d41..2945d65d3e27 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/debug-insts.ll +++ b/llvm/test/CodeGen/AArch64/GlobalISel/debug-insts.ll @@ -15,7 +15,7 @@ entry: } ; CHECK-LABEL: name: debug_declare_vla -; CHECK: DBG_VALUE debug-use %{{[0-9]+}}(p0), 0, !14, !DIExpression(), debug-location !15 +; CHECK: DBG_VALUE %{{[0-9]+}}(p0), 0, !14, !DIExpression(), debug-location !15 define void @debug_declare_vla(i32 %in) #0 !dbg !13 { entry: %vla.addr = alloca i32, i32 %in @@ -27,10 +27,10 @@ entry: ; CHECK: [[IN:%[0-9]+]]:_(s32) = COPY $w0 define void @debug_value(i32 %in) #0 !dbg !16 { %addr = alloca i32 -; CHECK: DBG_VALUE debug-use [[IN]](s32), debug-use $noreg, !17, !DIExpression(), debug-location !18 +; CHECK: DBG_VALUE [[IN]](s32), $noreg, !17, !DIExpression(), debug-location !18 call void @llvm.dbg.value(metadata i32 %in, i64 0, metadata !17, metadata !DIExpression()), !dbg !18 store i32 %in, i32* %addr -; CHECK: DBG_VALUE debug-use %1(p0), debug-use $noreg, !17, !DIExpression(DW_OP_deref), debug-location !18 +; CHECK: DBG_VALUE %1(p0), $noreg, !17, !DIExpression(DW_OP_deref), debug-location !18 call void @llvm.dbg.value(metadata i32* %addr, i64 0, metadata !17, metadata !DIExpression(DW_OP_deref)), !dbg !18 ; CHECK: DBG_VALUE 123, 0, !17, !DIExpression(), debug-location !18 call void @llvm.dbg.value(metadata i32 123, i64 0, metadata !17, metadata !DIExpression()), !dbg !18 diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-dbg-value.mir b/llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-dbg-value.mir index 1528a8097710..c64e2f78ab3b 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-dbg-value.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-dbg-value.mir @@ -36,8 +36,8 @@ body: | bb.0: liveins: $w0 %0:_(s32) = COPY $w0 - ; CHECK: DBG_VALUE debug-use %0(s32), debug-use $noreg, !7, !DIExpression(), debug-location !9 - DBG_VALUE debug-use %0(s32), debug-use $noreg, !7, !DIExpression(), debug-location !9 + ; CHECK: DBG_VALUE %0(s32), $noreg, !7, !DIExpression(), debug-location !9 + DBG_VALUE %0(s32), $noreg, !7, !DIExpression(), debug-location !9 ; CHECK: DBG_VALUE $noreg, 0, !7, !DIExpression(), debug-location !9 DBG_VALUE $noreg, 0, !7, !DIExpression(), debug-location !9 diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/select-dbg-value.mir b/llvm/test/CodeGen/AArch64/GlobalISel/select-dbg-value.mir index f75d5629478d..72fbfad89c23 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/select-dbg-value.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/select-dbg-value.mir @@ -46,11 +46,11 @@ body: | ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 ; CHECK: [[ADDWrr:%[0-9]+]]:gpr32 = ADDWrr [[COPY]], [[COPY]] ; CHECK: $w0 = COPY [[ADDWrr]] - ; CHECK: DBG_VALUE debug-use [[ADDWrr]], debug-use $noreg, !7, !DIExpression(), debug-location !9 + ; CHECK: DBG_VALUE [[ADDWrr]], $noreg, !7, !DIExpression(), debug-location !9 %0:gpr(s32) = COPY $w0 %1:gpr(s32) = G_ADD %0, %0 $w0 = COPY %1(s32) - DBG_VALUE debug-use %1(s32), debug-use $noreg, !7, !DIExpression(), debug-location !9 + DBG_VALUE %1(s32), $noreg, !7, !DIExpression(), debug-location !9 ... --- @@ -62,7 +62,7 @@ body: | liveins: $w0 ; CHECK-LABEL: name: test_dbg_value_dead ; CHECK-NOT: COPY - ; CHECK: DBG_VALUE debug-use $noreg, debug-use $noreg, !7, !DIExpression(), debug-location !9 + ; CHECK: DBG_VALUE $noreg, $noreg, !7, !DIExpression(), debug-location !9 %0:gpr(s32) = COPY $w0 - DBG_VALUE debug-use %0(s32), debug-use $noreg, !7, !DIExpression(), debug-location !9 + DBG_VALUE %0(s32), $noreg, !7, !DIExpression(), debug-location !9 ... diff --git a/llvm/test/CodeGen/AArch64/phi-dbg.ll b/llvm/test/CodeGen/AArch64/phi-dbg.ll index 0b5c6677acdf..4f7c005f8026 100644 --- a/llvm/test/CodeGen/AArch64/phi-dbg.ll +++ b/llvm/test/CodeGen/AArch64/phi-dbg.ll @@ -35,11 +35,11 @@ bb2: bb3: ; CHECK: bb.3.bb3: ; CHECK: [[PHIDEST:%[0-9]+]]:gpr32 = COPY [[PHIREG]] -; CHECK-NEXT: DBG_VALUE debug-use [[PHIDEST]] +; CHECK-NEXT: DBG_VALUE [[PHIDEST]] %.0 = phi i32 [ 12, %bb2 ], [ 1, %entry ] call void @llvm.dbg.value(metadata i32 %.0, i64 0, metadata !15, metadata !13), !dbg !16 ; CHECK: [[ADD:%[0-9]+]]:gpr32 = nsw ADDWrr [[PHIDEST]] -; CHECK-NEXT: DBG_VALUE debug-use [[ADD]] +; CHECK-NEXT: DBG_VALUE [[ADD]] %v5 = add nsw i32 %.0, %a0, !dbg !22 call void @llvm.dbg.value(metadata i32 %v5, i64 0, metadata !15, metadata !13), !dbg !16 ret i32 %v5, !dbg !23 diff --git a/llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink-with-carry.mir b/llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink-with-carry.mir index ec0faf7ab663..f3a1168885f8 100644 --- a/llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink-with-carry.mir +++ b/llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink-with-carry.mir @@ -63,7 +63,7 @@ body: | ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 12345 ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GCN: [[V_ADD_I32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_I32_e32 [[S_MOV_B32_]], [[DEF]], implicit-def $vcc, implicit $exec - ; GCN: DBG_VALUE debug-use %5:sreg_64_xexec, debug-use $noreg + ; GCN: DBG_VALUE %5:sreg_64_xexec, $noreg ; GCN: S_ENDPGM implicit [[V_ADD_I32_e32_]] %0:sreg_32_xm0 = S_MOV_B32 12345 %1:vgpr_32 = IMPLICIT_DEF @@ -71,7 +71,7 @@ body: | %3:vgpr_32 = IMPLICIT_DEF %4:vgpr_32, %5:sreg_64_xexec = V_ADD_I32_e64 %0, %1, implicit $exec - DBG_VALUE debug-use %5, debug-use $noreg + DBG_VALUE %5, $noreg S_ENDPGM implicit %4 ... diff --git a/llvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir b/llvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir index 693b7d827c56..d69bbda463c9 100644 --- a/llvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir +++ b/llvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir @@ -5,7 +5,7 @@ # a slot index. # CHECK: %13.sub2:sgpr_128 = S_MOV_B32 0 -# CHECK: DBG_VALUE{{.*}}debug-use %13.sub2 +# CHECK: DBG_VALUE{{.*}} %13.sub2 --- | define amdgpu_kernel void @test(i32 addrspace(1)* %out) { ret void } diff --git a/llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir b/llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir index 182096305f40..3d52f5aad04c 100644 --- a/llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir +++ b/llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir @@ -169,7 +169,7 @@ --- # CHECK: name: sched_dbg_value_crash -# CHECK: DBG_VALUE debug-use %99, debug-use $noreg, !5, !DIExpression(DW_OP_constu, 1, DW_OP_swap, DW_OP_xderef), debug-location !8 +# CHECK: DBG_VALUE %99, $noreg, !5, !DIExpression(DW_OP_constu, 1, DW_OP_swap, DW_OP_xderef), debug-location !8 name: sched_dbg_value_crash alignment: 0 @@ -319,7 +319,7 @@ body: | %124:vgpr_32 = IMPLICIT_DEF %125:vgpr_32 = IMPLICIT_DEF %126:vgpr_32 = IMPLICIT_DEF - DBG_VALUE debug-use %103, debug-use _, !5, !DIExpression(DW_OP_constu, 1, DW_OP_swap, DW_OP_xderef), debug-location !8 + DBG_VALUE %103, _, !5, !DIExpression(DW_OP_constu, 1, DW_OP_swap, DW_OP_xderef), debug-location !8 ADJCALLSTACKUP 0, 0, implicit-def $sgpr32, implicit $sgpr32 %127:sreg_64 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @func + 4, target-flags(amdgpu-rel32-hi) @func + 4, implicit-def dead $scc $sgpr4 = COPY $sgpr101 diff --git a/llvm/test/CodeGen/ARM/ARMLoadStoreDBG.mir b/llvm/test/CodeGen/ARM/ARMLoadStoreDBG.mir index 76f1523f7790..ce33dcf52ec4 100644 --- a/llvm/test/CodeGen/ARM/ARMLoadStoreDBG.mir +++ b/llvm/test/CodeGen/ARM/ARMLoadStoreDBG.mir @@ -120,19 +120,19 @@ body: | bb.0.entry: liveins: $r0, $r1, $r2, $r3, $lr, $r7 - DBG_VALUE debug-use $r0, debug-use $noreg, !18, !27, debug-location !28 - DBG_VALUE debug-use $r1, debug-use $noreg, !19, !27, debug-location !28 - DBG_VALUE debug-use $r2, debug-use $noreg, !20, !27, debug-location !28 - DBG_VALUE debug-use $r3, debug-use $noreg, !21, !27, debug-location !28 + DBG_VALUE $r0, $noreg, !18, !27, debug-location !28 + DBG_VALUE $r1, $noreg, !19, !27, debug-location !28 + DBG_VALUE $r2, $noreg, !20, !27, debug-location !28 + DBG_VALUE $r3, $noreg, !21, !27, debug-location !28 t2CMPri $r3, 4, 14, $noreg, implicit-def $cpsr, debug-location !31 t2Bcc %bb.2.if.end, 2, killed $cpsr bb.1: liveins: $lr, $r7 - DBG_VALUE debug-use $r1, debug-use $noreg, !19, !27, debug-location !28 + DBG_VALUE $r1, $noreg, !19, !27, debug-location !28 $r0 = t2MOVi -1, 14, $noreg, $noreg - DBG_VALUE debug-use $r1, debug-use $noreg, !19, !27, debug-location !28 + DBG_VALUE $r1, $noreg, !19, !27, debug-location !28 tBX_RET 14, $noreg, implicit $r0, debug-location !34 bb.2.if.end: @@ -142,12 +142,12 @@ body: | frame-setup CFI_INSTRUCTION def_cfa_offset 8 frame-setup CFI_INSTRUCTION offset $lr, -4 frame-setup CFI_INSTRUCTION offset $r7, -8 - DBG_VALUE debug-use $r0, debug-use $noreg, !18, !27, debug-location !28 - DBG_VALUE debug-use $r1, debug-use $noreg, !19, !27, debug-location !28 - DBG_VALUE debug-use $r2, debug-use $noreg, !20, !27, debug-location !28 - DBG_VALUE debug-use $r3, debug-use $noreg, !21, !27, debug-location !28 + DBG_VALUE $r0, $noreg, !18, !27, debug-location !28 + DBG_VALUE $r1, $noreg, !19, !27, debug-location !28 + DBG_VALUE $r2, $noreg, !20, !27, debug-location !28 + DBG_VALUE $r3, $noreg, !21, !27, debug-location !28 $r1 = COPY killed $r2, debug-location !32 - DBG_VALUE debug-use $r1, debug-use $noreg, !19, !27, debug-location !28 + DBG_VALUE $r1, $noreg, !19, !27, debug-location !28 $r2 = COPY killed $r3, debug-location !32 tBL 14, $noreg, @g, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit $r1, implicit $r2, implicit-def $sp, debug-location !32 $r0 = t2MOVi 0, 14, $noreg, $noreg diff --git a/llvm/test/CodeGen/ARM/dbg-range-extension.mir b/llvm/test/CodeGen/ARM/dbg-range-extension.mir index 0dd9ed2b207f..f2b174a8ac0b 100644 --- a/llvm/test/CodeGen/ARM/dbg-range-extension.mir +++ b/llvm/test/CodeGen/ARM/dbg-range-extension.mir @@ -23,37 +23,37 @@ # CHECK: [[VAR_I:![0-9]+]] = !DILocalVariable(name: "i", # CHECK: bb.0.entry -# CHECK: DBG_VALUE debug-use $r0, debug-use $noreg, [[VAR_A]] -# CHECK: DBG_VALUE debug-use [[REG_A:\$r[0-9]+]], debug-use $noreg, [[VAR_A]] -# CHECK: DBG_VALUE debug-use [[REG_B:\$r[0-9]+]], debug-use $noreg, [[VAR_B]] +# CHECK: DBG_VALUE $r0, $noreg, [[VAR_A]] +# CHECK: DBG_VALUE [[REG_A:\$r[0-9]+]], $noreg, [[VAR_A]] +# CHECK: DBG_VALUE [[REG_B:\$r[0-9]+]], $noreg, [[VAR_B]] # CHECK: bb.1.if.then -# CHECK: DBG_VALUE debug-use [[REG_B]], debug-use $noreg, [[VAR_B]] -# CHECK: DBG_VALUE debug-use [[REG_A]], debug-use $noreg, [[VAR_A]] -# CHECK: DBG_VALUE debug-use [[REG_C:\$r[0-9]+]], debug-use $noreg, [[VAR_C]] +# CHECK: DBG_VALUE [[REG_B]], $noreg, [[VAR_B]] +# CHECK: DBG_VALUE [[REG_A]], $noreg, [[VAR_A]] +# CHECK: DBG_VALUE [[REG_C:\$r[0-9]+]], $noreg, [[VAR_C]] # CHECK: DBG_VALUE 1, 0, [[VAR_I]] # CHECK: bb.2.for.body -# CHECK: DBG_VALUE debug-use [[REG_I:\$r[0-9]+]], debug-use $noreg, [[VAR_I]] -# CHECK: DBG_VALUE debug-use [[REG_C]], debug-use $noreg, [[VAR_C]] -# CHECK: DBG_VALUE debug-use [[REG_B]], debug-use $noreg, [[VAR_B]] -# CHECK: DBG_VALUE debug-use [[REG_A]], debug-use $noreg, [[VAR_A]] -# CHECK: DBG_VALUE debug-use [[REG_I]], debug-use $noreg, [[VAR_I]] +# CHECK: DBG_VALUE [[REG_I:\$r[0-9]+]], $noreg, [[VAR_I]] +# CHECK: DBG_VALUE [[REG_C]], $noreg, [[VAR_C]] +# CHECK: DBG_VALUE [[REG_B]], $noreg, [[VAR_B]] +# CHECK: DBG_VALUE [[REG_A]], $noreg, [[VAR_A]] +# CHECK: DBG_VALUE [[REG_I]], $noreg, [[VAR_I]] # CHECK: bb.3.for.cond -# CHECK: DBG_VALUE debug-use [[REG_C]], debug-use $noreg, [[VAR_C]] -# CHECK: DBG_VALUE debug-use [[REG_B]], debug-use $noreg, [[VAR_B]] -# CHECK: DBG_VALUE debug-use [[REG_A]], debug-use $noreg, [[VAR_A]] -# CHECK: DBG_VALUE debug-use [[REG_I]], debug-use $noreg, [[VAR_I]] +# CHECK: DBG_VALUE [[REG_C]], $noreg, [[VAR_C]] +# CHECK: DBG_VALUE [[REG_B]], $noreg, [[VAR_B]] +# CHECK: DBG_VALUE [[REG_A]], $noreg, [[VAR_A]] +# CHECK: DBG_VALUE [[REG_I]], $noreg, [[VAR_I]] # CHECK: bb.4.for.cond.cleanup -# CHECK: DBG_VALUE debug-use [[REG_C]], debug-use $noreg, [[VAR_C]] -# CHECK: DBG_VALUE debug-use [[REG_B]], debug-use $noreg, [[VAR_B]] -# CHECK: DBG_VALUE debug-use [[REG_A]], debug-use $noreg, [[VAR_A]] +# CHECK: DBG_VALUE [[REG_C]], $noreg, [[VAR_C]] +# CHECK: DBG_VALUE [[REG_B]], $noreg, [[VAR_B]] +# CHECK: DBG_VALUE [[REG_A]], $noreg, [[VAR_A]] # CHECK: bb.5.if.end -# CHECK: DBG_VALUE debug-use [[REG_B]], debug-use $noreg, [[VAR_B]] -# CHECK: DBG_VALUE debug-use [[REG_A]], debug-use $noreg, [[VAR_A]] +# CHECK: DBG_VALUE [[REG_B]], $noreg, [[VAR_B]] +# CHECK: DBG_VALUE [[REG_A]], $noreg, [[VAR_A]] --- | ; ModuleID = '/data/kwalker/work/OpenSource-llvm/llvm/test/CodeGen/ARM/dbg-range-extension.ll' source_filename = "/data/kwalker/work/OpenSource-llvm/llvm/test/CodeGen/ARM/dbg-range-extension.ll" @@ -219,14 +219,14 @@ body: | frame-setup CFI_INSTRUCTION offset $r6, -16 frame-setup CFI_INSTRUCTION offset $r5, -20 frame-setup CFI_INSTRUCTION offset $r4, -24 - DBG_VALUE debug-use $r0, debug-use $noreg, !13, !20, debug-location !21 + DBG_VALUE $r0, $noreg, !13, !20, debug-location !21 $r4 = MOVr killed $r0, 14, $noreg, $noreg - DBG_VALUE debug-use $r4, debug-use $noreg, !13, !20, debug-location !21 + DBG_VALUE $r4, $noreg, !13, !20, debug-location !21 $r0 = MOVi 10, 14, $noreg, _, debug-location !22 $r1 = MOVi 11, 14, $noreg, _, debug-location !22 BL @func2, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit killed $r1, implicit-def $sp, implicit-def $r0, debug-location !22 $r5 = MOVr killed $r0, 14, $noreg, _, debug-location !22 - DBG_VALUE debug-use $r5, debug-use $noreg, !14, !20, debug-location !23 + DBG_VALUE $r5, $noreg, !14, !20, debug-location !23 CMPri $r4, 0, 14, $noreg, implicit-def $cpsr, debug-location !25 Bcc %bb.5.if.end, 0, killed $cpsr @@ -237,7 +237,7 @@ body: | $r1 = MOVi 13, 14, $noreg, _, debug-location !26 BL @func2, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit killed $r1, implicit-def $sp, implicit-def $r0, debug-location !26 $r6 = MOVr killed $r0, 14, $noreg, _, debug-location !26 - DBG_VALUE debug-use $r6, debug-use $noreg, !15, !20, debug-location !27 + DBG_VALUE $r6, $noreg, !15, !20, debug-location !27 $r7 = MOVi 1, 14, $noreg, $noreg DBG_VALUE 1, 0, !18, !20, debug-location !28 B %bb.3.for.cond @@ -249,12 +249,12 @@ body: | $r0 = MOVr $r7, 14, $noreg, _, debug-location !36 BL @func2, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit killed $r1, implicit-def $sp, implicit-def dead $r0, debug-location !36 $r7 = ADDri killed $r7, 1, 14, $noreg, _, debug-location !38 - DBG_VALUE debug-use $r7, debug-use $noreg, !18, !20, debug-location !28 + DBG_VALUE $r7, $noreg, !18, !20, debug-location !28 bb.3.for.cond: liveins: $r4, $r5, $r6, $r7 - DBG_VALUE debug-use $r7, debug-use $noreg, !18, !20, debug-location !28 + DBG_VALUE $r7, $noreg, !18, !20, debug-location !28 CMPrr $r7, $r4, 14, $noreg, implicit-def $cpsr, debug-location !33 Bcc %bb.2.for.body, 11, killed $cpsr, debug-location !33 diff --git a/llvm/test/CodeGen/ARM/sched-it-debug-nodes.mir b/llvm/test/CodeGen/ARM/sched-it-debug-nodes.mir index 8d0688ef01d3..ec42e7df3b2f 100644 --- a/llvm/test/CodeGen/ARM/sched-it-debug-nodes.mir +++ b/llvm/test/CodeGen/ARM/sched-it-debug-nodes.mir @@ -33,7 +33,7 @@ ; hopefully, triggering an assert). ; CHECK: BUNDLE implicit-def dead $itstate{{.*}} { - ; CHECK: DBG_VALUE debug-use $r1, debug-use $noreg, !"u" + ; CHECK: DBG_VALUE $r1, $noreg, !"u" ; CHECK-NOT: DBG_VALUE killed $r1, $noreg, !"u" declare arm_aapcscc void @g(%struct.s*, i8*, i32) #1 @@ -131,23 +131,23 @@ body: | bb.0.entry: liveins: $r0, $r1, $r2, $r3, $lr, $r7 - DBG_VALUE debug-use $r0, debug-use $noreg, !18, !27, debug-location !28 - DBG_VALUE debug-use $r1, debug-use $noreg, !19, !27, debug-location !28 - DBG_VALUE debug-use $r2, debug-use $noreg, !20, !27, debug-location !28 - DBG_VALUE debug-use $r3, debug-use $noreg, !21, !27, debug-location !28 + DBG_VALUE $r0, $noreg, !18, !27, debug-location !28 + DBG_VALUE $r1, $noreg, !19, !27, debug-location !28 + DBG_VALUE $r2, $noreg, !20, !27, debug-location !28 + DBG_VALUE $r3, $noreg, !21, !27, debug-location !28 t2CMPri $r3, 4, 14, $noreg, implicit-def $cpsr, debug-location !31 - DBG_VALUE debug-use $r1, debug-use $noreg, !19, !27, debug-location !28 + DBG_VALUE $r1, $noreg, !19, !27, debug-location !28 $r0 = t2MOVi -1, 3, $cpsr, $noreg, implicit undef $r0 - DBG_VALUE debug-use $r1, debug-use $noreg, !19, !27, debug-location !28 + DBG_VALUE $r1, $noreg, !19, !27, debug-location !28 tBX_RET 3, $cpsr, implicit $r0, debug-location !34 $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r7, killed $lr frame-setup CFI_INSTRUCTION def_cfa_offset 8 frame-setup CFI_INSTRUCTION offset $lr, -4 frame-setup CFI_INSTRUCTION offset $r7, -8 - DBG_VALUE debug-use $r0, debug-use $noreg, !18, !27, debug-location !28 - DBG_VALUE debug-use $r1, debug-use $noreg, !19, !27, debug-location !28 - DBG_VALUE debug-use $r2, debug-use $noreg, !20, !27, debug-location !28 - DBG_VALUE debug-use $r3, debug-use $noreg, !21, !27, debug-location !28 + DBG_VALUE $r0, $noreg, !18, !27, debug-location !28 + DBG_VALUE $r1, $noreg, !19, !27, debug-location !28 + DBG_VALUE $r2, $noreg, !20, !27, debug-location !28 + DBG_VALUE $r3, $noreg, !21, !27, debug-location !28 $r1 = tMOVr killed $r2, 14, $noreg, debug-location !32 $r2 = tMOVr killed $r3, 14, $noreg, debug-location !32 tBL 14, $noreg, @g, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit $r1, implicit $r2, implicit-def $sp, debug-location !32 diff --git a/llvm/test/CodeGen/Hexagon/early-if-debug.mir b/llvm/test/CodeGen/Hexagon/early-if-debug.mir index 27e6124d3523..b76f41019a04 100644 --- a/llvm/test/CodeGen/Hexagon/early-if-debug.mir +++ b/llvm/test/CodeGen/Hexagon/early-if-debug.mir @@ -6,11 +6,11 @@ # CHECK: %0:intregs = COPY $r0 # CHECK: %1:predregs = C2_cmpeqi %0, 0 # CHECK: %2:intregs = A2_tfrsi 123 -# CHECK: DBG_VALUE debug-use %0, debug-use $noreg -# CHECK: DBG_VALUE debug-use %0, debug-use $noreg -# CHECK: DBG_VALUE debug-use %0, debug-use $noreg -# CHECK: DBG_VALUE debug-use %0, debug-use $noreg -# CHECK: DBG_VALUE debug-use %0, debug-use $noreg +# CHECK: DBG_VALUE %0, $noreg +# CHECK: DBG_VALUE %0, $noreg +# CHECK: DBG_VALUE %0, $noreg +# CHECK: DBG_VALUE %0, $noreg +# CHECK: DBG_VALUE %0, $noreg # CHECK: %3:intregs = A2_tfrsi 321 # CHECK: %5:intregs = C2_mux %1, %2, %3 @@ -40,11 +40,11 @@ body: | J2_jump %bb.1, implicit-def dead $pc bb.1: - DBG_VALUE debug-use %0, debug-use $noreg, !1, !1 - DBG_VALUE debug-use %0, debug-use $noreg, !1, !1 - DBG_VALUE debug-use %0, debug-use $noreg, !1, !1 - DBG_VALUE debug-use %0, debug-use $noreg, !1, !1 - DBG_VALUE debug-use %0, debug-use $noreg, !1, !1 + DBG_VALUE %0, $noreg, !1, !1 + DBG_VALUE %0, $noreg, !1, !1 + DBG_VALUE %0, $noreg, !1, !1 + DBG_VALUE %0, $noreg, !1, !1 + DBG_VALUE %0, $noreg, !1, !1 %3 = A2_tfrsi 321 bb.2: diff --git a/llvm/test/CodeGen/MIR/X86/diexpr-win32.mir b/llvm/test/CodeGen/MIR/X86/diexpr-win32.mir index 3388ef714d42..384c6bf57c9f 100644 --- a/llvm/test/CodeGen/MIR/X86/diexpr-win32.mir +++ b/llvm/test/CodeGen/MIR/X86/diexpr-win32.mir @@ -193,8 +193,8 @@ body: | CFI_INSTRUCTION def_cfa_offset 8 CFI_INSTRUCTION offset $esi, -8 $esi = MOV32rm $esp, 1, _, 8, _ :: (load 4 from %fixed-stack.2) - DBG_VALUE debug-use $esp, 0, !26, !10, debug-location !25 - DBG_VALUE debug-use $esp, 0, !23, !DIExpression(DW_OP_plus_uconst, 8, DW_OP_deref), debug-location !25 + DBG_VALUE $esp, 0, !26, !10, debug-location !25 + DBG_VALUE $esp, 0, !23, !DIExpression(DW_OP_plus_uconst, 8, DW_OP_deref), debug-location !25 CALLpcrel32 @getString, csr_32, implicit $esp, implicit-def $esp, implicit-def $eax, debug-location !29 $ecx = MOV32rm $eax, 1, _, 0, _, debug-location !29 :: (dereferenceable load 4 from %ir.1) $edx = MOV32rm $eax, 1, _, 4, _, debug-location !29 :: (dereferenceable load 4 from %ir.1 + 4) @@ -245,7 +245,7 @@ body: | bb.0.entry: $eax = MOV32rm $esp, 1, _, 4, _ :: (load 4 from %fixed-stack.1) $eax = MOV32rm killed $eax, 1, _, 0, _, debug-location !34 :: (load 4 from %ir.0) - DBG_VALUE debug-use $eax, 0, !35, !DIExpression(DW_OP_constu, 4, DW_OP_minus), debug-location !34 + DBG_VALUE $eax, 0, !35, !DIExpression(DW_OP_constu, 4, DW_OP_minus), debug-location !34 $eax = ADD32rm killed $eax, $esp, 1, _, 8, _, implicit-def dead $eflags, debug-location !36 :: (load 4 from %fixed-stack.0) RET 0, $eax, debug-location !36 diff --git a/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir b/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir index ec819628f446..8b6c5cbf5261 100644 --- a/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir +++ b/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir @@ -59,10 +59,14 @@ stack: body: | bb.0.entry: liveins: $edi - ; CHECK: DBG_VALUE debug-use $noreg, 0, !11, !DIExpression(), debug-location !12 + ; CHECK: DBG_VALUE $noreg, 0, !11, !DIExpression(), debug-location !12 + ; CHECK: DBG_VALUE $noreg, 0, !11, !DIExpression(), debug-location !12 ; CHECK: $eax = COPY %0, debug-location !13 ; CHECK: RETQ $eax, debug-location !13 %0 = COPY $edi + DBG_VALUE _, 0, !12, !DIExpression(), debug-location !13 + ; Test whether debug-use is still recognized for compatibility with old + ; files. DBG_VALUE debug-use _, 0, !12, !DIExpression(), debug-location !13 MOV32mr %stack.0.x.addr, 1, _, 0, _, %0 $eax = COPY %0, debug-location !14 diff --git a/llvm/test/CodeGen/MIR/X86/pr38773.mir b/llvm/test/CodeGen/MIR/X86/pr38773.mir index 0cf0bb25b9e5..19b0debf2979 100644 --- a/llvm/test/CodeGen/MIR/X86/pr38773.mir +++ b/llvm/test/CodeGen/MIR/X86/pr38773.mir @@ -97,8 +97,8 @@ body: | IDIV32r killed renamable $ecx, implicit-def $eax, implicit-def dead $edx, implicit-def dead $eflags, implicit $eax, implicit killed $edx renamable $ecx = COPY $eax ; CHECK: IDIV32r killed renamable $ecx - ; CHECK-NEXT: DBG_VALUE debug-use $eax, debug-use $noreg, !12, !DIExpression(), debug-location !13 - DBG_VALUE debug-use $ecx, debug-use $noreg, !12, !DIExpression(), debug-location !13 + ; CHECK-NEXT: DBG_VALUE $eax, $noreg, !12, !DIExpression(), debug-location !13 + DBG_VALUE $ecx, $noreg, !12, !DIExpression(), debug-location !13 $eax = COPY killed renamable $ecx RET 0, $eax diff --git a/llvm/test/CodeGen/PowerPC/debuginfo-split-int.ll b/llvm/test/CodeGen/PowerPC/debuginfo-split-int.ll index 5a1e409441b6..e12d5e5d220e 100644 --- a/llvm/test/CodeGen/PowerPC/debuginfo-split-int.ll +++ b/llvm/test/CodeGen/PowerPC/debuginfo-split-int.ll @@ -27,9 +27,9 @@ target triple = "ppc32" ; ; High 32 bits in R3, low 32 bits in R4 ; CHECK: %0:gprc = COPY $r3 -; CHECK: DBG_VALUE debug-use %0, debug-use $noreg, [[DL]], !DIExpression(DW_OP_LLVM_fragment, 0, 32) +; CHECK: DBG_VALUE %0, $noreg, [[DL]], !DIExpression(DW_OP_LLVM_fragment, 0, 32) ; CHECK: %1:gprc = COPY $r4 -; CHECK: DBG_VALUE debug-use %1, debug-use $noreg, [[DL]], !DIExpression(DW_OP_LLVM_fragment, 32, 32) +; CHECK: DBG_VALUE %1, $noreg, [[DL]], !DIExpression(DW_OP_LLVM_fragment, 32, 32) define void @bar() local_unnamed_addr #0 !dbg !6 { %1 = alloca i64, align 8 %2 = tail call i64 @foo() diff --git a/llvm/test/CodeGen/PowerPC/debuginfo-stackarg.ll b/llvm/test/CodeGen/PowerPC/debuginfo-stackarg.ll index 3830589b4cb5..b49f363ed803 100644 --- a/llvm/test/CodeGen/PowerPC/debuginfo-stackarg.ll +++ b/llvm/test/CodeGen/PowerPC/debuginfo-stackarg.ll @@ -34,7 +34,7 @@ define i64 @foo(i64 %bar1, i64 %bar2, i64 %bar3, i64 %bar4, i64 %bar5) local_unn ; We expect to find a DBG_VALUE refering to the metadata id for bar5, using the lowest ; of the two fixed stack offsets found earlier. ; CHECK-LABEL: body: -; CHECK: DBG_VALUE debug-use $r1, 0, !17, !DIExpression(DW_OP_plus_uconst, 8) +; CHECK: DBG_VALUE $r1, 0, !17, !DIExpression(DW_OP_plus_uconst, 8) entry: tail call void @llvm.dbg.value(metadata i64 %bar1, metadata !13, metadata !DIExpression()), !dbg !18 tail call void @llvm.dbg.value(metadata i64 %bar2, metadata !14, metadata !DIExpression()), !dbg !19 diff --git a/llvm/test/CodeGen/X86/coalesce-dbg-value-subreg-rewrite.mir b/llvm/test/CodeGen/X86/coalesce-dbg-value-subreg-rewrite.mir index 3c339bb013d0..8fa3d82a9669 100644 --- a/llvm/test/CodeGen/X86/coalesce-dbg-value-subreg-rewrite.mir +++ b/llvm/test/CodeGen/X86/coalesce-dbg-value-subreg-rewrite.mir @@ -36,7 +36,7 @@ tracksRegLiveness: true body: | bb.0.entry: %0:gr16_abcd = MOV16ri 0 - DBG_VALUE debug-use %0.sub_8bit:gr16_abcd, debug-use $noreg, !11, !DIExpression(), debug-location !13 + DBG_VALUE %0.sub_8bit:gr16_abcd, $noreg, !11, !DIExpression(), debug-location !13 undef %6.sub_8bit:gr16_abcd = COPY killed %0.sub_8bit dead $dx = COPY killed %6 @@ -48,4 +48,4 @@ body: | # # CHECK: bb.0.entry: # CHECK-NEXT: $dx = MOV16ri 0 -# CHECK-NEXT: DBG_VALUE debug-use $dl, +# CHECK-NEXT: DBG_VALUE $dl, diff --git a/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir b/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir index 1a9221ae9e95..def14391a514 100644 --- a/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir +++ b/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir @@ -207,7 +207,7 @@ body: | liveins: $rdi dead renamable $al = MOV8rm $rsp, 1, $noreg, -121, $noreg - DBG_VALUE debug-use $al, debug-use $noreg, !16, !DIExpression(), debug-location !19 + DBG_VALUE $al, $noreg, !16, !DIExpression(), debug-location !19 renamable $ecx = XOR32rr undef $ecx, undef $ecx, implicit-def dead $eflags JMP_1 %bb.1 ... diff --git a/llvm/test/CodeGen/X86/dbg-value-superreg-copy.mir b/llvm/test/CodeGen/X86/dbg-value-superreg-copy.mir index cd316dea88b9..0a8af06b9abd 100644 --- a/llvm/test/CodeGen/X86/dbg-value-superreg-copy.mir +++ b/llvm/test/CodeGen/X86/dbg-value-superreg-copy.mir @@ -37,7 +37,7 @@ body: | %0:gr16_abcd = MOV16ri 1 bb.1: - DBG_VALUE debug-use %0.sub_8bit_hi, debug-use $noreg, !7, !DIExpression(), debug-location !9 + DBG_VALUE %0.sub_8bit_hi, $noreg, !7, !DIExpression(), debug-location !9 %1:gr16 = COPY %0 %2:gr16 = COPY %0 diff --git a/llvm/test/CodeGen/X86/lea-opt-with-debug.mir b/llvm/test/CodeGen/X86/lea-opt-with-debug.mir index 34525d73ea77..a1cf2041db6a 100644 --- a/llvm/test/CodeGen/X86/lea-opt-with-debug.mir +++ b/llvm/test/CodeGen/X86/lea-opt-with-debug.mir @@ -98,7 +98,7 @@ body: | ; CHECK: %3:gr64_nosp = LEA64r %2, 2, %2, 0, $noreg, debug-location !13 ; CHECK-NEXT: %4:gr64 = LEA64r %1, 4, %3, 0, $noreg, debug-location !13 ; CHECK-NOT: %0:gr64 = LEA64r %1, 4, %3, 8, $noreg, debug-location !14 - ; CHECK: DBG_VALUE debug-use %4, debug-use $noreg, !11, !DIExpression(DW_OP_plus_uconst, 8, DW_OP_stack_value), debug-location !15 + ; CHECK: DBG_VALUE %4, $noreg, !11, !DIExpression(DW_OP_plus_uconst, 8, DW_OP_stack_value), debug-location !15 %1 = MOV64rm $rip, 1, $noreg, @c, $noreg, debug-location !13 :: (dereferenceable load 8 from @c) %2 = MOVSX64rm32 $rip, 1, $noreg, @a, $noreg, debug-location !13 :: (dereferenceable load 4 from @a) @@ -107,7 +107,7 @@ body: | %5 = COPY %4.sub_32bit, debug-location !13 MOV32mr $rip, 1, $noreg, @d, $noreg, killed %5, debug-location !13 :: (store 4 into @d) %0 = LEA64r %1, 4, %3, 8, $noreg, debug-location !14 - DBG_VALUE debug-use %0, debug-use $noreg, !11, !DIExpression(), debug-location !15 + DBG_VALUE %0, $noreg, !11, !DIExpression(), debug-location !15 ; CHECK-LABEL: bb.1 (%ir-block.8): ; CHECK: %6:gr32 = MOV32rm %4, 1, $noreg, 8, $noreg, debug-location !17 :: (load 4 from %ir.7) diff --git a/llvm/test/CodeGen/X86/machine-cp-debug.mir b/llvm/test/CodeGen/X86/machine-cp-debug.mir index a7fcd9801e79..a3230e8910cb 100644 --- a/llvm/test/CodeGen/X86/machine-cp-debug.mir +++ b/llvm/test/CodeGen/X86/machine-cp-debug.mir @@ -19,5 +19,5 @@ body: | bb.0: liveins: $eax $ebx = COPY $eax - DBG_VALUE debug-use $ebx, debug-use _, !1, !1 + DBG_VALUE $ebx, _, !1, !1 ... diff --git a/llvm/test/CodeGen/X86/opt_phis.mir b/llvm/test/CodeGen/X86/opt_phis.mir index e282a92e2016..f00ee76385dc 100644 --- a/llvm/test/CodeGen/X86/opt_phis.mir +++ b/llvm/test/CodeGen/X86/opt_phis.mir @@ -27,7 +27,7 @@ body: | bb.1: %1:gr32 = PHI %0, %bb.0, %2, %bb.1 - DBG_VALUE debug-use %1, debug-use _, !7, !DIExpression(), debug-location !6 + DBG_VALUE %1, _, !7, !DIExpression(), debug-location !6 %2:gr32 = IMPLICIT_DEF JMP_1 %bb.1 ... diff --git a/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir b/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir index f4f69b602791..079374752b1a 100644 --- a/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir +++ b/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir @@ -251,8 +251,8 @@ body: | liveins: $esi, $rdi, $r14, $rbx, $rbp ; CHECK: [[REGISTER:\$r[a-z0-9]+]] = LEA64r {{\$r[a-z0-9]+}}, 1, $noreg, -20, $noreg - ; CHECK-NEXT: DBG_VALUE debug-use [[REGISTER]], debug-use $noreg, ![[J_VAR]], !DIExpression(), debug-location ![[J_LOC]] - ; CHECK-NEXT: DBG_VALUE debug-use [[REGISTER]], debug-use $noreg, ![[I_VAR]], !DIExpression(), debug-location ![[I_LOC]] + ; CHECK-NEXT: DBG_VALUE [[REGISTER]], $noreg, ![[J_VAR]], !DIExpression(), debug-location ![[J_LOC]] + ; CHECK-NEXT: DBG_VALUE [[REGISTER]], $noreg, ![[I_VAR]], !DIExpression(), debug-location ![[I_LOC]] frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp CFI_INSTRUCTION def_cfa_offset 16 @@ -268,8 +268,8 @@ body: | $rbx = MOV64rr $rdi CALL64pcrel32 @_ZN1lC2Ei, csr_64, implicit $rsp, implicit $rdi, implicit $esi, implicit-def $rsp $rdi = LEA64r $rbx, 1, $noreg, 8, $noreg - DBG_VALUE debug-use $rdi, debug-use $noreg, !20, !17, debug-location !27 - DBG_VALUE debug-use $rdi, debug-use $noreg, !10, !17, debug-location !18 + DBG_VALUE $rdi, $noreg, !20, !17, debug-location !27 + DBG_VALUE $rdi, $noreg, !10, !17, debug-location !18 $rax = MOV64rm $rbx, 1, $noreg, 16, $noreg :: (load 8) MOV64mr $rbx, 1, $noreg, 8, $noreg, killed $rax :: (store 8) MOV64mr $rbx, 1, $noreg, 24, $noreg, $rdi :: (store 8) @@ -286,9 +286,9 @@ body: | $rsi = CMOVNE64rr killed $rsi, $rdx, implicit killed $eflags $rsi = OR64rr killed $rsi, killed $rcx, implicit-def $eflags $rcx = LEA64r $rbp, 1, $noreg, -20, $noreg - DBG_VALUE debug-use $rcx, debug-use $noreg, !46, !17, debug-location !48 - DBG_VALUE debug-use $rcx, debug-use $noreg, !39, !17, debug-location !44 - DBG_VALUE debug-use $rbp, -20, !29, !17, debug-location !36 + DBG_VALUE $rcx, $noreg, !46, !17, debug-location !48 + DBG_VALUE $rcx, $noreg, !39, !17, debug-location !44 + DBG_VALUE $rbp, -20, !29, !17, debug-location !36 $rcx = CMOVNE64rr killed $rcx, killed $rdx, implicit killed $eflags $rcx = OR64rr killed $rcx, killed $rsi, implicit-def dead $eflags $rdx = MOVSX64rm32 $rbx, 1, $noreg, 0, $noreg :: (load 4, align 8) diff --git a/llvm/test/CodeGen/X86/postra-ignore-dbg-instrs.mir b/llvm/test/CodeGen/X86/postra-ignore-dbg-instrs.mir index 0286e6e68bf7..25e6992b7b7a 100644 --- a/llvm/test/CodeGen/X86/postra-ignore-dbg-instrs.mir +++ b/llvm/test/CodeGen/X86/postra-ignore-dbg-instrs.mir @@ -62,7 +62,7 @@ # CHECK-NOT: $eax = COPY $edi # CHECK: bb.1: # CHECK: renamable $eax = COPY $edi -# CHECK-NEXT: DBG_VALUE debug-use $eax, +# CHECK-NEXT: DBG_VALUE $eax, # CHECK: bb.2: name: x1 alignment: 4 @@ -71,9 +71,9 @@ body: | bb.0: successors: %bb.2, %bb.1; %bb.2, %bb.1 liveins: $edi - DBG_VALUE debug-use $edi, debug-use $noreg, !14, !DIExpression(), debug-location !16 + DBG_VALUE $edi, $noreg, !14, !DIExpression(), debug-location !16 renamable $eax = COPY $edi - DBG_VALUE debug-use $eax, debug-use $noreg, !14, !DIExpression(), debug-location !16 + DBG_VALUE $eax, $noreg, !14, !DIExpression(), debug-location !16 CMP32mi8 $rip, 1, $noreg, @x0, $noreg, 0, implicit-def $eflags, debug-location !16 JE_1 %bb.2, implicit killed $eflags, debug-location !16 JMP_1 %bb.1, debug-location !16 diff --git a/llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir b/llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir index 429ea72db8ec..6943033c565c 100644 --- a/llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir +++ b/llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir @@ -136,8 +136,8 @@ body: | successors: %bb.4(0x40000000), %bb.1(0x40000000) liveins: $ecx, $edx - DBG_VALUE debug-use $edx, debug-use $noreg, !15, !DIExpression(), debug-location !25 - DBG_VALUE debug-use $ecx, debug-use $noreg, !16, !DIExpression(), debug-location !26 + DBG_VALUE $edx, $noreg, !15, !DIExpression(), debug-location !25 + DBG_VALUE $ecx, $noreg, !16, !DIExpression(), debug-location !26 $eax = COPY $ecx DBG_VALUE %fixed-stack.0, 0, !16, !DIExpression(), debug-location !26 DBG_VALUE %fixed-stack.1, 0, !15, !DIExpression(), debug-location !25 @@ -149,9 +149,9 @@ body: | successors: %bb.2(0x80000000) $esi = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (load 4 from %fixed-stack.0) - DBG_VALUE debug-use $esi, debug-use $noreg, !13, !DIExpression(), debug-location !19 + DBG_VALUE $esi, $noreg, !13, !DIExpression(), debug-location !19 $edi = MOV32rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (load 4 from %fixed-stack.1) - DBG_VALUE debug-use $edi, debug-use $noreg, !14, !DIExpression(), debug-location !20 + DBG_VALUE $edi, $noreg, !14, !DIExpression(), debug-location !20 $edi = DEC32r killed $edi, implicit-def dead $eflags, debug-location !30 $ebx = LEA32r %fixed-stack.1, 1, $noreg, 0, $noreg diff --git a/llvm/test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.ll b/llvm/test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.ll index 0606ddf60872..5c2fe8447a6b 100644 --- a/llvm/test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.ll +++ b/llvm/test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.ll @@ -12,28 +12,28 @@ entry: ; CHECK-LABEL: bb.0.entry: %var = add i32 %x, 1, !dbg !12 call void @llvm.dbg.value(metadata i32 %var, metadata !9, metadata !DIExpression()), !dbg !12 -; CHECK: DBG_VALUE debug-use renamable $w0, debug-use $noreg, !9, !DIExpression(), debug-location !12 +; CHECK: DBG_VALUE renamable $w0, $noreg, !9, !DIExpression(), debug-location !12 ; CHECK-NEXT: STRWui killed $w0, $sp, 3 :: (store 4 into %stack.0) -; CHECK-NEXT: DBG_VALUE debug-use $sp, 0, !9, !DIExpression(DW_OP_plus_uconst, 12) +; CHECK-NEXT: DBG_VALUE $sp, 0, !9, !DIExpression(DW_OP_plus_uconst, 12) br label %artificial-bb-1, !dbg !13 artificial-bb-1: ; preds = %entry ; CHECK-LABEL: bb.1.artificial-bb-1: -; CHECK: DBG_VALUE debug-use $sp, 0, !9, !DIExpression(DW_OP_plus_uconst, 12) +; CHECK: DBG_VALUE $sp, 0, !9, !DIExpression(DW_OP_plus_uconst, 12) br label %artificial-bb-2 artificial-bb-2: ; preds = %artificial-bb-1 ; CHECK-LABEL: bb.2.artificial-bb-2: -; CHECK: DBG_VALUE debug-use $sp, 0, !9, !DIExpression(DW_OP_plus_uconst, 12) +; CHECK: DBG_VALUE $sp, 0, !9, !DIExpression(DW_OP_plus_uconst, 12) %invisible = add i32 %var, 1 br label %return, !dbg !14 return: ; preds = %artificial-bb-2 ; CHECK-LABEL: bb.3.return: -; CHECK: DBG_VALUE debug-use $sp, 0, !9, !DIExpression(DW_OP_plus_uconst, 12) +; CHECK: DBG_VALUE $sp, 0, !9, !DIExpression(DW_OP_plus_uconst, 12) call void @use(i32 %var) ret void, !dbg !15 diff --git a/llvm/test/DebugInfo/ARM/sdag-split-arg1.ll b/llvm/test/DebugInfo/ARM/sdag-split-arg1.ll index 90834a44ba8b..78cdc4dd4bda 100644 --- a/llvm/test/DebugInfo/ARM/sdag-split-arg1.ll +++ b/llvm/test/DebugInfo/ARM/sdag-split-arg1.ll @@ -7,7 +7,7 @@ entry: %0 = bitcast double %a to i64 %extract.t84 = trunc i64 %0 to i32 tail call void @llvm.dbg.value(metadata i32 %extract.t84, metadata !8, metadata !DIExpression(DW_OP_LLVM_fragment, 0, 32)), !dbg !12 - ; CHECK: DBG_VALUE debug-use $r0, debug-use $noreg, !6, !DIExpression(DW_OP_LLVM_fragment, 0, 32) + ; CHECK: DBG_VALUE $r0, $noreg, !6, !DIExpression(DW_OP_LLVM_fragment, 0, 32) %r.sroa.0.0.insert.ext35 = zext i32 %extract.t84 to i64 ret i64 %r.sroa.0.0.insert.ext35 } diff --git a/llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir b/llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir index 222bbd798ba3..4594065cc296 100644 --- a/llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir +++ b/llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir @@ -145,11 +145,11 @@ body: | $sp = frame-setup SUBXri $sp, 32, 0 frame-setup STPXi killed $fp, killed $lr, $sp, 2 :: (store 8 into %stack.3), (store 8 into %stack.2) $fp = frame-setup ADDXri $sp, 16, 0 - DBG_VALUE debug-use $w0, debug-use _, !19, !22, debug-location !23 + DBG_VALUE $w0, _, !19, !22, debug-location !23 STURWi killed $w0, $fp, -4 :: (store 4 into %stack.0.x.addr) - DBG_VALUE debug-use $w1, debug-use _, !20, !22, debug-location !28 + DBG_VALUE $w1, _, !20, !22, debug-location !28 STRWui killed $w1, $sp, 2, debug-location !30 :: (store 4 into %stack.1) - DBG_VALUE debug-use $sp, 0, !20, !36, debug-location !28 + DBG_VALUE $sp, 0, !20, !36, debug-location !28 BL @g, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $d0, implicit killed $d1, implicit killed $d2, implicit killed $d3, implicit-def $sp, debug-location !30 $w0 = LDRWui $sp, 2, debug-location !33 :: (load 4 from %stack.1) CBZW killed $w0, %bb.2.if.end, debug-location !33 @@ -157,13 +157,13 @@ body: | bb.1.if.then: successors: %bb.2.if.end(0x80000000) - DBG_VALUE debug-use $sp, 0, !20, !36, debug-location !28 + DBG_VALUE $sp, 0, !20, !36, debug-location !28 $x0 = SUBXri $fp, 4, 0 - DBG_VALUE debug-use $x0, debug-use _, !19, !22, debug-location !23 + DBG_VALUE $x0, _, !19, !22, debug-location !23 BL @h, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $x0, debug-location !34 bb.2.if.end: - DBG_VALUE debug-use $sp, 0, !20, !36, debug-location !28 + DBG_VALUE $sp, 0, !20, !36, debug-location !28 $w8 = MOVZWi 0, 0 $x0 = ORRXrs $xzr, undef $x8, 0, implicit killed $w8, debug-location !35 $fp, $lr = LDPXi $sp, 2, debug-location !35 :: (load 8 from %stack.3), (load 8 from %stack.2) diff --git a/llvm/test/DebugInfo/MIR/ARM/live-debug-values-reg-copy.mir b/llvm/test/DebugInfo/MIR/ARM/live-debug-values-reg-copy.mir index e14c0a470518..e29420e27d5b 100644 --- a/llvm/test/DebugInfo/MIR/ARM/live-debug-values-reg-copy.mir +++ b/llvm/test/DebugInfo/MIR/ARM/live-debug-values-reg-copy.mir @@ -5,9 +5,9 @@ # to another. The altered instructions are labeled below. # # CHECK: ![[ARG1:.*]] = !DILocalVariable(name: "arg1" -# CHECK: DBG_VALUE debug-use $r4, debug-use $noreg, ![[ARG1]], !DIExpression(), debug-location +# CHECK: DBG_VALUE $r4, $noreg, ![[ARG1]], !DIExpression(), debug-location # CHECK: $r5 = MOVr killed $r4, 14, $noreg, $noreg, debug-location -# CHECK-NEXT: DBG_VALUE debug-use $r5, debug-use $noreg, ![[ARG1]], !DIExpression(), debug-location +# CHECK-NEXT: DBG_VALUE $r5, $noreg, ![[ARG1]], !DIExpression(), debug-location --- | ; ModuleID = 'live-debug-values-reg-copy.ll' source_filename = "live-debug-values-reg-copy.c" @@ -119,8 +119,8 @@ body: | frame-setup CFI_INSTRUCTION offset $r11, -8 frame-setup CFI_INSTRUCTION offset $r5, -12 frame-setup CFI_INSTRUCTION offset $r4, -16 - DBG_VALUE debug-use $r0, debug-use $noreg, !13, !DIExpression(), debug-location !16 - DBG_VALUE debug-use $r0, debug-use $noreg, !13, !DIExpression(), debug-location !16 + DBG_VALUE $r0, $noreg, !13, !DIExpression(), debug-location !16 + DBG_VALUE $r0, $noreg, !13, !DIExpression(), debug-location !16 CMPri renamable $r0, 10, 14, $noreg, implicit-def $cpsr, debug-location !16 Bcc %bb.2, 13, killed $cpsr, debug-location !16 @@ -132,7 +132,7 @@ body: | bb.2.if.else: renamable $r4 = ADDri killed renamable $r0, 10, 14, $noreg, $noreg, debug-location !16 - DBG_VALUE debug-use $r4, debug-use $noreg, !13, !DIExpression(), debug-location !16 + DBG_VALUE $r4, $noreg, !13, !DIExpression(), debug-location !16 $r0 = MOVr $r4, 14, $noreg, $noreg, debug-location !16 BL @externFunc2, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit-def $sp, implicit-def $r0, debug-location !16 $r5 = MOVr killed $r0, 14, $noreg, $noreg, debug-location !16 diff --git a/llvm/test/DebugInfo/MIR/ARM/split-superreg-complex.mir b/llvm/test/DebugInfo/MIR/ARM/split-superreg-complex.mir index 89472ec1da0e..868321bab2ac 100644 --- a/llvm/test/DebugInfo/MIR/ARM/split-superreg-complex.mir +++ b/llvm/test/DebugInfo/MIR/ARM/split-superreg-complex.mir @@ -113,7 +113,7 @@ body: | tBL 14, _, @v, csr_ios, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0, implicit-def $r1, implicit-def $r2, implicit-def $r3, debug-location !19 $d1 = VMOVDRR killed $r2, killed $r3, 14, _, implicit-def $q0, debug-location !19 $d0 = VMOVDRR killed $r0, killed $r1, 14, _, implicit killed $q0, implicit-def $q0, debug-location !19 - DBG_VALUE debug-use $q0, debug-use _, !14, !20, debug-location !21 + DBG_VALUE $q0, _, !14, !20, debug-location !21 $s4 = VMOVS $s1, 14, _, implicit-def $d2, debug-location !24 $d0 = VADDfd $d0, killed $d2, 14, _, implicit killed $q0, debug-location !24 $r0 = VMOVRS $s0, 14, _, implicit killed $d0, debug-location !25 diff --git a/llvm/test/DebugInfo/MIR/ARM/split-superreg-piece.mir b/llvm/test/DebugInfo/MIR/ARM/split-superreg-piece.mir index 945fc09d6e47..69b4f7a07a4c 100644 --- a/llvm/test/DebugInfo/MIR/ARM/split-superreg-piece.mir +++ b/llvm/test/DebugInfo/MIR/ARM/split-superreg-piece.mir @@ -113,7 +113,7 @@ body: | tBL 14, _, @v, csr_ios, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0, implicit-def $r1, implicit-def $r2, implicit-def $r3, debug-location !19 $d1 = VMOVDRR killed $r2, killed $r3, 14, _, implicit-def $q0, debug-location !19 $d0 = VMOVDRR killed $r0, killed $r1, 14, _, implicit killed $q0, implicit-def $q0, debug-location !19 - DBG_VALUE debug-use $q0, debug-use _, !14, !20, debug-location !21 + DBG_VALUE $q0, _, !14, !20, debug-location !21 $s4 = VMOVS $s1, 14, _, implicit-def $d2, debug-location !24 $d0 = VADDfd $d0, killed $d2, 14, _, implicit killed $q0, debug-location !24 $r0 = VMOVRS $s0, 14, _, implicit killed $d0, debug-location !25 diff --git a/llvm/test/DebugInfo/MIR/ARM/split-superreg.mir b/llvm/test/DebugInfo/MIR/ARM/split-superreg.mir index a87c33485bc6..39b8b4341faf 100644 --- a/llvm/test/DebugInfo/MIR/ARM/split-superreg.mir +++ b/llvm/test/DebugInfo/MIR/ARM/split-superreg.mir @@ -113,7 +113,7 @@ body: | tBL 14, _, @v, csr_ios, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0, implicit-def $r1, implicit-def $r2, implicit-def $r3, debug-location !19 $d1 = VMOVDRR killed $r2, killed $r3, 14, _, implicit-def $q0, debug-location !19 $d0 = VMOVDRR killed $r0, killed $r1, 14, _, implicit killed $q0, implicit-def $q0, debug-location !19 - DBG_VALUE debug-use $q0, debug-use _, !14, !20, debug-location !21 + DBG_VALUE $q0, _, !14, !20, debug-location !21 $s4 = VMOVS $s1, 14, _, implicit-def $d2, debug-location !24 $d0 = VADDfd $d0, killed $d2, 14, _, implicit killed $q0, debug-location !24 $r0 = VMOVRS $s0, 14, _, implicit killed $d0, debug-location !25 diff --git a/llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir b/llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir index e228c8876a53..b1239697b7b4 100644 --- a/llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir +++ b/llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir @@ -21,7 +21,7 @@ # # Check that last bundled instruction of block gets recognized as end of basic block. # CHECK: bb.2.if.end -# CHECK-NEXT: DBG_VALUE debug-use $s0, debug-use $noreg, !12, !DIExpression(), debug-location !17 +# CHECK-NEXT: DBG_VALUE $s0, $noreg, !12, !DIExpression(), debug-location !17 --- | ; ModuleID = '' @@ -161,15 +161,15 @@ body: | SW killed $s0, $sp, 24 :: (store 4 into %stack.2) CFI_INSTRUCTION offset $ra_64, -4 CFI_INSTRUCTION offset $s0_64, -8 - DBG_VALUE debug-use $a0, debug-use $noreg, !12, !DIExpression(), debug-location !17 + DBG_VALUE $a0, $noreg, !12, !DIExpression(), debug-location !17 $s0 = OR $a0, $zero - DBG_VALUE debug-use $s0, debug-use $noreg, !12, !DIExpression(), debug-location !17 - DBG_VALUE debug-use $sp, 0, !13, !DIExpression(DW_OP_plus_uconst, 20), debug-location !19 + DBG_VALUE $s0, $noreg, !12, !DIExpression(), debug-location !17 + DBG_VALUE $sp, 0, !13, !DIExpression(DW_OP_plus_uconst, 20), debug-location !19 JAL @set_cond, csr_o32, implicit-def dead $ra, implicit $a0, implicit $a1, implicit-def $sp, debug-location !20 { renamable $a1 = LEA_ADDiu $sp, 20 } renamable $at = LW $sp, 20, debug-location !21 :: (dereferenceable load 4 from %ir.condition, !tbaa !23) - DBG_VALUE debug-use $at, debug-use $noreg, !13, !DIExpression(), debug-location !19 + DBG_VALUE $at, $noreg, !13, !DIExpression(), debug-location !19 BEQ killed renamable $at, $zero, %bb.2, implicit-def $at, debug-location !27 { NOP debug-location !27 } diff --git a/llvm/test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir b/llvm/test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir index 70a85c075ec3..dd009b8de451 100644 --- a/llvm/test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir +++ b/llvm/test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir @@ -6,12 +6,12 @@ # # CHECK: ![[ARG1:.*]] = !DILocalVariable(name: "arg1" # CHECK: ![[ARG2:.*]] = !DILocalVariable(name: "arg2" -# CHECK: DBG_VALUE debug-use $s0_64, debug-use $noreg, ![[ARG2]], !DIExpression(), debug-location +# CHECK: DBG_VALUE $s0_64, $noreg, ![[ARG2]], !DIExpression(), debug-location # CHECK: $s1_64 = OR64 killed $s0_64, $zero_64, debug-location -# CHECK-NEXT: DBG_VALUE debug-use $s1_64, debug-use $noreg, ![[ARG2]], !DIExpression(), debug-location -# CHECK: DBG_VALUE debug-use $f24, debug-use $noreg, ![[ARG1]], !DIExpression(), debug-location +# CHECK-NEXT: DBG_VALUE $s1_64, $noreg, ![[ARG2]], !DIExpression(), debug-location +# CHECK: DBG_VALUE $f24, $noreg, ![[ARG1]], !DIExpression(), debug-location # CHECK: $f26 = FMOV_S killed $f24, debug-location -# CHECK-NEXT: DBG_VALUE debug-use $f26, debug-use $noreg, ![[ARG1]], !DIExpression(), debug-location +# CHECK-NEXT: DBG_VALUE $f26, $noreg, ![[ARG1]], !DIExpression(), debug-location --- | ; ModuleID = 'live-debug-values-reg-copy.ll' @@ -161,11 +161,11 @@ body: | CFI_INSTRUCTION offset $d24_64, -12 CFI_INSTRUCTION offset $ra_64, -24 CFI_INSTRUCTION offset $s0_64, -32 - DBG_VALUE debug-use $f12, debug-use $noreg, !14, !DIExpression(), debug-location !19 - DBG_VALUE debug-use $a1_64, debug-use $noreg, !15, !DIExpression(), debug-location !19 - DBG_VALUE debug-use $s0, debug-use $noreg, !15, !DIExpression(), debug-location !19 - DBG_VALUE debug-use $s0_64, debug-use $noreg, !15, !DIExpression(), debug-location !19 - DBG_VALUE debug-use $f12, debug-use $noreg, !14, !DIExpression(), debug-location !19 + DBG_VALUE $f12, $noreg, !14, !DIExpression(), debug-location !19 + DBG_VALUE $a1_64, $noreg, !15, !DIExpression(), debug-location !19 + DBG_VALUE $s0, $noreg, !15, !DIExpression(), debug-location !19 + DBG_VALUE $s0_64, $noreg, !15, !DIExpression(), debug-location !19 + DBG_VALUE $f12, $noreg, !14, !DIExpression(), debug-location !19 renamable $d0_64 = CVT_D64_S renamable $f12, debug-location !19 renamable $at_64 = LUi64 target-flags(mips-highest) %const.0 renamable $at_64 = DADDiu killed renamable $at_64, target-flags(mips-higher) %const.0 @@ -211,7 +211,7 @@ body: | renamable $at_64 = DSLL killed renamable $at_64, 16 renamable $f0 = LWC1 killed renamable $at_64, target-flags(mips-abs-lo) %const.1, debug-location !19 :: (load 4 from constant-pool) renamable $f24 = FADD_S killed renamable $f12, killed renamable $f0, debug-location !19 - DBG_VALUE debug-use $f24, debug-use $noreg, !14, !DIExpression(), debug-location !19 + DBG_VALUE $f24, $noreg, !14, !DIExpression(), debug-location !19 JAL @externFunc2, csr_n64, implicit-def dead $ra, implicit $f12, implicit-def $sp, implicit-def $f0, debug-location !19 { $f12 = FMOV_S $f24, debug-location !19 } diff --git a/llvm/test/DebugInfo/MIR/X86/bit-piece-dh.mir b/llvm/test/DebugInfo/MIR/X86/bit-piece-dh.mir index 8c74f8395fea..e8100b71eff4 100644 --- a/llvm/test/DebugInfo/MIR/X86/bit-piece-dh.mir +++ b/llvm/test/DebugInfo/MIR/X86/bit-piece-dh.mir @@ -88,7 +88,7 @@ body: | CFI_INSTRUCTION offset $rbp, -16 $rbp = frame-setup MOV64rr $rsp CFI_INSTRUCTION def_cfa_register $rbp - DBG_VALUE debug-use $dh, debug-use _, !14, !15, debug-location !16 + DBG_VALUE $dh, _, !14, !15, debug-location !16 $edi = SHR32ri killed $edi, 8, implicit-def dead $eflags, debug-location !17 $eax = MOVSX32rr8 $dil, implicit killed $edi, debug-location !20 $rbp = POP64r implicit-def $rsp, implicit $rsp, debug-location !20 diff --git a/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir b/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir index e9c03938f2b4..5110dc349bea 100644 --- a/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir +++ b/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir @@ -14,8 +14,8 @@ # ... # # CHECK: bb.1.if.end: -# CHECK: DBG_VALUE debug-use $rbp, 0, !37, !DIExpression(DW_OP_constu, 44, DW_OP_minus), debug-location !58 -# CHECK-NOT: DBG_VALUE debug-use $rbp, 0, !36, !DIExpression(DW_OP_constu, 48, DW_OP_minus), debug-location !57 +# CHECK: DBG_VALUE $rbp, 0, !37, !DIExpression(DW_OP_constu, 44, DW_OP_minus), debug-location !58 +# CHECK-NOT: DBG_VALUE $rbp, 0, !36, !DIExpression(DW_OP_constu, 48, DW_OP_minus), debug-location !57 --- | ; ModuleID = '' @@ -274,12 +274,12 @@ body: | CFI_INSTRUCTION offset $r13, -40 CFI_INSTRUCTION offset $r14, -32 CFI_INSTRUCTION offset $r15, -24 - DBG_VALUE debug-use $edi, debug-use $noreg, !36, !DIExpression(), debug-location !57 - DBG_VALUE debug-use $esi, debug-use $noreg, !37, !DIExpression(), debug-location !58 + DBG_VALUE $edi, $noreg, !36, !DIExpression(), debug-location !57 + DBG_VALUE $esi, $noreg, !37, !DIExpression(), debug-location !58 $ebx = MOV32rr $esi - DBG_VALUE debug-use $ebx, debug-use $noreg, !37, !DIExpression(), debug-location !58 + DBG_VALUE $ebx, $noreg, !37, !DIExpression(), debug-location !58 $r15d = MOV32rr $edi - DBG_VALUE debug-use $r15d, debug-use $noreg, !36, !DIExpression(), debug-location !57 + DBG_VALUE $r15d, $noreg, !36, !DIExpression(), debug-location !57 renamable $r14 = MOV64ri -9223372036854775808 $edi = MOV32rr $ebx CALL64pcrel32 @func1, csr_64, implicit $rsp, implicit $ssp, implicit $edi, implicit-def $rsp, implicit-def $ssp, implicit-def $rax diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir index 1f62a0f81363..8bc340721be9 100644 --- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir +++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir @@ -31,9 +31,9 @@ # DBG_VALUE for variables "x", "y" and "z" are extended into %bb.9 from its # predecessors %bb.0, %bb.2 and %bb.8. # CHECK: bb.9.for.end: -# CHECK-DAG: DBG_VALUE debug-use $edi, debug-use $noreg, ![[X_VAR]], !DIExpression(), debug-location !{{[0-9]+}} -# CHECK-DAG: DBG_VALUE debug-use $esi, debug-use $noreg, ![[Y_VAR]], !DIExpression(), debug-location !{{[0-9]+}} -# CHECK-DAG: DBG_VALUE debug-use $edx, debug-use $noreg, ![[Z_VAR]], !DIExpression(), debug-location !{{[0-9]+}} +# CHECK-DAG: DBG_VALUE $edi, $noreg, ![[X_VAR]], !DIExpression(), debug-location !{{[0-9]+}} +# CHECK-DAG: DBG_VALUE $esi, $noreg, ![[Y_VAR]], !DIExpression(), debug-location !{{[0-9]+}} +# CHECK-DAG: DBG_VALUE $edx, $noreg, ![[Z_VAR]], !DIExpression(), debug-location !{{[0-9]+}} # CHECK: RET --- | @@ -186,10 +186,10 @@ body: | successors: %bb.1.for.body.preheader(20), %bb.9.for.end(12) liveins: $ecx, $edi, $edx, $esi - DBG_VALUE debug-use $edi, debug-use _, !9, !17, debug-location !18 - DBG_VALUE debug-use $esi, debug-use _, !10, !17, debug-location !19 - DBG_VALUE debug-use $edx, debug-use _, !11, !17, debug-location !21 - DBG_VALUE debug-use $ecx, debug-use _, !12, !17, debug-location !23 + DBG_VALUE $edi, _, !9, !17, debug-location !18 + DBG_VALUE $esi, _, !10, !17, debug-location !19 + DBG_VALUE $edx, _, !11, !17, debug-location !21 + DBG_VALUE $ecx, _, !12, !17, debug-location !23 DBG_VALUE 0, 0, !13, !17, debug-location !25 $r8d = MOV32rr $esi, debug-location !26 $r8d = IMUL32rr killed $r8d, $edi, implicit-def dead $eflags, debug-location !26 @@ -200,10 +200,10 @@ body: | successors: %bb.3.for.body(0) liveins: $ecx, $edi, $edx, $esi, $r8d - DBG_VALUE debug-use $edi, debug-use _, !9, !17, debug-location !18 - DBG_VALUE debug-use $esi, debug-use _, !10, !17, debug-location !19 - DBG_VALUE debug-use $edx, debug-use _, !11, !17, debug-location !21 - DBG_VALUE debug-use $ecx, debug-use _, !12, !17, debug-location !23 + DBG_VALUE $edi, _, !9, !17, debug-location !18 + DBG_VALUE $esi, _, !10, !17, debug-location !19 + DBG_VALUE $edx, _, !11, !17, debug-location !21 + DBG_VALUE $ecx, _, !12, !17, debug-location !23 DBG_VALUE 0, 0, !13, !17, debug-location !25 $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags @@ -211,10 +211,10 @@ body: | successors: %bb.4.if.then(4), %bb.5.if.end(124) liveins: $eax, $ecx, $edi, $edx, $esi, $r8d - DBG_VALUE debug-use $edi, debug-use _, !9, !17, debug-location !18 - DBG_VALUE debug-use $esi, debug-use _, !10, !17, debug-location !19 - DBG_VALUE debug-use $edx, debug-use _, !11, !17, debug-location !21 - DBG_VALUE debug-use $ecx, debug-use _, !12, !17, debug-location !23 + DBG_VALUE $edi, _, !9, !17, debug-location !18 + DBG_VALUE $esi, _, !10, !17, debug-location !19 + DBG_VALUE $edx, _, !11, !17, debug-location !21 + DBG_VALUE $ecx, _, !12, !17, debug-location !23 DBG_VALUE 0, 0, !13, !17, debug-location !25 TEST32rr $edi, $edi, implicit-def $eflags, debug-location !35 JG_1 %bb.4.if.then, implicit $eflags @@ -223,10 +223,10 @@ body: | successors: %bb.6.if.then.4(4), %bb.7.if.end.6(124) liveins: $eax, $ecx, $edi, $edx, $esi, $r8d - DBG_VALUE debug-use $edi, debug-use _, !9, !17, debug-location !18 - DBG_VALUE debug-use $esi, debug-use _, !10, !17, debug-location !19 - DBG_VALUE debug-use $edx, debug-use _, !11, !17, debug-location !21 - DBG_VALUE debug-use $ecx, debug-use _, !12, !17, debug-location !23 + DBG_VALUE $edi, _, !9, !17, debug-location !18 + DBG_VALUE $esi, _, !10, !17, debug-location !19 + DBG_VALUE $edx, _, !11, !17, debug-location !21 + DBG_VALUE $ecx, _, !12, !17, debug-location !23 DBG_VALUE 0, 0, !13, !17, debug-location !25 TEST32rr $esi, $esi, implicit-def $eflags, debug-location !39 JG_1 %bb.6.if.then.4, implicit $eflags @@ -235,10 +235,10 @@ body: | successors: %bb.8.if.then.8(4), %bb.2.for.cond(124) liveins: $eax, $ecx, $edi, $edx, $esi, $r8d - DBG_VALUE debug-use $edi, debug-use _, !9, !17, debug-location !18 - DBG_VALUE debug-use $esi, debug-use _, !10, !17, debug-location !19 - DBG_VALUE debug-use $edx, debug-use _, !11, !17, debug-location !21 - DBG_VALUE debug-use $ecx, debug-use _, !12, !17, debug-location !23 + DBG_VALUE $edi, _, !9, !17, debug-location !18 + DBG_VALUE $esi, _, !10, !17, debug-location !19 + DBG_VALUE $edx, _, !11, !17, debug-location !21 + DBG_VALUE $ecx, _, !12, !17, debug-location !23 DBG_VALUE 0, 0, !13, !17, debug-location !25 TEST32rr $edx, $edx, implicit-def $eflags, debug-location !45 JG_1 %bb.8.if.then.8, implicit $eflags @@ -247,13 +247,13 @@ body: | successors: %bb.3.for.body(124), %bb.9.for.end(4) liveins: $eax, $ecx, $edi, $edx, $esi, $r8d - DBG_VALUE debug-use $edi, debug-use _, !9, !17, debug-location !18 - DBG_VALUE debug-use $esi, debug-use _, !10, !17, debug-location !19 - DBG_VALUE debug-use $edx, debug-use _, !11, !17, debug-location !21 - DBG_VALUE debug-use $ecx, debug-use _, !12, !17, debug-location !23 + DBG_VALUE $edi, _, !9, !17, debug-location !18 + DBG_VALUE $esi, _, !10, !17, debug-location !19 + DBG_VALUE $edx, _, !11, !17, debug-location !21 + DBG_VALUE $ecx, _, !12, !17, debug-location !23 DBG_VALUE 0, 0, !13, !17, debug-location !25 $eax = INC32r killed $eax, implicit-def dead $eflags, debug-location !44 - DBG_VALUE debug-use $eax, debug-use _, !13, !17, debug-location !25 + DBG_VALUE $eax, _, !13, !17, debug-location !25 CMP32rr $eax, $r8d, implicit-def $eflags, debug-location !31 JL_1 %bb.3.for.body, implicit $eflags JMP_1 %bb.9.for.end @@ -261,8 +261,8 @@ body: | bb.4.if.then: liveins: $ecx, $edi - DBG_VALUE debug-use $edi, debug-use _, !9, !17, debug-location !18 - DBG_VALUE debug-use $ecx, debug-use _, !12, !17, debug-location !23 + DBG_VALUE $edi, _, !9, !17, debug-location !18 + DBG_VALUE $ecx, _, !12, !17, debug-location !23 DBG_VALUE 0, 0, !13, !17, debug-location !25 $ecx = IMUL32rr killed $ecx, killed $edi, implicit-def dead $eflags, debug-location !36 DBG_VALUE 0, 0, !13, !17, debug-location !25 @@ -272,8 +272,8 @@ body: | bb.6.if.then.4: liveins: $ecx, $esi - DBG_VALUE debug-use $esi, debug-use _, !10, !17, debug-location !19 - DBG_VALUE debug-use $ecx, debug-use _, !12, !17, debug-location !23 + DBG_VALUE $esi, _, !10, !17, debug-location !19 + DBG_VALUE $ecx, _, !12, !17, debug-location !23 DBG_VALUE 0, 0, !13, !17, debug-location !25 $ecx = IMUL32rr killed $ecx, killed $esi, implicit-def dead $eflags, debug-location !40 DBG_VALUE 0, 0, !13, !17, debug-location !25 @@ -284,8 +284,8 @@ body: | successors: %bb.9.for.end(0) liveins: $ecx, $edx - DBG_VALUE debug-use $edx, debug-use _, !11, !17, debug-location !21 - DBG_VALUE debug-use $ecx, debug-use _, !12, !17, debug-location !23 + DBG_VALUE $edx, _, !11, !17, debug-location !21 + DBG_VALUE $ecx, _, !12, !17, debug-location !23 DBG_VALUE 0, 0, !13, !17, debug-location !25 $ecx = IMUL32rr killed $ecx, killed $edx, implicit-def dead $eflags, debug-location !46 diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir index 3e3d0992ac85..edc2a2624ee9 100644 --- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir +++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir @@ -5,9 +5,9 @@ # to another. The altered instructions are labeled below. # # CHECK: ![[ARG1:.*]] = !DILocalVariable(name: "arg1" -# CHECK: DBG_VALUE debug-use $ebx, debug-use $noreg, ![[ARG1]], !DIExpression(), debug-location +# CHECK: DBG_VALUE $ebx, $noreg, ![[ARG1]], !DIExpression(), debug-location # CHECK: $r12d = MOV32rr killed $ebx, implicit-def $r12 -# CHECK-NEXT: DBG_VALUE debug-use $r12d, debug-use $noreg, ![[ARG1]], !DIExpression(), debug-location +# CHECK-NEXT: DBG_VALUE $r12d, $noreg, ![[ARG1]], !DIExpression(), debug-location --- | ; ModuleID = 'live-debug-values-reg-copy.ll' source_filename = "live-debug-values-reg-copy.c" @@ -148,9 +148,9 @@ body: | CFI_INSTRUCTION def_cfa_offset 32 CFI_INSTRUCTION offset $rbx, -24 CFI_INSTRUCTION offset $rbp, -16 - DBG_VALUE debug-use $edi, debug-use $noreg, !12, !DIExpression(), debug-location !15 + DBG_VALUE $edi, $noreg, !12, !DIExpression(), debug-location !15 $ebx = MOV32rr $edi, implicit-def $rbx - DBG_VALUE debug-use $ebx, debug-use $noreg, !12, !DIExpression(), debug-location !15 + DBG_VALUE $ebx, $noreg, !12, !DIExpression(), debug-location !15 renamable $rdi = LEA64r $rsp, 1, $noreg, 4, $noreg CALL64pcrel32 @init, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit-def $rsp, implicit-def $ssp, debug-location !15 renamable $edi = MOV32rm $rsp, 1, $noreg, 4, $noreg :: (dereferenceable load 4 from %ir.local1, !tbaa !20) diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir index fb83963a4e9e..78a9a01dda79 100644 --- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir +++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir @@ -53,35 +53,35 @@ # # GENERATE: bb.1.if.end: # GENERATE: MOV32mr $rbp, 1, $noreg, -48, $noreg, killed $edx :: (store 4 into %stack.5) -# GENERATE-NEXT: DBG_VALUE debug-use $rbp, 0, ![[INT0]], !DIExpression(DW_OP_constu, 48, DW_OP_minus) +# GENERATE-NEXT: DBG_VALUE $rbp, 0, ![[INT0]], !DIExpression(DW_OP_constu, 48, DW_OP_minus) # GENERATE: MOV32mr $rbp, 1, $noreg, -52, $noreg, killed $r8d :: (store 4 into %stack.4) -# GENERATE-NEXT: DBG_VALUE debug-use $rbp, 0, ![[INTB]], !DIExpression(DW_OP_constu, 52, DW_OP_minus) +# GENERATE-NEXT: DBG_VALUE $rbp, 0, ![[INTB]], !DIExpression(DW_OP_constu, 52, DW_OP_minus) # GENERATE: MOV32mr $rbp, 1, $noreg, -56, $noreg, killed $esi :: (store 4 into %stack.3) -# GENERATE-NEXT: DBG_VALUE debug-use $rbp, 0, ![[INTD]], !DIExpression(DW_OP_constu, 56, DW_OP_minus) +# GENERATE-NEXT: DBG_VALUE $rbp, 0, ![[INTD]], !DIExpression(DW_OP_constu, 56, DW_OP_minus) # # Check that the spill locations that are valid at the end of bb.1.if.end are # propagated to subsequent BBs. # # GENERATE: bb.2.if.then4: # GENERATE-NOT: bb.3: -# GENERATE-DAG: DBG_VALUE debug-use $rbp, 0, ![[INTD]], !DIExpression(DW_OP_constu, 56, DW_OP_minus) -# GENERATE-DAG: DBG_VALUE debug-use $rbp, 0, ![[INTB]], !DIExpression(DW_OP_constu, 52, DW_OP_minus) +# GENERATE-DAG: DBG_VALUE $rbp, 0, ![[INTD]], !DIExpression(DW_OP_constu, 56, DW_OP_minus) +# GENERATE-DAG: DBG_VALUE $rbp, 0, ![[INTB]], !DIExpression(DW_OP_constu, 52, DW_OP_minus) # # GENERATE: bb.3: # GENERATE-NOT: bb.4.if.end13: -# GENERATE-DAG: DBG_VALUE debug-use $rbp, 0, ![[INTD]], !DIExpression(DW_OP_constu, 56, DW_OP_minus) -# GENERATE-DAG: DBG_VALUE debug-use $rbp, 0, ![[INTB]], !DIExpression(DW_OP_constu, 52, DW_OP_minus) +# GENERATE-DAG: DBG_VALUE $rbp, 0, ![[INTD]], !DIExpression(DW_OP_constu, 56, DW_OP_minus) +# GENERATE-DAG: DBG_VALUE $rbp, 0, ![[INTB]], !DIExpression(DW_OP_constu, 52, DW_OP_minus) # # GENERATE: bb.4.if.end13: # GENERATE-NOT: bb.5.cleanup: -# GENERATE-DAG: DBG_VALUE debug-use $rbp, 0, ![[INTD]], !DIExpression(DW_OP_constu, 56, DW_OP_minus) -# GENERATE-DAG: DBG_VALUE debug-use $rbp, 0, ![[INTB]], !DIExpression(DW_OP_constu, 52, DW_OP_minus) +# GENERATE-DAG: DBG_VALUE $rbp, 0, ![[INTD]], !DIExpression(DW_OP_constu, 56, DW_OP_minus) +# GENERATE-DAG: DBG_VALUE $rbp, 0, ![[INTB]], !DIExpression(DW_OP_constu, 52, DW_OP_minus) # # Check that the spill location rbp-48 (the variable int0) is not propagated # because int0 is redefined within the same basic block. # # TERMINATE: bb.2.if.then4: -# TERMINATE-NOT: DBG_VALUE debug-use $rbp, -48, +# TERMINATE-NOT: DBG_VALUE $rbp, -48, --- | ; ModuleID = '' source_filename = "spill1.c" @@ -369,31 +369,31 @@ body: | CFI_INSTRUCTION offset $r13, -40 CFI_INSTRUCTION offset $r14, -32 CFI_INSTRUCTION offset $r15, -24 - DBG_VALUE debug-use $edi, debug-use _, !24, !38, debug-location !39 - DBG_VALUE debug-use $esi, debug-use _, !25, !38, debug-location !40 - DBG_VALUE debug-use $edx, debug-use _, !26, !38, debug-location !41 - DBG_VALUE debug-use $ecx, debug-use _, !27, !38, debug-location !42 - DBG_VALUE debug-use $r8d, debug-use _, !28, !38, debug-location !43 - DBG_VALUE debug-use $r9d, debug-use _, !29, !38, debug-location !44 + DBG_VALUE $edi, _, !24, !38, debug-location !39 + DBG_VALUE $esi, _, !25, !38, debug-location !40 + DBG_VALUE $edx, _, !26, !38, debug-location !41 + DBG_VALUE $ecx, _, !27, !38, debug-location !42 + DBG_VALUE $r8d, _, !28, !38, debug-location !43 + DBG_VALUE $r9d, _, !29, !38, debug-location !44 $r14d = MOV32rr $r8d - DBG_VALUE debug-use $r14d, debug-use _, !28, !38, debug-location !43 + DBG_VALUE $r14d, _, !28, !38, debug-location !43 $r12d = MOV32rr $esi - DBG_VALUE debug-use $r12d, debug-use _, !25, !38, debug-location !40 + DBG_VALUE $r12d, _, !25, !38, debug-location !40 $eax = MOV32rr $edi - DBG_VALUE debug-use $eax, debug-use _, !24, !38, debug-location !39 + DBG_VALUE $eax, _, !24, !38, debug-location !39 $r13d = MOV32rm $rip, 1, _, @glob0, _, debug-location !46 :: (dereferenceable load 4 from @glob0, !tbaa !47) - DBG_VALUE debug-use $r13d, debug-use _, !31, !38, debug-location !51 + DBG_VALUE $r13d, _, !31, !38, debug-location !51 $r8d = MOV32rm $rip, 1, _, @glob1, _, debug-location !52 :: (dereferenceable load 4 from @glob1, !tbaa !47) - DBG_VALUE debug-use $r8d, debug-use _, !32, !38, debug-location !53 + DBG_VALUE $r8d, _, !32, !38, debug-location !53 $r15d = MOV32rm $rip, 1, _, @glob2, _, debug-location !54 :: (dereferenceable load 4 from @glob2, !tbaa !47) - DBG_VALUE debug-use $r15d, debug-use _, !33, !38, debug-location !55 + DBG_VALUE $r15d, _, !33, !38, debug-location !55 $esi = MOV32rm $rip, 1, _, @glob3, _, debug-location !56 :: (dereferenceable load 4 from @glob3, !tbaa !47) - DBG_VALUE debug-use $esi, debug-use _, !34, !38, debug-location !57 + DBG_VALUE $esi, _, !34, !38, debug-location !57 $ebx = MOV32rm $rip, 1, _, @glob4, _, debug-location !59 :: (dereferenceable load 4 from @glob4, !tbaa !47) - DBG_VALUE debug-use $ebx, debug-use _, !35, !38, debug-location !60 + DBG_VALUE $ebx, _, !35, !38, debug-location !60 MOV32mr $rbp, 1, _, -44, _, $ebx, debug-location !60 :: (store 4 into %ir.inte, !tbaa !47) $edi = MOV32rm $rip, 1, _, @glob5, _, debug-location !62 :: (dereferenceable load 4 from @glob5, !tbaa !47) - DBG_VALUE debug-use $edi, debug-use _, !36, !38, debug-location !63 + DBG_VALUE $edi, _, !36, !38, debug-location !63 MOV32mr $rbp, 1, _, -60, _, $edi, debug-location !63 :: (store 4 into %ir.intf, !tbaa !47) TEST32rr killed $eax, $eax, implicit-def $eflags, debug-location !67 JNE_1 %bb.5.cleanup, implicit $eflags @@ -405,11 +405,11 @@ body: | MOV32mr $rbp, 1, _, -48, _, killed $edx :: (store 4 into %stack.5) MOV32mr $rbp, 1, _, -52, _, killed $r8d :: (store 4 into %stack.4) MOV32mr $rbp, 1, _, -56, _, killed $esi :: (store 4 into %stack.3) - DBG_VALUE debug-use _, debug-use _, !30, !38, debug-location !45 + DBG_VALUE _, _, !30, !38, debug-location !45 $r14d = ADD32rr killed $r14d, killed $ecx, implicit-def dead $eflags, debug-location !68 $r14d = ADD32rr killed $r14d, killed $r9d, implicit-def dead $eflags, debug-location !69 $r14d = IMUL32rm killed $r14d, $rbp, 1, _, 16, _, implicit-def dead $eflags, debug-location !70 :: (load 4 from %fixed-stack.6, align 16) - DBG_VALUE debug-use $r14d, debug-use _, !26, !38, debug-location !41 + DBG_VALUE $r14d, _, !26, !38, debug-location !41 CALL64pcrel32 @use, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp, debug-location !72 $edi = MOV32rr killed $ebx, debug-location !73 CALL64pcrel32 @use, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp, debug-location !73 @@ -421,21 +421,21 @@ body: | liveins: $r14d, $r15d, $rbp $rdi = LEA64r $rbp, 1, _, -44, _ - DBG_VALUE debug-use $rbp, -44, !35, !38, debug-location !60 + DBG_VALUE $rbp, -44, !35, !38, debug-location !60 $rsi = LEA64r $rbp, 1, _, -60, _ - DBG_VALUE debug-use $rbp, -60, !36, !38, debug-location !63 + DBG_VALUE $rbp, -60, !36, !38, debug-location !63 $rdx = LEA64r $rbp, 1, _, -64, _ - DBG_VALUE debug-use $rbp, -64, !37, !38, debug-location !78 + DBG_VALUE $rbp, -64, !37, !38, debug-location !78 CALL64pcrel32 @set, csr_64, implicit $rsp, implicit $rdi, implicit $rsi, implicit $rdx, implicit-def $rsp, debug-location !79 $eax = MOV32rm $rbp, 1, _, -44, _, debug-location !81 :: (dereferenceable load 4 from %ir.inte, !tbaa !47) - DBG_VALUE debug-use $eax, debug-use _, !35, !38, debug-location !60 + DBG_VALUE $eax, _, !35, !38, debug-location !60 $r15d = ADD32rm killed $r15d, $rbp, 1, _, -52, _, implicit-def dead $eflags, debug-location !82 :: (load 4 from %stack.4) $r15d = IMUL32rr killed $r15d, $eax, implicit-def dead $eflags, debug-location !82 $r15d = ADD32rm killed $r15d, $rbp, 1, _, -56, _, implicit-def dead $eflags, debug-location !83 :: (load 4 from %stack.3) $r15d = IMUL32rr killed $r15d, killed $eax, implicit-def dead $eflags, debug-location !84 - DBG_VALUE debug-use $r15d, debug-use _, !31, !38, debug-location !51 + DBG_VALUE $r15d, _, !31, !38, debug-location !51 $r13d = MOV32rr killed $r15d - DBG_VALUE debug-use $r13d, debug-use _, !31, !38, debug-location !51 + DBG_VALUE $r13d, _, !31, !38, debug-location !51 JMP_1 %bb.4.if.end13 bb.2: @@ -443,17 +443,17 @@ body: | liveins: $r13d, $r14d, $rbp $r14d = ADD32rm killed $r14d, $rbp, 1, _, -48, _, implicit-def dead $eflags, debug-location !71 :: (load 4 from %stack.5) - DBG_VALUE debug-use $r14d, debug-use _, !26, !38, debug-location !41 + DBG_VALUE $r14d, _, !26, !38, debug-location !41 bb.4.if.end13: successors: %bb.5.cleanup(0x80000000) liveins: $r13d, $r14d, $rbp - DBG_VALUE debug-use $r14d, debug-use _, !26, !38, debug-location !41 - DBG_VALUE debug-use $r13d, debug-use _, !31, !38, debug-location !51 + DBG_VALUE $r14d, _, !26, !38, debug-location !41 + DBG_VALUE $r13d, _, !31, !38, debug-location !51 $r13d = IMUL32rm killed $r13d, $rbp, 1, _, 16, _, implicit-def dead $eflags, debug-location !86 :: (load 4 from %fixed-stack.6, align 16) $r13d = ADD32rr killed $r13d, killed $r14d, implicit-def dead $eflags, debug-location !87 - DBG_VALUE debug-use $r13d, debug-use _, !26, !38, debug-location !41 + DBG_VALUE $r13d, _, !26, !38, debug-location !41 $edi = MOV32rr killed $r13d, debug-location !88 CALL64pcrel32 @use, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp, debug-location !88 diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir index c3558aaed311..5245285da5e3 100644 --- a/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir +++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir @@ -35,7 +35,7 @@ # CHECK: ![[N_VAR:[0-9]+]] = !DILocalVariable(name: "n",{{.*}}) # # CHECK: bb.5.if.end.7: -# CHECK: DBG_VALUE debug-use $ebx, debug-use $noreg, ![[N_VAR]], !DIExpression(), debug-location !{{[0-9]+}} +# CHECK: DBG_VALUE $ebx, $noreg, ![[N_VAR]], !DIExpression(), debug-location !{{[0-9]+}} --- | @@ -193,10 +193,10 @@ body: | frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp CFI_INSTRUCTION def_cfa_offset 16 CFI_INSTRUCTION offset $rbx, -16 - DBG_VALUE debug-use $edi, debug-use _, !12, !20, debug-location !21 - DBG_VALUE debug-use $rsi, debug-use _, !13, !20, debug-location !22 + DBG_VALUE $edi, _, !12, !20, debug-location !21 + DBG_VALUE $rsi, _, !13, !20, debug-location !22 $eax = MOV32rr $edi - DBG_VALUE debug-use $eax, debug-use _, !12, !20, debug-location !21 + DBG_VALUE $eax, _, !12, !20, debug-location !21 $edi = MOV32ri 2 CMP32ri8 killed $eax, 2, implicit-def $eflags, debug-location !26 JNE_1 %bb.2.if.end, implicit $eflags @@ -205,12 +205,12 @@ body: | successors: %bb.2.if.end(0) liveins: $rsi - DBG_VALUE debug-use $rsi, debug-use _, !13, !20, debug-location !22 + DBG_VALUE $rsi, _, !13, !20, debug-location !22 $rdi = MOV64rm killed $rsi, 1, _, 8, _, debug-location !27 :: (load 8 from %ir.arrayidx, !tbaa !28) dead $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, implicit-def $al, debug-location !32 CALL64pcrel32 @atoi, csr_64, implicit $rsp, implicit $rdi, implicit $al, implicit-def $rsp, implicit-def $eax, debug-location !32 $edi = MOV32rr $eax, debug-location !32 - DBG_VALUE debug-use $edi, debug-use _, !14, !20, debug-location !33 + DBG_VALUE $edi, _, !14, !20, debug-location !33 bb.2.if.end: successors: %bb.3.if.then.3(16), %bb.4.if.else.5(16) @@ -218,7 +218,7 @@ body: | CALL64pcrel32 @change, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp, implicit-def $eax, debug-location !34 $ebx = MOV32rr $eax, debug-location !34 - DBG_VALUE debug-use $ebx, debug-use _, !14, !20, debug-location !33 + DBG_VALUE $ebx, _, !14, !20, debug-location !33 CMP32ri8 $ebx, 11, implicit-def $eflags, debug-location !37 JL_1 %bb.4.if.else.5, implicit killed $eflags, debug-location !37 @@ -226,7 +226,7 @@ body: | successors: %bb.5.if.end.7(0) liveins: $ebx - DBG_VALUE debug-use $ebx, debug-use _, !14, !20, debug-location !33 + DBG_VALUE $ebx, _, !14, !20, debug-location !33 $edi = MOV32rr $ebx, debug-location !38 CALL64pcrel32 @modify, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp, implicit-def $eax, debug-location !38 $ecx = MOV32rr $eax, debug-location !38 @@ -237,7 +237,7 @@ body: | successors: %bb.5.if.end.7(0) liveins: $ebx - DBG_VALUE debug-use $ebx, debug-use _, !14, !20, debug-location !33 + DBG_VALUE $ebx, _, !14, !20, debug-location !33 $edi = MOV32rr killed $ebx, debug-location !42 CALL64pcrel32 @inc, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp, implicit-def $eax, debug-location !42 $ecx = MOV32rr $eax, debug-location !42 diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir index f8d3603b79d9..4a2f96c5d5ee 100644 --- a/llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir +++ b/llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir @@ -130,12 +130,12 @@ stack: constants: body: | bb.0.entry: - DBG_VALUE debug-use $edi, debug-use _, !21, !DIExpression(), debug-location !25 - DBG_VALUE debug-use $rsi, debug-use _, !22, !DIExpression(), debug-location !26 + DBG_VALUE $edi, _, !21, !DIExpression(), debug-location !25 + DBG_VALUE $rsi, _, !22, !DIExpression(), debug-location !26 %2 = MOV32rm $rip, 1, _, @bar, _, debug-location !27 :: (dereferenceable load 4 from `i32* getelementptr inbounds ([2 x i32], [2 x i32]* @bar, i64 0, i64 0)`, !tbaa !28) - DBG_VALUE debug-use %2, debug-use _, !23, !DIExpression(), debug-location !32 + DBG_VALUE %2, _, !23, !DIExpression(), debug-location !32 %3 = MOV32rm $rip, 1, _, @bar + 4, _, debug-location !33 :: (dereferenceable load 4 from `i32* getelementptr inbounds ([2 x i32], [2 x i32]* @bar, i64 0, i64 1)`, !tbaa !28) - DBG_VALUE debug-use %3, debug-use _, !24, !DIExpression(), debug-location !34 + DBG_VALUE %3, _, !24, !DIExpression(), debug-location !34 ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !35 $edi = COPY %2, debug-location !35 $esi = COPY %3, debug-location !35 @@ -153,11 +153,11 @@ body: | # not cover the whole BB. # # CHECKDBG-LABEL: ********** EMITTING LIVE DEBUG VARIABLES ********** -# CHECKDBG-NEXT: !"argc,5" [0B;0e):0 Loc0=debug-use $edi +# CHECKDBG-NEXT: !"argc,5" [0B;0e):0 Loc0=$edi # CHECKDBG-NEXT: [0B;0e):0 %bb.0-160B -# CHECKDBG-NEXT: !"argv,5" [0B;0e):0 Loc0=debug-use $rsi +# CHECKDBG-NEXT: !"argv,5" [0B;0e):0 Loc0=$rsi # CHECKDBG-NEXT: [0B;0e):0 %bb.0-160B -# CHECKDBG-NEXT: !"a0,7" [16r;64r):0 Loc0=debug-use %2 +# CHECKDBG-NEXT: !"a0,7" [16r;64r):0 Loc0=%2 # CHECKDBG-NEXT: [16r;64r):0 %bb.0-160B -# CHECKDBG-NEXT: !"a1,8" [32r;80r):0 Loc0=debug-use %3 +# CHECKDBG-NEXT: !"a1,8" [32r;80r):0 Loc0=%3 # CHECKDBG-NEXT: [32r;80r):0 %bb.0-160B diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg.mir index 430dbb742d43..ac0d519ddfef 100644 --- a/llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg.mir +++ b/llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg.mir @@ -128,12 +128,12 @@ stack: constants: body: | bb.0.entry: - DBG_VALUE debug-use $edi, debug-use _, !21, !DIExpression(), debug-location !25 - DBG_VALUE debug-use $rsi, debug-use _, !22, !DIExpression(), debug-location !26 + DBG_VALUE $edi, _, !21, !DIExpression(), debug-location !25 + DBG_VALUE $rsi, _, !22, !DIExpression(), debug-location !26 %2 = MOV32rm $rip, 1, _, @bar, _, debug-location !27 :: (dereferenceable load 4 from `i32* getelementptr inbounds ([2 x i32], [2 x i32]* @bar, i64 0, i64 0)`, !tbaa !28) - DBG_VALUE debug-use %2, debug-use _, !23, !DIExpression(), debug-location !32 + DBG_VALUE %2, _, !23, !DIExpression(), debug-location !32 %3 = MOV32rm $rip, 1, _, @bar + 4, _, debug-location !33 :: (dereferenceable load 4 from `i32* getelementptr inbounds ([2 x i32], [2 x i32]* @bar, i64 0, i64 1)`, !tbaa !28) - DBG_VALUE debug-use %3, debug-use _, !24, !DIExpression(), debug-location !34 + DBG_VALUE %3, _, !24, !DIExpression(), debug-location !34 ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !35 $edi = COPY %2, debug-location !35 $esi = COPY %3, debug-location !35 @@ -150,9 +150,9 @@ body: | # CHECKMIR: ![[ARGV:[0-9]+]] = !DILocalVariable(name: "argv", arg: 2 # CHECKMIR: name: main # CHECKMIR: body: -# CHECKMIR: DBG_VALUE debug-use $edi, debug-use $noreg, ![[ARGC]] -# CHECKMIR-NOT: DBG_VALUE debug-use %{{.*}}, debug-use $noreg, ![[ARGC]] -# CHECKMIR: DBG_VALUE debug-use $rsi, debug-use $noreg, ![[ARGV]] -# CHECKMIR-NOT: DBG_VALUE debug-use %{{.*}}, debug-use $noreg, ![[ARGC]] -# CHECKMIR-NOT: DBG_VALUE debug-use %{{.*}}, debug-use $noreg, ![[ARGV]] +# CHECKMIR: DBG_VALUE $edi, $noreg, ![[ARGC]] +# CHECKMIR-NOT: DBG_VALUE %{{.*}}, $noreg, ![[ARGC]] +# CHECKMIR: DBG_VALUE $rsi, $noreg, ![[ARGV]] +# CHECKMIR-NOT: DBG_VALUE %{{.*}}, $noreg, ![[ARGC]] +# CHECKMIR-NOT: DBG_VALUE %{{.*}}, $noreg, ![[ARGV]] diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir index 6c78a76a3282..509d16a736cb 100644 --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir @@ -25,13 +25,13 @@ ; CHECK: ![[CS3]] = distinct !DILocation(line: 8, column: 3, scope: !{{[0-9]+}}) ; ; CHECK: bb.1.if.then: - ; CHECK: DBG_VALUE debug-use $ebx, debug-use $noreg, ![[I_VAR]], !DIExpression(), debug-location ![[I_LOC]] - ; CHECK-NOT: DBG_VALUE debug-use $ebx, debug-use $noreg, ![[A_VAR]], !DIExpression(), debug-location - ; CHECK: DBG_VALUE debug-use $ebx, debug-use $noreg, ![[A_VAR]], !DIExpression(), debug-location ![[INLCS2]] + ; CHECK: DBG_VALUE $ebx, $noreg, ![[I_VAR]], !DIExpression(), debug-location ![[I_LOC]] + ; CHECK-NOT: DBG_VALUE $ebx, $noreg, ![[A_VAR]], !DIExpression(), debug-location + ; CHECK: DBG_VALUE $ebx, $noreg, ![[A_VAR]], !DIExpression(), debug-location ![[INLCS2]] ; CHECK: bb.2.if.end: - ; CHECK: DBG_VALUE debug-use $ebx, debug-use $noreg, ![[I_VAR]], !DIExpression(), debug-location ![[I_LOC]] - ; CHECK-NOT: DBG_VALUE debug-use $ebx, debug-use $noreg, ![[A_VAR]], !DIExpression(), debug-location - ; CHECK: DBG_VALUE debug-use $ebx, debug-use $noreg, ![[A_VAR]], !DIExpression(), debug-location ![[INLCS3]] + ; CHECK: DBG_VALUE $ebx, $noreg, ![[I_VAR]], !DIExpression(), debug-location ![[I_LOC]] + ; CHECK-NOT: DBG_VALUE $ebx, $noreg, ![[A_VAR]], !DIExpression(), debug-location + ; CHECK: DBG_VALUE $ebx, $noreg, ![[A_VAR]], !DIExpression(), debug-location ![[INLCS3]] ; ; ModuleID = 'livedebugvalues-limit.ll' source_filename = "livedebugvalues-limit.c" @@ -159,7 +159,7 @@ body: | CFI_INSTRUCTION offset $rbp, -16 $rbp = frame-setup MOV64rr $rsp CFI_INSTRUCTION def_cfa_register $rbp - DBG_VALUE debug-use $edi, debug-use _, !12, !13, debug-location !14 + DBG_VALUE $edi, _, !12, !13, debug-location !14 $rbp = POP64r implicit-def $rsp, implicit $rsp, debug-location !15 TAILJMPd64 @sink, csr_64, implicit $rsp, implicit $rsp, implicit $edi, debug-location !15 @@ -208,10 +208,10 @@ body: | frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp frame-setup PUSH64r undef $rax, implicit-def $rsp, implicit $rsp CFI_INSTRUCTION offset $rbx, -24 - DBG_VALUE debug-use $edi, debug-use _, !19, !13, debug-location !20 + DBG_VALUE $edi, _, !19, !13, debug-location !20 $ebx = MOV32rr $edi - DBG_VALUE debug-use $ebx, debug-use _, !12, !13, debug-location !21 - DBG_VALUE debug-use $ebx, debug-use _, !19, !13, debug-location !20 + DBG_VALUE $ebx, _, !12, !13, debug-location !21 + DBG_VALUE $ebx, _, !19, !13, debug-location !20 CALL64pcrel32 @sink, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp, debug-location !23 TEST32rr $ebx, $ebx, implicit-def $eflags, debug-location !24 JE_1 %bb.2.if.end, implicit $eflags @@ -220,18 +220,18 @@ body: | successors: %bb.2.if.end liveins: $ebx, $rbp - DBG_VALUE debug-use $ebx, debug-use _, !19, !13, debug-location !20 - DBG_VALUE debug-use $ebx, debug-use _, !12, !13, debug-location !27 + DBG_VALUE $ebx, _, !19, !13, debug-location !20 + DBG_VALUE $ebx, _, !12, !13, debug-location !27 $edi = MOV32rr $ebx, debug-location !29 CALL64pcrel32 @sink, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp, debug-location !29 bb.2.if.end: liveins: $ebx, $rbp - DBG_VALUE debug-use $ebx, debug-use _, !19, !13, debug-location !20 + DBG_VALUE $ebx, _, !19, !13, debug-location !20 $edi = MOV32rr killed $ebx, debug-location !33 $rsp = ADD64ri8 $rsp, 8, implicit-def dead $eflags, debug-location !33 - DBG_VALUE debug-use $ebx, debug-use _, !12, !13, debug-location !31 + DBG_VALUE $ebx, _, !12, !13, debug-location !31 $rbx = POP64r implicit-def $rsp, implicit $rsp, debug-location !33 $rbp = POP64r implicit-def $rsp, implicit $rsp, debug-location !33 TAILJMPd64 @sink, csr_64, implicit $rsp, implicit $rsp, implicit $edi, debug-location !33 diff --git a/llvm/test/DebugInfo/MIR/X86/mlicm-hoist.mir b/llvm/test/DebugInfo/MIR/X86/mlicm-hoist.mir index 2c2f4edad4f6..0797e89d2c61 100644 --- a/llvm/test/DebugInfo/MIR/X86/mlicm-hoist.mir +++ b/llvm/test/DebugInfo/MIR/X86/mlicm-hoist.mir @@ -122,17 +122,17 @@ body: | successors: %bb.1.while.body(0x80000000) liveins: $rdi - DBG_VALUE debug-use $rdi, debug-use _, !16, !17, debug-location !18 + DBG_VALUE $rdi, _, !16, !17, debug-location !18 %2 = COPY $rdi - DBG_VALUE debug-use %2, debug-use _, !16, !17, debug-location !18 + DBG_VALUE %2, _, !16, !17, debug-location !18 bb.1.while.body: successors: %bb.1.while.body(0x80000000) %0 = PHI %2, %bb.0.entry, %1, %bb.1.while.body - DBG_VALUE debug-use %0, debug-use _, !16, !17, debug-location !18 + DBG_VALUE %0, _, !16, !17, debug-location !18 %1 = ADD64ri8 %0, 4, implicit-def dead $eflags, debug-location !20 - DBG_VALUE debug-use %1, debug-use _, !16, !17, debug-location !18 + DBG_VALUE %1, _, !16, !17, debug-location !18 %3 = MOV32rm %0, 1, _, 0, _, debug-location !21 :: (load 4 from %ir.p.addr.0, !tbaa !22) %4 = MOV64rm $rip, 1, _, target-flags(x86-gotpcrel) @x, _, debug-location !26 :: (load 8 from got) MOV32mr killed %4, 1, _, 0, _, killed %3, debug-location !26 :: (store 4 into @x, !tbaa !22) diff --git a/llvm/test/DebugInfo/MIR/X86/regcoalescer.mir b/llvm/test/DebugInfo/MIR/X86/regcoalescer.mir index 4136d5ebe635..8601893cdc7d 100644 --- a/llvm/test/DebugInfo/MIR/X86/regcoalescer.mir +++ b/llvm/test/DebugInfo/MIR/X86/regcoalescer.mir @@ -40,11 +40,11 @@ registers: body: | bb.0.entry: %0 = MOV32r0 implicit-def dead $eflags, debug-location !19 - DBG_VALUE debug-use %0, debug-use _, !18, !DIExpression(), debug-location !20 + DBG_VALUE %0, _, !18, !DIExpression(), debug-location !20 $eax = COPY killed %0, debug-location !21 RET 0, killed $eax, debug-location !21 ... # CHECK: $eax = MOV32r0 -# CHECK-NEXT: DBG_VALUE debug-use $eax +# CHECK-NEXT: DBG_VALUE $eax diff --git a/llvm/test/DebugInfo/MSP430/sdagsplit-1.ll b/llvm/test/DebugInfo/MSP430/sdagsplit-1.ll index 7f2356a083fe..9e77e950f837 100644 --- a/llvm/test/DebugInfo/MSP430/sdagsplit-1.ll +++ b/llvm/test/DebugInfo/MSP430/sdagsplit-1.ll @@ -13,10 +13,10 @@ ; return 0; ; } ; -; CHECK-DAG: DBG_VALUE debug-use $r{{[0-9]+}}, debug-use $noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 32, 16), debug-location !{{[0-9]+}} -; CHECK-DAG: DBG_VALUE debug-use $r{{[0-9]+}}, debug-use $noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 48, 16), debug-location !{{[0-9]+}} -; CHECK-DAG: DBG_VALUE debug-use $r{{[0-9]+}}, debug-use $noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 0, 16), debug-location !{{[0-9]+}} -; CHECK-DAG: DBG_VALUE debug-use $r{{[0-9]+}}, debug-use $noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 16, 16), debug-location !{{[0-9]+}} +; CHECK-DAG: DBG_VALUE $r{{[0-9]+}}, $noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 32, 16), debug-location !{{[0-9]+}} +; CHECK-DAG: DBG_VALUE $r{{[0-9]+}}, $noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 48, 16), debug-location !{{[0-9]+}} +; CHECK-DAG: DBG_VALUE $r{{[0-9]+}}, $noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 0, 16), debug-location !{{[0-9]+}} +; CHECK-DAG: DBG_VALUE $r{{[0-9]+}}, $noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 16, 16), debug-location !{{[0-9]+}} ; ModuleID = 'sdagsplit-1.c' target datalayout = "e-m:e-p:16:16-i32:16-i64:16-f32:16-f64:16-a:8-n8:16-S16" diff --git a/llvm/test/DebugInfo/WebAssembly/dbg-value-live-interval.ll b/llvm/test/DebugInfo/WebAssembly/dbg-value-live-interval.ll index b79ef23fc96e..1754d2a7a21c 100644 --- a/llvm/test/DebugInfo/WebAssembly/dbg-value-live-interval.ll +++ b/llvm/test/DebugInfo/WebAssembly/dbg-value-live-interval.ll @@ -3,7 +3,7 @@ ; CHECK: After WebAssembly Optimize Live Intervals: ; CHECK: bb.3.for.body.for.body_crit_edge: ; CHECK: [[REG:%[0-9]+]]:i32 = nsw ADD_I32 {{.*}} fib.c:7:7 -; CHECK: DBG_VALUE debug-use [[REG]]:i32, debug-use $noreg, !"a", {{.*}} fib.c:5:13 +; CHECK: DBG_VALUE [[REG]]:i32, $noreg, !"a", {{.*}} fib.c:5:13 ; CHECK: After WebAssembly Store Results: ; ModuleID = 'fib.bc' diff --git a/llvm/test/DebugInfo/WebAssembly/dbg-value-move-2.ll b/llvm/test/DebugInfo/WebAssembly/dbg-value-move-2.ll index 30a87d1f3cd7..90e8b66609bf 100644 --- a/llvm/test/DebugInfo/WebAssembly/dbg-value-move-2.ll +++ b/llvm/test/DebugInfo/WebAssembly/dbg-value-move-2.ll @@ -3,7 +3,7 @@ ; CHECK: After WebAssembly Register Stackify: ; CHECK: bb.2.for.body: ; CHECK: [[REG:%[0-9]+]]:i32 = TEE_I32 {{.*}} fib2.c:6:7 -; CHECK-NEXT: DBG_VALUE debug-use [[REG]]:i32, debug-use $noreg, !"a", {{.*}} fib2.c:2:13 +; CHECK-NEXT: DBG_VALUE [[REG]]:i32, $noreg, !"a", {{.*}} fib2.c:2:13 ; CHECK: After WebAssembly Register Coloring: ; ModuleID = 'fib2.bc' diff --git a/llvm/test/DebugInfo/WebAssembly/dbg-value-move.ll b/llvm/test/DebugInfo/WebAssembly/dbg-value-move.ll index 7644b97a7b77..8514f3dcaa74 100644 --- a/llvm/test/DebugInfo/WebAssembly/dbg-value-move.ll +++ b/llvm/test/DebugInfo/WebAssembly/dbg-value-move.ll @@ -3,7 +3,7 @@ ; CHECK: After WebAssembly Register Stackify: ; CHECK: bb.3.for.body.for.body_crit_edge: ; CHECK: [[REG:%[0-9]+]]:i32 = nsw ADD_I32 {{.*}} fib.c:7:7 -; CHECK-NEXT: DBG_VALUE debug-use [[REG]]:i32, debug-use $noreg, !"a", {{.*}} fib.c:5:13 +; CHECK-NEXT: DBG_VALUE [[REG]]:i32, $noreg, !"a", {{.*}} fib.c:5:13 ; CHECK: After WebAssembly Register Coloring: ; ModuleID = 'fib.bc' diff --git a/llvm/test/DebugInfo/X86/bbjoin.ll b/llvm/test/DebugInfo/X86/bbjoin.ll index b3f20a9b8e36..c175108f3842 100644 --- a/llvm/test/DebugInfo/X86/bbjoin.ll +++ b/llvm/test/DebugInfo/X86/bbjoin.ll @@ -11,12 +11,12 @@ ; } ; CHECK: ![[X:.*]] = !DILocalVariable(name: "x", ; CHECK: bb.0.entry: -; CHECK: DBG_VALUE 23, debug-use $noreg, ![[X]], -; CHECK: DBG_VALUE debug-use $rsp, debug-use $noreg, ![[X]], !DIExpression(DW_OP_plus_uconst, 4, DW_OP_deref), +; CHECK: DBG_VALUE 23, $noreg, ![[X]], +; CHECK: DBG_VALUE $rsp, $noreg, ![[X]], !DIExpression(DW_OP_plus_uconst, 4, DW_OP_deref), ; CHECK: bb.1.if.then: -; CHECK: DBG_VALUE 43, debug-use $noreg, ![[X]], +; CHECK: DBG_VALUE 43, $noreg, ![[X]], ; CHECK: bb.2.if.end: -; CHECK-NOT: DBG_VALUE 23, debug-use $noreg, ![[X]], +; CHECK-NOT: DBG_VALUE 23, $noreg, ![[X]], ; CHECK: RETQ $eax target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" diff --git a/llvm/test/DebugInfo/X86/live-debug-vars-discard-invalid.mir b/llvm/test/DebugInfo/X86/live-debug-vars-discard-invalid.mir index f9a81cb156a7..92fc740b77ea 100644 --- a/llvm/test/DebugInfo/X86/live-debug-vars-discard-invalid.mir +++ b/llvm/test/DebugInfo/X86/live-debug-vars-discard-invalid.mir @@ -65,7 +65,7 @@ body: | bb.1: ; This DBG_VALUE will be discarded (use before def of %0). - DBG_VALUE debug-use %0, debug-use $noreg, !18, !DIExpression(), debug-location !25 + DBG_VALUE %0, $noreg, !18, !DIExpression(), debug-location !25 %0:gr64 = IMPLICIT_DEF %0:gr64 = IMPLICIT_DEF %0:gr64 = IMPLICIT_DEF @@ -73,32 +73,32 @@ body: | bb.2: ; This DBG_VALUE will be discarded (%1 is defined earlier, but it is not live in, so we do not know where %1 is stored). - DBG_VALUE debug-use %1, debug-use $noreg, !18, !DIExpression(), debug-location !25 + DBG_VALUE %1, $noreg, !18, !DIExpression(), debug-location !25 %1:gr64 = IMPLICIT_DEF %1:gr64 = IMPLICIT_DEF %1:gr64 = IMPLICIT_DEF %1:gr64 = IMPLICIT_DEF ; This DBG_VALUE is kept, even if %1 is dead, it was defined in the prev instruction, ; so the value should be available for as long as the register allocated to %1 is live. - DBG_VALUE debug-use %1, debug-use $noreg, !18, !DIExpression(), debug-location !25 + DBG_VALUE %1, $noreg, !18, !DIExpression(), debug-location !25 bb.3: %1:gr64 = IMPLICIT_DEF - DBG_VALUE 0, debug-use $noreg, !23, !DIExpression(), debug-location !25 + DBG_VALUE 0, $noreg, !23, !DIExpression(), debug-location !25 ; This DBG_VALUE is kept, even if %1 is dead, it was defined in the prev non-dbg instruction, ; so the value should be available for as long as the register allocated to %1 is live. - DBG_VALUE debug-use %1, debug-use $noreg, !18, !DIExpression(), debug-location !25 + DBG_VALUE %1, $noreg, !18, !DIExpression(), debug-location !25 bb.4: ; All DBG_VALUEs here should survive. %2 is livein as it was defined in bb.0, and it has use/def in the BTS64rr instruction. - DBG_VALUE debug-use %2, debug-use $noreg, !18, !DIExpression(), debug-location !25 + DBG_VALUE %2, $noreg, !18, !DIExpression(), debug-location !25 %2:gr64 = BTS64rr %2, 0, implicit-def $eflags - DBG_VALUE 0, debug-use $noreg, !23, !DIExpression(), debug-location !25 - DBG_VALUE debug-use %2, debug-use $noreg, !18, !DIExpression(), debug-location !25 + DBG_VALUE 0, $noreg, !23, !DIExpression(), debug-location !25 + DBG_VALUE %2, $noreg, !18, !DIExpression(), debug-location !25 %2:gr64 = BTS64rr %2, 0, implicit-def $eflags - DBG_VALUE debug-use %2, debug-use $noreg, !18, !DIExpression(), debug-location !25 + DBG_VALUE %2, $noreg, !18, !DIExpression(), debug-location !25 %2:gr64 = BTS64rr %2, 0, implicit-def $eflags - DBG_VALUE debug-use %2, debug-use $noreg, !18, !DIExpression(), debug-location !25 + DBG_VALUE %2, $noreg, !18, !DIExpression(), debug-location !25 bb.5: RET 0, debug-location !32 @@ -107,29 +107,29 @@ body: | # CHECK-LABEL: name: foobar # CHECK-LABEL: bb.1: -# CHECK: DBG_VALUE debug-use $noreg +# CHECK: DBG_VALUE $noreg # CHECK-LABEL: bb.2: -# CHECK: DBG_VALUE debug-use $noreg +# CHECK: DBG_VALUE $noreg # CHECK-NEXT: dead renamable $rcx = IMPLICIT_DEF # CHECK-NEXT: dead renamable $rcx = IMPLICIT_DEF # CHECK-NEXT: dead renamable $rcx = IMPLICIT_DEF # CHECK-NEXT: dead renamable $rcx = IMPLICIT_DEF -# CHECK-NEXT: DBG_VALUE debug-use $rcx, debug-use $noreg, !18, !DIExpression() +# CHECK-NEXT: DBG_VALUE $rcx, $noreg, !18, !DIExpression() # CHECK-LABEL: bb.3: # CHECK: dead renamable $rcx = IMPLICIT_DEF -# CHECK-NEXT: DBG_VALUE 0, debug-use $noreg, !23, !DIExpression() -# CHECK-NEXT: DBG_VALUE debug-use $rcx, debug-use $noreg, !18, !DIExpression() +# CHECK-NEXT: DBG_VALUE 0, $noreg, !23, !DIExpression() +# CHECK-NEXT: DBG_VALUE $rcx, $noreg, !18, !DIExpression() # CHECK-LABEL: bb.4: # CHECK: liveins: $rax -# CHECK: DBG_VALUE debug-use $rax, debug-use $noreg, !18, !DIExpression() +# CHECK: DBG_VALUE $rax, $noreg, !18, !DIExpression() # CHECK-NEXT: renamable $rax = BTS64rr killed renamable $rax, 0, implicit-def $eflags -# CHECK-NEXT: DBG_VALUE 0, debug-use $noreg, !23, !DIExpression() -# CHECK-NEXT: DBG_VALUE debug-use $rax, debug-use $noreg, !18, !DIExpression() +# CHECK-NEXT: DBG_VALUE 0, $noreg, !23, !DIExpression() +# CHECK-NEXT: DBG_VALUE $rax, $noreg, !18, !DIExpression() # CHECK-NEXT: renamable $rax = BTS64rr killed renamable $rax, 0, implicit-def $eflags -# CHECK-NEXT: DBG_VALUE debug-use $rax, debug-use $noreg, !18, !DIExpression() +# CHECK-NEXT: DBG_VALUE $rax, $noreg, !18, !DIExpression() # CHECK-NEXT: dead renamable $rax = BTS64rr killed renamable $rax, 0, implicit-def $eflags # CHECK-LABEL: bb.5: diff --git a/llvm/test/DebugInfo/X86/live-debug-vars-dse.mir b/llvm/test/DebugInfo/X86/live-debug-vars-dse.mir index bf6c71fa0ff7..3a82c9d377b6 100644 --- a/llvm/test/DebugInfo/X86/live-debug-vars-dse.mir +++ b/llvm/test/DebugInfo/X86/live-debug-vars-dse.mir @@ -134,7 +134,7 @@ body: | $rcx = COPY %1, debug-location !15 CALL64pcrel32 @escape, csr_win64, implicit $rsp, implicit $ssp, implicit $rcx, implicit-def $rsp, implicit-def $ssp, debug-location !15 ADJCALLSTACKUP64 32, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !15 - DBG_VALUE 1, debug-use _, !13, !DIExpression(), debug-location !16 + DBG_VALUE 1, _, !13, !DIExpression(), debug-location !16 MOV32mi $rip, 1, _, @global, _, 1, debug-location !17 :: (store 4 into @global) DBG_VALUE %stack.0.x.addr, 0, !13, !DIExpression(), debug-location !18 MOV32mi %stack.0.x.addr, 1, _, 0, _, 2, debug-location !18 :: (store 4 into %ir.x.addr) diff --git a/llvm/test/DebugInfo/X86/live-debug-vars-index.mir b/llvm/test/DebugInfo/X86/live-debug-vars-index.mir index 1a38a101d642..c4ba49505177 100644 --- a/llvm/test/DebugInfo/X86/live-debug-vars-index.mir +++ b/llvm/test/DebugInfo/X86/live-debug-vars-index.mir @@ -40,14 +40,14 @@ tracksRegLiveness: true body: | bb.0: - DBG_VALUE debug-use $esi, debug-use $noreg, !13, !DIExpression(), debug-location !11 + DBG_VALUE $esi, $noreg, !13, !DIExpression(), debug-location !11 DBG_LABEL !8, debug-location !9 - DBG_VALUE debug-use $edi, debug-use $noreg, !10, !DIExpression(), debug-location !11 + DBG_VALUE $edi, $noreg, !10, !DIExpression(), debug-location !11 RET 0, undef $eax, debug-location !12 ... # CHECK-LABEL: name: foo # CHECK: bb.0: # CHECK-DAG: DBG_LABEL -# CHECK-DAG: DBG_VALUE debug-use $esi -# CHECK-DAG: DBG_VALUE debug-use $edi +# CHECK-DAG: DBG_VALUE $esi +# CHECK-DAG: DBG_VALUE $edi diff --git a/llvm/test/DebugInfo/X86/pr34545.ll b/llvm/test/DebugInfo/X86/pr34545.ll index 8d781157d92a..fe5d2a285f55 100644 --- a/llvm/test/DebugInfo/X86/pr34545.ll +++ b/llvm/test/DebugInfo/X86/pr34545.ll @@ -1,13 +1,13 @@ ; RUN: llc -O1 -filetype=asm -mtriple x86_64-unknown-linux-gnu -mcpu=x86-64 -o - %s -stop-after=livedebugvars | FileCheck %s ; CHECK: $eax = MOV32rm -; CHECK: DBG_VALUE debug-use $eax +; CHECK: DBG_VALUE $eax ; CHECK: $eax = SHL32rCL killed renamable $eax -; CHECK: DBG_VALUE debug-use $eax -; CHECK: DBG_VALUE debug-use $rsp, 0, !{{[0-9]+}}, !DIExpression(DW_OP_constu, 4, DW_OP_minus) -; CHECK: DBG_VALUE debug-use $eax +; CHECK: DBG_VALUE $eax +; CHECK: DBG_VALUE $rsp, 0, !{{[0-9]+}}, !DIExpression(DW_OP_constu, 4, DW_OP_minus) +; CHECK: DBG_VALUE $eax ; CHECK: $eax = SHL32rCL killed renamable $eax -; CHECK: DBG_VALUE debug-use $eax +; CHECK: DBG_VALUE $eax ; CHECK: RETQ $eax target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" diff --git a/llvm/test/DebugInfo/X86/sdag-combine.ll b/llvm/test/DebugInfo/X86/sdag-combine.ll index 3023ce751c03..c95afdb0cf08 100644 --- a/llvm/test/DebugInfo/X86/sdag-combine.ll +++ b/llvm/test/DebugInfo/X86/sdag-combine.ll @@ -15,7 +15,7 @@ define swiftcc void @g() #0 !dbg !5 { entry: %0 = alloca %TSb, align 1 %1 = call swiftcc i1 @f(), !dbg !7 - ; CHECK: DBG_VALUE debug-use $rcx, debug-use $noreg, !8, !DIExpression(), debug-location !7 + ; CHECK: DBG_VALUE $rcx, $noreg, !8, !DIExpression(), debug-location !7 call void @llvm.dbg.value(metadata i1 %1, metadata !8, metadata !DIExpression()), !dbg !7 %2 = getelementptr inbounds %TSb, %TSb* %0, i32 0, i32 0, !dbg !7 store i1 %1, i1* %2, align 1, !dbg !7 diff --git a/llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll b/llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll index 45eff822474f..0266f6108e7a 100644 --- a/llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll +++ b/llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll @@ -62,50 +62,50 @@ target triple = "x86_64-apple-macosx10.4.0" @S = global %struct.SS { i32 23, i32 -17 }, align 4, !dbg !0 -; Verify that the def comes before the debug-use for foo1. +; Verify that the def comes before the for foo1. ; TODO: Currently dbg.value for bar1 is dropped(?), is that expected? define i32 @test1() local_unnamed_addr #0 !dbg !17 { ; CHECK-LABEL: bb.0.entry1 ; CHECK-NEXT: [[REG1:%[0-9]+]]:gr64 = -; CHECK-NEXT: DBG_VALUE debug-use [[REG1]], debug-use $noreg, ![[FOO1]], !DIExpression() +; CHECK-NEXT: DBG_VALUE [[REG1]], $noreg, ![[FOO1]], !DIExpression() entry1: call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !20, metadata !DIExpression()), !dbg !23 call void @llvm.dbg.value(metadata %struct.SS* null, metadata !22, metadata !DIExpression()), !dbg !24 ret i32 ptrtoint (%struct.SS* @S to i32), !dbg !25 } -; Verify that the def comes before the debug-use for foo2 and bar2. +; Verify that the def comes before the for foo2 and bar2. define i32 @test2() local_unnamed_addr #0 !dbg !26 { ; CHECK-LABEL: bb.0.entry2 ; CHECK-NEXT: [[REG2:%[0-9]+]]:gr64 = -; CHECK-NEXT: DBG_VALUE debug-use [[REG2]], debug-use $noreg, ![[FOO2]], !DIExpression() -; CHECK-NEXT: DBG_VALUE debug-use [[REG2]], debug-use $noreg, ![[BAR2]], !DIExpression() +; CHECK-NEXT: DBG_VALUE [[REG2]], $noreg, ![[FOO2]], !DIExpression() +; CHECK-NEXT: DBG_VALUE [[REG2]], $noreg, ![[BAR2]], !DIExpression() entry2: call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !28, metadata !DIExpression()), !dbg !30 call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !29, metadata !DIExpression()), !dbg !31 ret i32 add (i32 ptrtoint (%struct.SS* @S to i32), i32 ptrtoint (%struct.SS* @S to i32)), !dbg !32 } -; Verify that the def comes before the debug-use for foo3 and bar3. +; Verify that the def comes before the for foo3 and bar3. define i32 @test3() local_unnamed_addr #0 !dbg !33 { ; CHECK-LABEL: bb.0.entry3 ; CHECK-NEXT: [[REG3:%[0-9]+]]:gr64 = -; CHECK-NEXT: DBG_VALUE debug-use [[REG3]], debug-use $noreg, ![[BAR3]], !DIExpression() -; CHECK-NEXT: DBG_VALUE debug-use [[REG3]], debug-use $noreg, ![[FOO3]], !DIExpression() +; CHECK-NEXT: DBG_VALUE [[REG3]], $noreg, ![[BAR3]], !DIExpression() +; CHECK-NEXT: DBG_VALUE [[REG3]], $noreg, ![[FOO3]], !DIExpression() entry3: call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !36, metadata !DIExpression()), !dbg !38 call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !35, metadata !DIExpression()), !dbg !37 ret i32 add (i32 ptrtoint (%struct.SS* @S to i32), i32 ptrtoint (%struct.SS* @S to i32)), !dbg !39 } -; Verify that the def comes before the debug-use for bar4. +; Verify that the def comes before the for bar4. ; TODO: Currently dbg.value for foo4 is dropped. It is set to null and not ; used. Just like in test1 it can be discussed if there should be a ; DBG_VALUE for foo4 here. define i32 @test4() local_unnamed_addr #0 !dbg !40 { ; CHECK-LABEL: bb.0.entry4 ; CHECK-NEXT: [[REG4:%[0-9]+]]:gr64 = -; CHECK-NEXT: DBG_VALUE debug-use [[REG4]], debug-use $noreg, ![[BAR4]], !DIExpression() +; CHECK-NEXT: DBG_VALUE [[REG4]], $noreg, ![[BAR4]], !DIExpression() entry4: call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !42, metadata !DIExpression()), !dbg !44 call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !43, metadata !DIExpression()), !dbg !45 @@ -119,8 +119,8 @@ entry4: define i32 @test5() local_unnamed_addr #0 !dbg !47 { ; CHECK-LABEL: bb.0.entry5: ; CHECK-NEXT: [[REG5:%[0-9]+]]:gr64 = -; CHECK-NEXT: DBG_VALUE debug-use [[REG5]], debug-use $noreg, ![[BAR5]], !DIExpression() -; CHECK-NOT: DBG_VALUE debug-use [[REG5]], debug-use $noreg, ![[FOO5]], !DIExpression() +; CHECK-NEXT: DBG_VALUE [[REG5]], $noreg, ![[BAR5]], !DIExpression() +; CHECK-NOT: DBG_VALUE [[REG5]], $noreg, ![[FOO5]], !DIExpression() ; CHECK: RET entry5: call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !49, metadata !DIExpression()), !dbg !51 diff --git a/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-1.ll b/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-1.ll index 1dc51f552491..116e05746f3e 100644 --- a/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-1.ll +++ b/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-1.ll @@ -49,7 +49,7 @@ for.body.lr.ph: ; preds = %entry for.cond.cleanup: ; preds = %for.body, %entry ; CHECK-LABEL: bb.{{.*}}.for.cond.cleanup: ; CHECK: [[REG1:%[0-9]+]]:gr32 = PHI -; CHECK-NEXT: DBG_VALUE debug-use [[REG1]] +; CHECK-NEXT: DBG_VALUE [[REG1]] %x.0.lcssa = phi i32 [ 9, %entry ], [ %add, %for.body ] call void @llvm.dbg.value(metadata i32 %x.0.lcssa, metadata !15, metadata !DIExpression()), !dbg !26 %2 = bitcast [80 x i32]* %arr to i8*, !dbg !37 @@ -63,9 +63,9 @@ for.body: ; preds = %for.body.lr.ph, %fo ; CHECK: [[REG2:%[0-9]+]]:gr32 = PHI ; CHECK-NEXT: [[REG3:%[0-9]+]]:gr32 = PHI ; CHECK-NEXT: [[REG4:%[0-9]+]]:gr32 = PHI -; CHECK-NEXT: DBG_VALUE debug-use [[REG2]] -; CHECK-NEXT: DBG_VALUE debug-use [[REG3]] -; CHECK-NEXT: DBG_VALUE debug-use [[REG4]] +; CHECK-NEXT: DBG_VALUE [[REG2]] +; CHECK-NEXT: DBG_VALUE [[REG3]] +; CHECK-NEXT: DBG_VALUE [[REG4]] %u.023 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ] %y.022 = phi i32 [ 13, %for.body.lr.ph ], [ %mul, %for.body ] %x.021 = phi i32 [ 9, %for.body.lr.ph ], [ %add, %for.body ] diff --git a/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-2.ll b/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-2.ll index 7958dd878f88..6c6a9597b5a6 100644 --- a/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-2.ll +++ b/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-2.ll @@ -28,7 +28,7 @@ for.body.lr.ph: ; preds = %entry for.cond.cleanup: ; preds = %for.body, %entry ; CHECK-LABEL: bb.{{.*}}.for.cond.cleanup: ; CHECK: [[REG1:%[0-9]+]]:gr32 = PHI -; CHECK-NEXT: DBG_VALUE debug-use [[REG1]] +; CHECK-NEXT: DBG_VALUE [[REG1]] %x.0.lcssa = phi i32 [ 9, %entry ], [ %add, %for.body ] call void @llvm.dbg.value(metadata i32 %x.0.lcssa, metadata !15, metadata !DIExpression()), !dbg !26 %2 = bitcast [80 x i32]* %arr to i8*, !dbg !37 @@ -42,16 +42,16 @@ for.body: ; preds = %for.body.lr.ph, %fo ; CHECK: [[REG2:%[0-9]+]]:gr32 = PHI ; CHECK-NEXT: [[REG3:%[0-9]+]]:gr32 = PHI ; CHECK-NEXT: [[REG4:%[0-9]+]]:gr32 = PHI -; CHECK-NEXT: DBG_VALUE debug-use [[REG3]], debug-use $noreg, !16 -; CHECK-NEXT: DBG_VALUE 555, debug-use $noreg, !17 +; CHECK-NEXT: DBG_VALUE [[REG3]], $noreg, !16 +; CHECK-NEXT: DBG_VALUE 555, $noreg, !17 ; XXX: Shouldn't the following DBG_VALUE be placed after the add (ADD32rr). -; CHECK-NEXT: DBG_VALUE debug-use [[REG2]], debug-use $noreg, !17 +; CHECK-NEXT: DBG_VALUE [[REG2]], $noreg, !17 ; CHECK-NEXT: ADD32rr ; XXX: Shouldn't the following DBG_VALUE be placed after the mul (LEA etc). -; CHECK-NEXT: DBG_VALUE 777, debug-use $noreg, !17 +; CHECK-NEXT: DBG_VALUE 777, $noreg, !17 ; CHECK: INC32r ; XXX: Shouldn't the following DBG_VALUE be placed after the icmp (the non-dead implicit def of $eflags) -; CHECK: DBG_VALUE debug-use [[REG4]] +; CHECK: DBG_VALUE [[REG4]] ; CHECK-NEXT: implicit-def $eflags %u.023 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ] %y.022 = phi i32 [ 13, %for.body.lr.ph ], [ %mul, %for.body ] diff --git a/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-3.ll b/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-3.ll index 83fbee5a6129..4aa7243c9e9d 100644 --- a/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-3.ll +++ b/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-3.ll @@ -65,12 +65,12 @@ for.body: ; preds = %for.body.lr.ph, %fo ; CHECK-NEXT: [[REG5:%[0-9]+]]:gr32_nosp = PHI ; CHECK-NEXT: [[REG6:%[0-9]+]]:gr32 = PHI ; CHECK-NEXT: [[REG7:%[0-9]+]]:gr32 = PHI -; CHECK-NEXT: DBG_VALUE debug-use [[REG2]], debug-use $noreg, !19, !DIExpression(DW_OP_LLVM_fragment, 0, 32) -; CHECK-NEXT: DBG_VALUE debug-use [[REG3]], debug-use $noreg, !19, !DIExpression(DW_OP_LLVM_fragment, 32, 32) -; CHECK-NEXT: DBG_VALUE debug-use [[REG4]], debug-use $noreg, !18, !DIExpression(DW_OP_LLVM_fragment, 0, 32) -; CHECK-NEXT: DBG_VALUE debug-use [[REG5]], debug-use $noreg, !18, !DIExpression(DW_OP_LLVM_fragment, 32, 32) -; CHECK-NEXT: DBG_VALUE debug-use [[REG6]], debug-use $noreg, !17, !DIExpression(DW_OP_LLVM_fragment, 0, 32) -; CHECK-NEXT: DBG_VALUE debug-use [[REG7]], debug-use $noreg, !17, !DIExpression(DW_OP_LLVM_fragment, 32, 32) +; CHECK-NEXT: DBG_VALUE [[REG2]], $noreg, !19, !DIExpression(DW_OP_LLVM_fragment, 0, 32) +; CHECK-NEXT: DBG_VALUE [[REG3]], $noreg, !19, !DIExpression(DW_OP_LLVM_fragment, 32, 32) +; CHECK-NEXT: DBG_VALUE [[REG4]], $noreg, !18, !DIExpression(DW_OP_LLVM_fragment, 0, 32) +; CHECK-NEXT: DBG_VALUE [[REG5]], $noreg, !18, !DIExpression(DW_OP_LLVM_fragment, 32, 32) +; CHECK-NEXT: DBG_VALUE [[REG6]], $noreg, !17, !DIExpression(DW_OP_LLVM_fragment, 0, 32) +; CHECK-NEXT: DBG_VALUE [[REG7]], $noreg, !17, !DIExpression(DW_OP_LLVM_fragment, 32, 32) %u.023 = phi i64 [ 0, %for.body.lr.ph ], [ %inc, %for.body ] %y.022 = phi i64 [ 13, %for.body.lr.ph ], [ %mul, %for.body ] %x.021 = phi i64 [ 9, %for.body.lr.ph ], [ %add, %for.body ] diff --git a/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll b/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll index 6872c2c9d306..23674ee32cc4 100644 --- a/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll +++ b/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll @@ -11,11 +11,11 @@ ; CHECK: [[REG1:%[0-9]+]]:gr32 = PHI ; CHECK-NEXT: [[REG2:%[0-9]+]]:gr32 = PHI ; CHECK-NEXT: [[REG3:%[0-9]+]]:gr32 = PHI -; CHECK-NEXT: DBG_VALUE debug-use [[REG1]], debug-use $noreg, !13, !DIExpression(DW_OP_LLVM_fragment, 0, 32) -; CHECK-NEXT: DBG_VALUE debug-use [[REG2]], debug-use $noreg, !13, !DIExpression(DW_OP_LLVM_fragment, 32, 32) -; CHECK-NEXT: DBG_VALUE debug-use [[REG3]], debug-use $noreg, !13, !DIExpression(DW_OP_LLVM_fragment, 64, 16) -; CHECK-NEXT: DBG_VALUE debug-use [[REG1]], debug-use $noreg, !12, !DIExpression(DW_OP_LLVM_fragment, 10, 32) -; CHECK-NEXT: DBG_VALUE debug-use [[REG2]], debug-use $noreg, !12, !DIExpression(DW_OP_LLVM_fragment, 42, 13) +; CHECK-NEXT: DBG_VALUE [[REG1]], $noreg, !13, !DIExpression(DW_OP_LLVM_fragment, 0, 32) +; CHECK-NEXT: DBG_VALUE [[REG2]], $noreg, !13, !DIExpression(DW_OP_LLVM_fragment, 32, 32) +; CHECK-NEXT: DBG_VALUE [[REG3]], $noreg, !13, !DIExpression(DW_OP_LLVM_fragment, 64, 16) +; CHECK-NEXT: DBG_VALUE [[REG1]], $noreg, !12, !DIExpression(DW_OP_LLVM_fragment, 10, 32) +; CHECK-NEXT: DBG_VALUE [[REG2]], $noreg, !12, !DIExpression(DW_OP_LLVM_fragment, 42, 13) ; CHECK-NOT: DBG_VALUE target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32" diff --git a/llvm/test/DebugInfo/X86/sdag-legalize-multires.ll b/llvm/test/DebugInfo/X86/sdag-legalize-multires.ll index 0ceace388e96..f0db358b5425 100644 --- a/llvm/test/DebugInfo/X86/sdag-legalize-multires.ll +++ b/llvm/test/DebugInfo/X86/sdag-legalize-multires.ll @@ -21,10 +21,10 @@ entry: %0 = call float @llvm.cos.f32(float 1.500000e+00), !dbg !13 ; CHECK: $xmm1 = MOVAPSrr $xmm0 call void @llvm.dbg.value(metadata float %0, metadata !15, metadata !DIExpression()), !dbg !13 - ; CHECK: DBG_VALUE debug-use {{.*}}$xmm1, {{.*}}, ![[RSIN]], !DIExpression(), + ; CHECK: DBG_VALUE {{.*}}$xmm1, {{.*}}, ![[RSIN]], !DIExpression(), %1 = call float @llvm.sin.f32(float 1.500000e+00), !dbg !13 call void @llvm.dbg.value(metadata float %1, metadata !11, metadata !DIExpression()), !dbg !13 - ; CHECK: DBG_VALUE debug-use {{.*}}$xmm0, {{.*}}, ![[RCOS]], !DIExpression(), + ; CHECK: DBG_VALUE {{.*}}$xmm0, {{.*}}, ![[RCOS]], !DIExpression(), call void @g(float %0, float %1), !dbg !13 ret void, !dbg !13 } diff --git a/llvm/test/DebugInfo/X86/sdag-salvage-add.ll b/llvm/test/DebugInfo/X86/sdag-salvage-add.ll index f3f129e9bea0..fda9b33d43b8 100644 --- a/llvm/test/DebugInfo/X86/sdag-salvage-add.ll +++ b/llvm/test/DebugInfo/X86/sdag-salvage-add.ll @@ -24,9 +24,9 @@ ; ; CHECK: ![[S4:.*]] = !DILocalVariable(name: "s4", ; CHECK: ![[MYVAR:.*]] = !DILocalVariable(name: "myVar", -; CHECK: DBG_VALUE debug-use $rax, debug-use $noreg, ![[MYVAR]], +; CHECK: DBG_VALUE $rax, $noreg, ![[MYVAR]], ; CHECK-SAME: !DIExpression(DW_OP_plus_uconst, 4096, DW_OP_stack_value) -; CHECK-NEXT: DBG_VALUE debug-use $rax, debug-use $noreg, ![[S4]], +; CHECK-NEXT: DBG_VALUE $rax, $noreg, ![[S4]], ; CHECK-SAME: !DIExpression(DW_OP_plus_uconst, 4096, DW_OP_stack_value) ; CHECK-NEXT: $rdi = MOV64rm killed renamable $rax, 1, $noreg, 4096, $noreg, diff --git a/llvm/test/DebugInfo/X86/sdagsplit-1.ll b/llvm/test/DebugInfo/X86/sdagsplit-1.ll index a2e02d8ad8a1..87eb3b10c32a 100644 --- a/llvm/test/DebugInfo/X86/sdagsplit-1.ll +++ b/llvm/test/DebugInfo/X86/sdagsplit-1.ll @@ -13,8 +13,8 @@ ; return 0; ; } ; -; CHECK-DAG: DBG_VALUE debug-use ${{[a-z]+}}, debug-use $noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !{{[0-9]+}} -; CHECK-DAG: DBG_VALUE debug-use ${{[a-z]+}}, debug-use $noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 32, 32), debug-location !{{[0-9]+}} +; CHECK-DAG: DBG_VALUE ${{[a-z]+}}, $noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !{{[0-9]+}} +; CHECK-DAG: DBG_VALUE ${{[a-z]+}}, $noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 32, 32), debug-location !{{[0-9]+}} ; ModuleID = 'sdagsplit-1.c' target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128" -- 2.34.1