From a80edb7fc96c1620b2b99d6e6a2c018eb021d083 Mon Sep 17 00:00:00 2001 From: Mirko Brkusanin Date: Wed, 21 Dec 2022 15:05:30 +0100 Subject: [PATCH] [AMDGPU][GlobalISel] Fix mapping G_FREEZE Differential Revision: https://reviews.llvm.org/D140416 --- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 3 ++- .../AMDGPU/GlobalISel/regbankselect-freeze.mir | 23 ++++++++++++++++++++++ 2 files changed, 25 insertions(+), 1 deletion(-) diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp index 1e75440..9985d88 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp @@ -3512,7 +3512,8 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { DstBank = SrcBank; unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); - if (cannotCopy(*DstBank, *SrcBank, Size)) + if (MI.getOpcode() != AMDGPU::G_FREEZE && + cannotCopy(*DstBank, *SrcBank, Size)) return getInvalidInstructionMapping(); const ValueMapping &ValMap = getValueMapping(0, Size, *DstBank); diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-freeze.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-freeze.mir index a3f64e4..5bf1fc4 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-freeze.mir +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-freeze.mir @@ -50,6 +50,29 @@ body: | ... --- +name: test_freeze_s1_sgpr_to_sgpr +legalized: true +body: | + bb.0: + liveins: $sgpr0 + + ; CHECK-LABEL: name: test_freeze_s1_sgpr_to_sgpr + ; CHECK: liveins: $sgpr0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 + ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s1) = G_TRUNC [[COPY]](s32) + ; CHECK-NEXT: [[FREEZE:%[0-9]+]]:sgpr(s1) = G_FREEZE [[TRUNC]] + ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:sgpr(s32) = G_ANYEXT [[FREEZE]](s1) + ; CHECK-NEXT: $sgpr0 = COPY [[ANYEXT]](s32) + %0:_(s32) = COPY $sgpr0 + %1:_(s1) = G_TRUNC %0(s32) + %2:_(s1) = G_FREEZE %1 + %3:_(s32) = G_ANYEXT %2(s1) + $sgpr0 = COPY %3(s32) + +... + +--- name: test_freeze_s1_vcc legalized: true -- 2.7.4