From a7bae0619903196417a9daf2409412217ddaf463 Mon Sep 17 00:00:00 2001 From: Evan Quan Date: Tue, 7 Jul 2020 14:49:45 +0800 Subject: [PATCH] drm/amd/powerplay: move more APIs to smu_cmn.c Considering they are shared by all ASICs. Signed-off-by: Evan Quan Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 64 --------------------- drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 14 ++--- drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 2 - drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 2 +- drivers/gpu/drm/amd/powerplay/renoir_ppt.c | 2 +- drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 2 +- drivers/gpu/drm/amd/powerplay/smu_cmn.c | 66 ++++++++++++++++++++++ drivers/gpu/drm/amd/powerplay/smu_cmn.h | 7 +++ drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 10 ++-- drivers/gpu/drm/amd/powerplay/smu_v12_0.c | 4 +- 10 files changed, 90 insertions(+), 83 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c index f464f9a..6006f7a9 100644 --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c @@ -91,43 +91,6 @@ int smu_sys_set_pp_feature_mask(struct smu_context *smu, uint64_t new_mask) return ret; } -int smu_get_smc_version(struct smu_context *smu, uint32_t *if_version, uint32_t *smu_version) -{ - int ret = 0; - - if (!if_version && !smu_version) - return -EINVAL; - - if (smu->smc_fw_if_version && smu->smc_fw_version) - { - if (if_version) - *if_version = smu->smc_fw_if_version; - - if (smu_version) - *smu_version = smu->smc_fw_version; - - return 0; - } - - if (if_version) { - ret = smu_send_smc_msg(smu, SMU_MSG_GetDriverIfVersion, if_version); - if (ret) - return ret; - - smu->smc_fw_if_version = *if_version; - } - - if (smu_version) { - ret = smu_send_smc_msg(smu, SMU_MSG_GetSmuVersion, smu_version); - if (ret) - return ret; - - smu->smc_fw_version = *smu_version; - } - - return ret; -} - int smu_get_status_gfxoff(struct amdgpu_device *adev, uint32_t *value) { int ret = 0; @@ -184,33 +147,6 @@ int smu_get_dpm_freq_range(struct smu_context *smu, return ret; } -bool smu_clk_dpm_is_enabled(struct smu_context *smu, enum smu_clk_type clk_type) -{ - enum smu_feature_mask feature_id = 0; - - switch (clk_type) { - case SMU_MCLK: - case SMU_UCLK: - feature_id = SMU_FEATURE_DPM_UCLK_BIT; - break; - case SMU_GFXCLK: - case SMU_SCLK: - feature_id = SMU_FEATURE_DPM_GFXCLK_BIT; - break; - case SMU_SOCCLK: - feature_id = SMU_FEATURE_DPM_SOCCLK_BIT; - break; - default: - return true; - } - - if(!smu_feature_is_enabled(smu, feature_id)) { - return false; - } - - return true; -} - /** * smu_dpm_set_power_gate - power gate/ungate the specific IP block * diff --git a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c index c542f16..4fa99b7 100644 --- a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c @@ -874,7 +874,7 @@ static int arcturus_force_clk_levels(struct smu_context *smu, uint32_t smu_version; int ret = 0; - ret = smu_get_smc_version(smu, NULL, &smu_version); + ret = smu_cmn_get_smc_version(smu, NULL, &smu_version); if (ret) { dev_err(smu->adev->dev, "Failed to get smu version!\n"); return ret; @@ -1191,7 +1191,7 @@ static int arcturus_get_power_profile_mode(struct smu_context *smu, if (!buf) return -EINVAL; - result = smu_get_smc_version(smu, NULL, &smu_version); + result = smu_cmn_get_smc_version(smu, NULL, &smu_version); if (result) return result; @@ -1278,7 +1278,7 @@ static int arcturus_set_power_profile_mode(struct smu_context *smu, return -EINVAL; } - ret = smu_get_smc_version(smu, NULL, &smu_version); + ret = smu_cmn_get_smc_version(smu, NULL, &smu_version); if (ret) return ret; @@ -1362,7 +1362,7 @@ static int arcturus_set_performance_level(struct smu_context *smu, uint32_t smu_version; int ret; - ret = smu_get_smc_version(smu, NULL, &smu_version); + ret = smu_cmn_get_smc_version(smu, NULL, &smu_version); if (ret) { dev_err(smu->adev->dev, "Failed to get smu version!\n"); return ret; @@ -2106,7 +2106,7 @@ static void arcturus_get_unique_id(struct smu_context *smu) uint32_t top32 = 0, bottom32 = 0, smu_version; uint64_t id; - if (smu_get_smc_version(smu, NULL, &smu_version)) { + if (smu_cmn_get_smc_version(smu, NULL, &smu_version)) { dev_warn(adev->dev, "Failed to get smu version, cannot get unique_id or serial_number\n"); return; } @@ -2147,7 +2147,7 @@ static int arcturus_set_df_cstate(struct smu_context *smu, uint32_t smu_version; int ret; - ret = smu_get_smc_version(smu, NULL, &smu_version); + ret = smu_cmn_get_smc_version(smu, NULL, &smu_version); if (ret) { dev_err(smu->adev->dev, "Failed to get smu version!\n"); return ret; @@ -2167,7 +2167,7 @@ static int arcturus_allow_xgmi_power_down(struct smu_context *smu, bool en) uint32_t smu_version; int ret; - ret = smu_get_smc_version(smu, NULL, &smu_version); + ret = smu_cmn_get_smc_version(smu, NULL, &smu_version); if (ret) { dev_err(smu->adev->dev, "Failed to get smu version!\n"); return ret; diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h index e67b74d..4f57104 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h @@ -760,7 +760,6 @@ extern int smu_handle_task(struct smu_context *smu, int smu_switch_power_profile(struct smu_context *smu, enum PP_SMC_POWER_PROFILE type, bool en); -int smu_get_smc_version(struct smu_context *smu, uint32_t *if_version, uint32_t *smu_version); int smu_get_dpm_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *min, uint32_t *max); int smu_set_soft_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, @@ -769,7 +768,6 @@ enum amd_dpm_forced_level smu_get_performance_level(struct smu_context *smu); int smu_force_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level); int smu_set_display_count(struct smu_context *smu, uint32_t count); int smu_set_ac_dc(struct smu_context *smu); -bool smu_clk_dpm_is_enabled(struct smu_context *smu, enum smu_clk_type clk_type); const char *smu_get_message_name(struct smu_context *smu, enum smu_message_type type); size_t smu_sys_get_pp_feature_mask(struct smu_context *smu, char *buf); int smu_sys_set_pp_feature_mask(struct smu_context *smu, uint64_t new_mask); diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c index 3d76f13..25ca6c4 100644 --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c @@ -2216,7 +2216,7 @@ static int navi10_disable_umc_cdr_12gbps_workaround(struct smu_context *smu) if (!navi10_need_umc_cdr_12gbps_workaround(smu->adev)) return 0; - ret = smu_get_smc_version(smu, NULL, &smu_version); + ret = smu_cmn_get_smc_version(smu, NULL, &smu_version); if (ret) return ret; diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c index afdcbe4..2e0a540 100644 --- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c @@ -255,7 +255,7 @@ static int renoir_get_dpm_ultimate_freq(struct smu_context *smu, uint32_t mclk_mask, soc_mask; uint32_t clock_limit; - if (!smu_clk_dpm_is_enabled(smu, clk_type)) { + if (!smu_cmn_clk_dpm_is_enabled(smu, clk_type)) { switch (clk_type) { case SMU_MCLK: case SMU_UCLK: diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c index 331560a..2d49d30 100644 --- a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c @@ -1732,7 +1732,7 @@ static bool sienna_cichlid_is_mode1_reset_supported(struct smu_context *smu) * SRIOV env will not support SMU mode1 reset * PM FW support mode1 reset from 58.26 */ - smu_get_smc_version(smu, NULL, &smu_version); + smu_cmn_get_smc_version(smu, NULL, &smu_version); if (amdgpu_sriov_vf(adev) || (smu_version < 0x003a1a00)) return false; diff --git a/drivers/gpu/drm/amd/powerplay/smu_cmn.c b/drivers/gpu/drm/amd/powerplay/smu_cmn.c index 85c1069..814c21c 100644 --- a/drivers/gpu/drm/amd/powerplay/smu_cmn.c +++ b/drivers/gpu/drm/amd/powerplay/smu_cmn.c @@ -164,6 +164,33 @@ int smu_cmn_feature_is_enabled(struct smu_context *smu, return ret; } +bool smu_cmn_clk_dpm_is_enabled(struct smu_context *smu, + enum smu_clk_type clk_type) +{ + enum smu_feature_mask feature_id = 0; + + switch (clk_type) { + case SMU_MCLK: + case SMU_UCLK: + feature_id = SMU_FEATURE_DPM_UCLK_BIT; + break; + case SMU_GFXCLK: + case SMU_SCLK: + feature_id = SMU_FEATURE_DPM_GFXCLK_BIT; + break; + case SMU_SOCCLK: + feature_id = SMU_FEATURE_DPM_SOCCLK_BIT; + break; + default: + return true; + } + + if (!smu_cmn_feature_is_enabled(smu, feature_id)) + return false; + + return true; +} + int smu_cmn_get_enabled_mask(struct smu_context *smu, uint32_t *feature_mask, uint32_t num) @@ -374,3 +401,42 @@ int smu_cmn_disable_all_features_with_exception(struct smu_context *smu, features_to_disable, 0); } + +int smu_cmn_get_smc_version(struct smu_context *smu, + uint32_t *if_version, + uint32_t *smu_version) +{ + int ret = 0; + + if (!if_version && !smu_version) + return -EINVAL; + + if (smu->smc_fw_if_version && smu->smc_fw_version) + { + if (if_version) + *if_version = smu->smc_fw_if_version; + + if (smu_version) + *smu_version = smu->smc_fw_version; + + return 0; + } + + if (if_version) { + ret = smu_send_smc_msg(smu, SMU_MSG_GetDriverIfVersion, if_version); + if (ret) + return ret; + + smu->smc_fw_if_version = *if_version; + } + + if (smu_version) { + ret = smu_send_smc_msg(smu, SMU_MSG_GetSmuVersion, smu_version); + if (ret) + return ret; + + smu->smc_fw_version = *smu_version; + } + + return ret; +} diff --git a/drivers/gpu/drm/amd/powerplay/smu_cmn.h b/drivers/gpu/drm/amd/powerplay/smu_cmn.h index 08968ad..9b1d2e9 100644 --- a/drivers/gpu/drm/amd/powerplay/smu_cmn.h +++ b/drivers/gpu/drm/amd/powerplay/smu_cmn.h @@ -35,6 +35,9 @@ int smu_cmn_feature_is_supported(struct smu_context *smu, int smu_cmn_feature_is_enabled(struct smu_context *smu, enum smu_feature_mask mask); +bool smu_cmn_clk_dpm_is_enabled(struct smu_context *smu, + enum smu_clk_type clk_type); + int smu_cmn_get_enabled_mask(struct smu_context *smu, uint32_t *feature_mask, uint32_t num); @@ -52,4 +55,8 @@ int smu_cmn_set_pp_feature_mask(struct smu_context *smu, int smu_cmn_disable_all_features_with_exception(struct smu_context *smu, enum smu_feature_mask mask); +int smu_cmn_get_smc_version(struct smu_context *smu, + uint32_t *if_version, + uint32_t *smu_version); + #endif diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c index 518ac05..72fe5c8 100644 --- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c @@ -289,7 +289,7 @@ int smu_v11_0_check_fw_version(struct smu_context *smu) uint8_t smu_minor, smu_debug; int ret = 0; - ret = smu_get_smc_version(smu, &if_version, &smu_version); + ret = smu_cmn_get_smc_version(smu, &if_version, &smu_version); if (ret) return ret; @@ -1679,7 +1679,7 @@ int smu_v11_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type c uint32_t param = 0; uint32_t clock_limit; - if (!smu_clk_dpm_is_enabled(smu, clk_type)) { + if (!smu_cmn_clk_dpm_is_enabled(smu, clk_type)) { switch (clk_type) { case SMU_MCLK: case SMU_UCLK: @@ -1740,7 +1740,7 @@ int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, int ret = 0, clk_id = 0; uint32_t param; - if (!smu_clk_dpm_is_enabled(smu, clk_type)) + if (!smu_cmn_clk_dpm_is_enabled(smu, clk_type)) return 0; clk_id = smu_cmn_to_asic_specific_index(smu, @@ -1786,7 +1786,7 @@ int smu_v11_0_set_hard_freq_limited_range(struct smu_context *smu, if (min <= 0 && max <= 0) return -EINVAL; - if (!smu_clk_dpm_is_enabled(smu, clk_type)) + if (!smu_cmn_clk_dpm_is_enabled(smu, clk_type)) return 0; clk_id = smu_cmn_to_asic_specific_index(smu, @@ -1943,7 +1943,7 @@ int smu_v11_0_get_dpm_freq_by_index(struct smu_context *smu, if (!value) return -EINVAL; - if (!smu_clk_dpm_is_enabled(smu, clk_type)) + if (!smu_cmn_clk_dpm_is_enabled(smu, clk_type)) return 0; clk_id = smu_cmn_to_asic_specific_index(smu, diff --git a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c index 33ec9fc..7964f14 100644 --- a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c +++ b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c @@ -157,7 +157,7 @@ int smu_v12_0_check_fw_version(struct smu_context *smu) uint8_t smu_minor, smu_debug; int ret = 0; - ret = smu_get_smc_version(smu, &if_version, &smu_version); + ret = smu_cmn_get_smc_version(smu, &if_version, &smu_version); if (ret) return ret; @@ -305,7 +305,7 @@ int smu_v12_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_ { int ret = 0; - if (!smu_clk_dpm_is_enabled(smu, clk_type)) + if (!smu_cmn_clk_dpm_is_enabled(smu, clk_type)) return 0; switch (clk_type) { -- 2.7.4