From a76f20c3642e44f31704e56e8e46cecc0b08afcd Mon Sep 17 00:00:00 2001 From: Tim Shen Date: Thu, 25 May 2017 23:40:46 +0000 Subject: [PATCH] [PPC] Add text for assert. llvm-svn: 303940 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 7fde123..b90a5ee 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -8296,7 +8296,7 @@ SDValue PPCTargetLowering::LowerINTRINSIC_VOID(SDValue Op, SDLoc DL(Op); switch (cast(Op.getOperand(ArgStart))->getZExtValue()) { case Intrinsic::ppc_cfence: { - assert(ArgStart == 1); + assert(ArgStart == 1 && "llvm.ppc.cfence must carry a chain argument."); assert(Subtarget.isPPC64() && "Only 64-bit is supported for now."); return SDValue(DAG.getMachineNode(PPC::CFENCE8, DL, MVT::Other, DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, -- 2.7.4