From a74770ec581174324f6b7d90c0db6d838c7d1092 Mon Sep 17 00:00:00 2001 From: Bencheng Jing Date: Wed, 3 Apr 2019 22:02:02 +0800 Subject: [PATCH] amvecm: fix CM/sat/bricon adjust not available [1/2] PD#SWPL-6892 Problem: fix CM/sat/bricon adjust not available Solution: fix CM/sat/bricon adjust not available Verify: U212 Change-Id: Ia6a1aebda35550801d4c7e16807714b8349431a4 Signed-off-by: Bencheng Jing --- drivers/amlogic/media/enhancement/amvecm/amcm.c | 8 ++-- drivers/amlogic/media/enhancement/amvecm/amve.c | 4 +- drivers/amlogic/media/enhancement/amvecm/amvecm.c | 49 +++++++++++++---------- 3 files changed, 34 insertions(+), 27 deletions(-) diff --git a/drivers/amlogic/media/enhancement/amvecm/amcm.c b/drivers/amlogic/media/enhancement/amvecm/amcm.c index 7a8ad4c..b9eccbb 100644 --- a/drivers/amlogic/media/enhancement/amvecm/amcm.c +++ b/drivers/amlogic/media/enhancement/amvecm/amcm.c @@ -161,8 +161,8 @@ void am_set_regmap(struct am_regs_s *p) if (!cm_en) { if (p->am_reg[i].addr == 0x208) { - if (get_cpu_type() == - MESON_CPU_MAJOR_ID_TL1) + if (get_cpu_type() >= + MESON_CPU_MAJOR_ID_G12A) p->am_reg[i].val = p->am_reg[i].val & 0xfffffffe; else @@ -270,7 +270,7 @@ void amcm_disable(void) WRITE_VPP_REG(VPP_CHROMA_ADDR_PORT, 0x208); temp = READ_VPP_REG(VPP_CHROMA_DATA_PORT); - if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) { + if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { if (temp & 0x1) { WRITE_VPP_REG(VPP_CHROMA_ADDR_PORT, 0x208); @@ -296,7 +296,7 @@ void amcm_enable(void) WRITE_VPP_REG_BITS(VPP_MISC, 1, 28, 1); WRITE_VPP_REG(VPP_CHROMA_ADDR_PORT, 0x208); temp = READ_VPP_REG(VPP_CHROMA_DATA_PORT); - if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) { + if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { if (!(temp & 0x1)) { WRITE_VPP_REG(VPP_CHROMA_ADDR_PORT, 0x208); diff --git a/drivers/amlogic/media/enhancement/amvecm/amve.c b/drivers/amlogic/media/enhancement/amvecm/amve.c index a2f22eb..ec05583 100644 --- a/drivers/amlogic/media/enhancement/amvecm/amve.c +++ b/drivers/amlogic/media/enhancement/amvecm/amve.c @@ -1033,7 +1033,7 @@ void vpp_vd_adj1_contrast(signed int cont_val, struct vframe_s *vf) WRITE_VPP_REG_BITS(VPP_VADJ_CTRL, 0, 1, 1); } } - if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) { + if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { vd1_contrast = (READ_VPP_REG(VPP_VADJ1_Y_2) & 0x7ff00) | (cont_val << 0); WRITE_VPP_REG(VPP_VADJ1_Y_2, vd1_contrast); @@ -1065,7 +1065,7 @@ void vpp_vd_adj1_brightness(signed int bri_val, struct vframe_s *vf) if (bri_val > 1023 || bri_val < -1024) return; - if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) { + if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { vd1_brightness = (READ_VPP_REG(VPP_VADJ1_Y_2) & 0xff) | (bri_val << 8); diff --git a/drivers/amlogic/media/enhancement/amvecm/amvecm.c b/drivers/amlogic/media/enhancement/amvecm/amvecm.c index e913d69..d7b357e 100644 --- a/drivers/amlogic/media/enhancement/amvecm/amvecm.c +++ b/drivers/amlogic/media/enhancement/amvecm/amvecm.c @@ -236,7 +236,7 @@ __setup("pq=", amvecm_load_pq_val); static int amvecm_set_contrast2(int val) { val += 0x80; - if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) { + if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { WRITE_VPP_REG_BITS(VPP_VADJ2_Y_2, val, 0, 8); WRITE_VPP_REG_BITS(VPP_VADJ2_MISC, 1, 0, 1); @@ -254,14 +254,14 @@ static int amvecm_set_brightness2(int val) if (get_cpu_type() <= MESON_CPU_MAJOR_ID_GXTVBB) WRITE_VPP_REG_BITS(VPP_VADJ2_Y, vdj_mode_s.brightness2, 8, 9); - else if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) + else if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) WRITE_VPP_REG_BITS(VPP_VADJ2_Y_2, vdj_mode_s.brightness2, 8, 11); else WRITE_VPP_REG_BITS(VPP_VADJ2_Y, vdj_mode_s.brightness2 >> 1, 8, 10); - if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) + if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) WRITE_VPP_REG_BITS(VPP_VADJ2_MISC, 1, 0, 1); else WRITE_VPP_REG_BITS(VPP_VADJ_CTRL, 1, 2, 1); @@ -290,7 +290,7 @@ static ssize_t video_adj1_brightness_show(struct class *cla, val = (val << 23) >> 23; return sprintf(buf, "%d\n", val); - } else if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) { + } else if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { val = (READ_VPP_REG(VPP_VADJ1_Y_2) >> 8) & 0x7ff; val = (val << 21) >> 21; @@ -315,12 +315,12 @@ static ssize_t video_adj1_brightness_store(struct class *cla, if (get_cpu_type() <= MESON_CPU_MAJOR_ID_GXTVBB) WRITE_VPP_REG_BITS(VPP_VADJ1_Y, val, 8, 9); - else if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) + else if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) WRITE_VPP_REG_BITS(VPP_VADJ1_Y_2, val, 8, 11); else WRITE_VPP_REG_BITS(VPP_VADJ1_Y, val >> 1, 8, 10); - if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) + if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) WRITE_VPP_REG_BITS(VPP_VADJ1_MISC, 1, 0, 1); else WRITE_VPP_REG_BITS(VPP_VADJ_CTRL, 1, 0, 1); @@ -331,7 +331,7 @@ static ssize_t video_adj1_brightness_store(struct class *cla, static ssize_t video_adj1_contrast_show(struct class *cla, struct class_attribute *attr, char *buf) { - if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) + if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) return sprintf(buf, "%d\n", (int)(READ_VPP_REG(VPP_VADJ1_Y_2) & 0xff) - 0x80); else @@ -352,7 +352,7 @@ static ssize_t video_adj1_contrast_store(struct class *cla, val += 0x80; - if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) { + if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { WRITE_VPP_REG_BITS(VPP_VADJ1_Y_2, val, 0, 8); WRITE_VPP_REG_BITS(VPP_VADJ1_MISC, 1, 0, 1); } else { @@ -374,7 +374,7 @@ static ssize_t video_adj2_brightness_show(struct class *cla, val = (val << 23) >> 23; return sprintf(buf, "%d\n", val); - } else if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) { + } else if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { val = (READ_VPP_REG(VPP_VADJ2_Y_2) >> 8) & 0x7ff; val = (val << 21) >> 21; @@ -403,7 +403,7 @@ static ssize_t video_adj2_brightness_store(struct class *cla, static ssize_t video_adj2_contrast_show(struct class *cla, struct class_attribute *attr, char *buf) { - if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) + if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) return sprintf(buf, "%d\n", (int)(READ_VPP_REG(VPP_VADJ2_Y_2) & 0xff) - 0x80); else @@ -780,7 +780,7 @@ void vpp_get_vframe_hist_info(struct vframe_s *vf) unsigned int hist_height, hist_width; u64 divid; - if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) { + if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { /*TL1 remove VPP_IN_H_V_SIZE register*/ hist_width = READ_VPP_REG_BITS(VPP_PREBLEND_H_SIZE, 0, 13); hist_height = READ_VPP_REG_BITS(VPP_PREBLEND_H_SIZE, 16, 13); @@ -1198,7 +1198,7 @@ static int amvecm_set_saturation_hue(int mab) mb = -512; mab = ((ma & 0x3ff) << 16) | (mb & 0x3ff); - if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) + if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) WRITE_VPP_REG(VPP_VADJ1_MA_MB_2, mab); else WRITE_VPP_REG(VPP_VADJ1_MA_MB, mab); @@ -1212,7 +1212,7 @@ static int amvecm_set_saturation_hue(int mab) md = (s16)((mab<<6)>>22); /* md = ma; */ mab = ((mc&0x3ff)<<16)|(md&0x3ff); - if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) { + if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { WRITE_VPP_REG(VPP_VADJ1_MC_MD_2, mab); WRITE_VPP_REG_BITS(VPP_VADJ1_MISC, 1, 0, 1); } else { @@ -1267,7 +1267,7 @@ static int amvecm_set_saturation_hue_post(int val1, mab = ((ma & 0x3ff) << 16) | (mb & 0x3ff); pr_info("\n[amvideo..] saturation_post:%d hue_post:%d mab:%x\n", saturation_post, hue_post, mab); - if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) + if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) WRITE_VPP_REG(VPP_VADJ2_MA_MB_2, mab); else WRITE_VPP_REG(VPP_VADJ2_MA_MB, mab); @@ -1279,7 +1279,7 @@ static int amvecm_set_saturation_hue_post(int val1, mc = -512; md = (s16)((mab<<6)>>22); /* md = ma; */ mab = ((mc&0x3ff)<<16)|(md&0x3ff); - if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) { + if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { WRITE_VPP_REG(VPP_VADJ2_MC_MD_2, mab); WRITE_VPP_REG_BITS(VPP_VADJ2_MISC, 1, 0, 1); } else { @@ -1590,8 +1590,8 @@ static long amvecm_ioctl(struct file *file, vecm_latch_flag |= FLAG_VADJ1_BRI; } if (vdj_mode_flg & 0x2) { /*brightness2*/ - if ((vdj_mode_s.brightness2 < -255) || - (vdj_mode_s.brightness2 > 255)) { + if ((vdj_mode_s.brightness2 < -1024) || + (vdj_mode_s.brightness2 > 1023)) { pr_amvecm_dbg("load brightness2 value invalid!!!\n"); return -EINVAL; } @@ -2208,7 +2208,7 @@ static ssize_t amvecm_contrast_store(struct class *cla, static ssize_t amvecm_saturation_hue_show(struct class *cla, struct class_attribute *attr, char *buf) { - if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) + if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) return sprintf(buf, "0x%x\n", READ_VPP_REG(VPP_VADJ1_MA_MB_2)); else @@ -2271,7 +2271,7 @@ void vpp_vd_adj1_saturation_hue(signed int sat_val, mab = ((ma & 0x3ff) << 16) | (mb & 0x3ff); pr_info("\n[amvideo..] saturation_pre:%d hue_pre:%d mab:%x\n", sat_val, hue_val, mab); - if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) + if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) WRITE_VPP_REG(VPP_VADJ1_MA_MB_2, mab); else WRITE_VPP_REG(VPP_VADJ1_MA_MB, mab); @@ -2284,7 +2284,7 @@ void vpp_vd_adj1_saturation_hue(signed int sat_val, md = (s16)((mab<<6)>>22); /* md = ma; */ mab = ((mc&0x3ff)<<16)|(md&0x3ff); - if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) { + if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { WRITE_VPP_REG(VPP_VADJ1_MC_MD_2, mab); WRITE_VPP_REG_BITS(VPP_VADJ1_MISC, 1, 0, 1); } else { @@ -5421,8 +5421,15 @@ void init_pq_setting(void) is_meson_txlx_cpu() || is_meson_txhd_cpu() || is_meson_tl1_cpu()) goto tvchip_pq_setting; - else if (is_meson_g12a_cpu() || is_meson_g12b_cpu()) { + else if (is_meson_g12a_cpu() || is_meson_g12b_cpu() || + is_meson_sm1_cpu()) { sr_offset[0] = SR0_OFFSET; + bitdepth = 12; + /*confirm with vlsi-Lunhai.Chen, for G12A/G12B, + *VPP_GCLK_CTRL1 must enable + */ + WRITE_VPP_REG_BITS(VPP_GCLK_CTRL1, 0xf, 0, 4); + cm_init_config(bitdepth); /*dnlp off*/ WRITE_VPP_REG_BITS(VPP_VE_ENABLE_CTRL, 0, DNLP_EN_BIT, DNLP_EN_WID); -- 2.7.4