From a5fcff6628c641d01954d0af4aee0e723a570cad Mon Sep 17 00:00:00 2001 From: Matt Turner Date: Wed, 30 Dec 2015 14:48:22 -0500 Subject: [PATCH] glsl: Fix undefined shifts. Shifting into the sign bit is undefined, as is shifting by 32. Reviewed-by: Jordan Justen Reviewed-by: Ian Romanick --- src/glsl/ir_constant_expression.cpp | 8 ++++---- src/glsl/nir/nir_opcodes.py | 6 +++--- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/src/glsl/ir_constant_expression.cpp b/src/glsl/ir_constant_expression.cpp index 7613139..c99a823 100644 --- a/src/glsl/ir_constant_expression.cpp +++ b/src/glsl/ir_constant_expression.cpp @@ -1539,10 +1539,10 @@ ir_expression::constant_expression_value(struct hash_table *variable_context) data.i[c] = -1; else { int count = 0; - int top_bit = op[0]->type->base_type == GLSL_TYPE_UINT - ? 0 : v & (1 << 31); + unsigned top_bit = op[0]->type->base_type == GLSL_TYPE_UINT + ? 0 : v & (1u << 31); - while (((v & (1 << 31)) == top_bit) && count != 32) { + while (((v & (1u << 31)) == top_bit) && count != 32) { count++; v <<= 1; } @@ -1721,7 +1721,7 @@ ir_expression::constant_expression_value(struct hash_table *variable_context) else if (offset + bits > 32) data.u[c] = 0; /* Undefined, per spec. */ else { - unsigned insert_mask = ((1 << bits) - 1) << offset; + unsigned insert_mask = ((1ull << bits) - 1) << offset; unsigned insert = op[1]->value.u[c]; insert <<= offset; diff --git a/src/glsl/nir/nir_opcodes.py b/src/glsl/nir/nir_opcodes.py index 855095f..d7ba0b6 100644 --- a/src/glsl/nir/nir_opcodes.py +++ b/src/glsl/nir/nir_opcodes.py @@ -516,7 +516,7 @@ int bits = src0, offset = src1; if (offset < 0 || bits < 0 || offset + bits > 32) dst = 0; /* undefined per the spec */ else - dst = ((1 << bits)- 1) << offset; + dst = ((1ull << bits) - 1) << offset; """) opcode("ldexp", 0, tfloat, [0, 0], [tfloat, tint], "", """ @@ -578,7 +578,7 @@ if (bits == 0) { } else if (bits < 0 || offset < 0 || offset + bits > 32) { dst = 0; /* undefined per the spec */ } else { - dst = (base >> offset) & ((1 << bits) - 1); + dst = (base >> offset) & ((1ull << bits) - 1); } """) opcode("ibitfield_extract", 0, tint, @@ -618,7 +618,7 @@ if (bits == 0) { } else if (offset < 0 || bits < 0 || bits + offset > 32) { dst = 0; } else { - unsigned mask = ((1 << bits) - 1) << offset; + unsigned mask = ((1ull << bits) - 1) << offset; dst = (base & ~mask) | ((insert << bits) & mask); } """) -- 2.7.4