From a5f08214850aab5b0b23bfdcab26baab27446b0c Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Wed, 30 Aug 2017 09:29:11 +0100 Subject: [PATCH] i965: drop brw->has_llc in favor of devinfo->has_llc MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Lionel Landwerlin Reviewed-by: Samuel Iglesias Gonsálvez Reviewed-by: Emil Velikov --- src/mesa/drivers/dri/i965/brw_context.c | 1 - src/mesa/drivers/dri/i965/brw_context.h | 1 - src/mesa/drivers/dri/i965/intel_batchbuffer.c | 6 ++++-- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 +- src/mesa/drivers/dri/i965/intel_pixel_read.c | 2 +- src/mesa/drivers/dri/i965/intel_tex_image.c | 2 +- src/mesa/drivers/dri/i965/intel_tex_subimage.c | 2 +- 7 files changed, 8 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 9443f38..2cd05b4 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -858,7 +858,6 @@ brwCreateContext(gl_api api, brw->screen = screen; brw->bufmgr = screen->bufmgr; - brw->has_llc = devinfo->has_llc; brw->has_hiz = devinfo->has_hiz_and_separate_stencil; brw->has_separate_stencil = devinfo->has_hiz_and_separate_stencil; brw->has_pln = devinfo->has_pln; diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 0e37a47..7e2673e 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -749,7 +749,6 @@ struct brw_context bool has_hiz; bool has_separate_stencil; bool must_use_separate_stencil; - bool has_llc; bool has_swizzling; bool has_surface_tile_offset; bool has_compr4; diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c index c7d7029..6a04901 100644 --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c @@ -178,7 +178,9 @@ intel_batchbuffer_reset(struct intel_batchbuffer *batch, static void intel_batchbuffer_reset_and_clear_render_cache(struct brw_context *brw) { - intel_batchbuffer_reset(&brw->batch, brw->bufmgr, brw->has_llc); + const struct gen_device_info *devinfo = &brw->screen->devinfo; + + intel_batchbuffer_reset(&brw->batch, brw->bufmgr, devinfo->has_llc); brw_render_cache_set_clear(brw); } @@ -634,7 +636,7 @@ do_flush_locked(struct brw_context *brw, int in_fence_fd, int *out_fence_fd) struct intel_batchbuffer *batch = &brw->batch; int ret = 0; - if (brw->has_llc) { + if (devinfo->has_llc) { brw_bo_unmap(batch->bo); } else { ret = brw_bo_subdata(batch->bo, 0, 4 * USED_BATCH(*batch), batch->map); diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index ed18d2a..9e2ca54 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -3573,7 +3573,7 @@ use_intel_mipree_map_blit(struct brw_context *brw, { const struct gen_device_info *devinfo = &brw->screen->devinfo; - if (brw->has_llc && + if (devinfo->has_llc && /* It's probably not worth swapping to the blit ring because of * all the overhead involved. */ diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c index c2ffb56..8304358 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_read.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_read.c @@ -92,7 +92,7 @@ intel_readpixels_tiled_memcpy(struct gl_context * ctx, * a 2D BGRA, RGBA, L8 or A8 texture. It could be generalized to support * more types. */ - if (!brw->has_llc || + if (!devinfo->has_llc || !(type == GL_UNSIGNED_BYTE || type == GL_UNSIGNED_INT_8_8_8_8_REV) || pixels == NULL || _mesa_is_bufferobj(pack->BufferObj) || diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c index 39c1c9a..4661581 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_image.c +++ b/src/mesa/drivers/dri/i965/intel_tex_image.c @@ -401,7 +401,7 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx, * with _mesa_image_row_stride. However, before removing the restrictions * we need tests. */ - if (!brw->has_llc || + if (!devinfo->has_llc || !(type == GL_UNSIGNED_BYTE || type == GL_UNSIGNED_INT_8_8_8_8_REV) || !(texImage->TexObject->Target == GL_TEXTURE_2D || texImage->TexObject->Target == GL_TEXTURE_RECTANGLE) || diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c b/src/mesa/drivers/dri/i965/intel_tex_subimage.c index 42f24be..8ccbf4f 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_subimage.c +++ b/src/mesa/drivers/dri/i965/intel_tex_subimage.c @@ -99,7 +99,7 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx, * with _mesa_image_row_stride. However, before removing the restrictions * we need tests. */ - if (!brw->has_llc || + if (!devinfo->has_llc || !(type == GL_UNSIGNED_BYTE || type == GL_UNSIGNED_INT_8_8_8_8_REV) || !(texImage->TexObject->Target == GL_TEXTURE_2D || texImage->TexObject->Target == GL_TEXTURE_RECTANGLE) || -- 2.7.4