From a5df209084512242c037f1d35f0b2e4969b04519 Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Sun, 27 Aug 2017 20:01:46 +0200 Subject: [PATCH] re PR target/81995 (gcc/reg-stack.c:2073:1: error: unrecognizable insn:) PR target/81995 * config/i386/i386.md (*): Change operand 2 predicate to register_operand. Reorder operands. (*btr): Ditto. (*_mask): Change operand 3 predicate to register_operand. (*btr_mask): Ditto. testsuite/ChangeLog: PR target/81995 * gcc.target/i386/pr46091-4.c: Add -mregparm=2 for 32bit targets. * gcc.target/i386/pr46091-4a.c: Ditto. From-SVN: r251369 --- gcc/ChangeLog | 9 +++++++++ gcc/config/i386/i386.md | 16 ++++++++-------- gcc/testsuite/ChangeLog | 6 ++++++ gcc/testsuite/gcc.target/i386/pr46091-4.c | 1 + gcc/testsuite/gcc.target/i386/pr46091-4a.c | 1 + 5 files changed, 25 insertions(+), 8 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5a425e3..b1070d9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2017-08-27 Uros Bizjak + + PR target/81995 + * config/i386/i386.md (*): Change operand 2 + predicate to register_operand. Reorder operands. + (*btr): Ditto. + (*_mask): Change operand 3 predicate to register_operand. + (*btr_mask): Ditto. + 2017-08-25 Steven Munroe * config.gcc (powerpc*-*-*): Add xmmintrin.h and mm_malloc.h. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index f984060..7465848 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -11011,11 +11011,11 @@ [(set (match_operand:SWI48 0 "register_operand" "=r") (any_or:SWI48 (ashift:SWI48 (const_int 1) - (match_operand:QI 1 "register_operand" "r")) - (match_operand:SWI48 2 "nonimmediate_operand" "0"))) + (match_operand:QI 2 "register_operand" "r")) + (match_operand:SWI48 1 "register_operand" "0"))) (clobber (reg:CC FLAGS_REG))] "TARGET_USE_BT" - "{}\t{%1, %0|%0, %1}" + "{}\t{%2, %0|%0, %2}" [(set_attr "type" "alu1") (set_attr "prefix_0f" "1") (set_attr "znver1_decode" "double") @@ -11031,7 +11031,7 @@ (and:SI (match_operand:SI 1 "register_operand") (match_operand:SI 2 "const_int_operand")) 0)) - (match_operand:SWI48 3 "nonimmediate_operand"))) + (match_operand:SWI48 3 "register_operand"))) (clobber (reg:CC FLAGS_REG))] "(INTVAL (operands[2]) & (GET_MODE_BITSIZE (mode)-1)) == GET_MODE_BITSIZE (mode)-1 @@ -11051,11 +11051,11 @@ [(set (match_operand:SWI48 0 "register_operand" "=r") (and:SWI48 (rotate:SWI48 (const_int -2) - (match_operand:QI 1 "register_operand" "r")) - (match_operand:SWI48 2 "nonimmediate_operand" "0"))) + (match_operand:QI 2 "register_operand" "r")) + (match_operand:SWI48 1 "register_operand" "0"))) (clobber (reg:CC FLAGS_REG))] "TARGET_USE_BT" - "btr{}\t{%1, %0|%0, %1}" + "btr{}\t{%2, %0|%0, %2}" [(set_attr "type" "alu1") (set_attr "prefix_0f" "1") (set_attr "znver1_decode" "double") @@ -11071,7 +11071,7 @@ (and:SI (match_operand:SI 1 "register_operand") (match_operand:SI 2 "const_int_operand")) 0)) - (match_operand:SWI48 3 "nonimmediate_operand"))) + (match_operand:SWI48 3 "register_operand"))) (clobber (reg:CC FLAGS_REG))] "(INTVAL (operands[2]) & (GET_MODE_BITSIZE (mode)-1)) == GET_MODE_BITSIZE (mode)-1 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index f80aaf2..d4bcd42 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2017-08-27 Uros Bizjak + + PR target/81995 + * gcc.target/i386/pr46091-4.c: Add -mregparm=2 for 32bit targets. + * gcc.target/i386/pr46091-4a.c: Ditto. + 2017-08-27 Thomas Koenig PR fortran/81974 diff --git a/gcc/testsuite/gcc.target/i386/pr46091-4.c b/gcc/testsuite/gcc.target/i386/pr46091-4.c index af2cfae..f88ff5e 100644 --- a/gcc/testsuite/gcc.target/i386/pr46091-4.c +++ b/gcc/testsuite/gcc.target/i386/pr46091-4.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2" } */ +/* { dg-additional-options "-mregparm=2" { target ia32 } } */ int test_1 (int x, int n) { diff --git a/gcc/testsuite/gcc.target/i386/pr46091-4a.c b/gcc/testsuite/gcc.target/i386/pr46091-4a.c index 5874aee..debbdaa 100644 --- a/gcc/testsuite/gcc.target/i386/pr46091-4a.c +++ b/gcc/testsuite/gcc.target/i386/pr46091-4a.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2" } */ +/* { dg-additional-options "-mregparm=2" { target ia32 } } */ int test_1 (int x, int n) { -- 2.7.4