From a5202949134c3b8da108e04043a5c4350309ad1b Mon Sep 17 00:00:00 2001 From: Stanislav Mekhanoshin Date: Fri, 29 May 2020 12:08:47 -0700 Subject: [PATCH] [AMDGPU] Regenrated urem/udiv global isel tests. NFC. --- llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll | 4 ++-- llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll index 656aa86..fa3ffea 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll @@ -775,7 +775,7 @@ define <2 x i64> @v_udiv_v2i64(<2 x i64> %num, <2 x i64> %den) { ; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 ; CGP-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc ; CGP-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc -; CGP-NEXT: BB2_2: ; %Flow1 +; CGP-NEXT: BB2_2: ; %Flow2 ; CGP-NEXT: s_or_saveexec_b64 s[6:7], s[6:7] ; CGP-NEXT: s_xor_b64 exec, exec, s[6:7] ; CGP-NEXT: s_cbranch_execz BB2_4 @@ -2896,7 +2896,7 @@ define <2 x i64> @v_udiv_v2i64_pow2_shl_denom(<2 x i64> %x, <2 x i64> %y) { ; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v7 ; CGP-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc ; CGP-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc -; CGP-NEXT: BB8_2: ; %Flow1 +; CGP-NEXT: BB8_2: ; %Flow2 ; CGP-NEXT: s_or_saveexec_b64 s[6:7], s[6:7] ; CGP-NEXT: s_xor_b64 exec, exec, s[6:7] ; CGP-NEXT: s_cbranch_execz BB8_4 diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll index 928c592..da67412 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll @@ -770,7 +770,7 @@ define <2 x i64> @v_urem_v2i64(<2 x i64> %num, <2 x i64> %den) { ; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v9 ; CGP-NEXT: v_cndmask_b32_e32 v0, v1, v5, vcc ; CGP-NEXT: v_cndmask_b32_e32 v1, v10, v11, vcc -; CGP-NEXT: BB2_2: ; %Flow1 +; CGP-NEXT: BB2_2: ; %Flow2 ; CGP-NEXT: s_or_saveexec_b64 s[8:9], s[6:7] ; CGP-NEXT: s_xor_b64 exec, exec, s[8:9] ; CGP-NEXT: s_cbranch_execz BB2_4 @@ -2866,7 +2866,7 @@ define <2 x i64> @v_urem_v2i64_pow2_shl_denom(<2 x i64> %x, <2 x i64> %y) { ; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 ; CGP-NEXT: v_cndmask_b32_e32 v0, v1, v7, vcc ; CGP-NEXT: v_cndmask_b32_e32 v1, v4, v11, vcc -; CGP-NEXT: BB8_2: ; %Flow1 +; CGP-NEXT: BB8_2: ; %Flow2 ; CGP-NEXT: s_or_saveexec_b64 s[8:9], s[6:7] ; CGP-NEXT: s_xor_b64 exec, exec, s[8:9] ; CGP-NEXT: s_cbranch_execz BB8_4 -- 2.7.4