From a505e52a65918f5f0010274289c6019519a2b32c Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Wed, 5 Aug 2020 10:50:41 +0800 Subject: [PATCH] dt-bindings: fsl: Convert i.MX7ULP SIM to json-schema Convert the i.MX7ULP SIM binding to DT schema format using json-schema. Signed-off-by: Anson Huang Link: https://lore.kernel.org/r/1596595841-27563-2-git-send-email-Anson.Huang@nxp.com Signed-off-by: Rob Herring --- .../bindings/arm/freescale/fsl,imx7ulp-sim.txt | 16 --------- .../bindings/arm/freescale/fsl,imx7ulp-sim.yaml | 38 ++++++++++++++++++++++ 2 files changed, 38 insertions(+), 16 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.yaml diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt deleted file mode 100644 index 7d0c7f0..0000000 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt +++ /dev/null @@ -1,16 +0,0 @@ -Freescale i.MX7ULP System Integration Module ----------------------------------------------- -The system integration module (SIM) provides system control and chip configuration -registers. In this module, chip revision information is located in JTAG ID register, -and a set of registers have been made available in DGO domain for SW use, with the -objective to maintain its value between system resets. - -Required properties: -- compatible: Should be "fsl,imx7ulp-sim". -- reg: Specifies base physical address and size of the register sets. - -Example: -sim: sim@410a3000 { - compatible = "fsl,imx7ulp-sim", "syscon"; - reg = <0x410a3000 0x1000>; -}; diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.yaml new file mode 100644 index 0000000..526f508 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/freescale/fsl,imx7ulp-sim.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX7ULP System Integration Module + +maintainers: + - Anson Huang + +description: | + The system integration module (SIM) provides system control and chip configuration + registers. In this module, chip revision information is located in JTAG ID register, + and a set of registers have been made available in DGO domain for SW use, with the + objective to maintain its value between system resets. + +properties: + compatible: + items: + - const: fsl,imx7ulp-sim + - const: syscon + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + sim@410a3000 { + compatible = "fsl,imx7ulp-sim", "syscon"; + reg = <0x410a3000 0x1000>; + }; -- 2.7.4