From a4d2ebd2c865e217c2ba558b136609297f76988f Mon Sep 17 00:00:00 2001 From: Carol Eidt Date: Thu, 19 Oct 2017 20:24:33 -0700 Subject: [PATCH] LSRA Arm64 consistent reg sets tryAllocateFreeReg() uses the RegOrder array to iterate over the available registers. This needs to be consistent with the available registers of the given type. Otherwise, allocateBusyReg() will assert when it finds a free register that should have been allocated in tryAllocateFreeReg(). Fix #14591 --- src/jit/lsra.cpp | 6 +++++- src/jit/target.h | 1 + 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/src/jit/lsra.cpp b/src/jit/lsra.cpp index 41184f8..f745dea 100644 --- a/src/jit/lsra.cpp +++ b/src/jit/lsra.cpp @@ -1170,7 +1170,11 @@ LinearScan::LinearScan(Compiler* theCompiler) #endif // DEBUG enregisterLocalVars = ((compiler->opts.compFlags & CLFLG_REGVAR) != 0) && compiler->lvaTrackedCount > 0; - availableIntRegs = (RBM_ALLINT & ~compiler->codeGen->regSet.rsMaskResvd); +#ifdef _TARGET_ARM64_ + availableIntRegs = (RBM_ALLINT & ~(RBM_PR | RBM_FP | RBM_LR) & ~compiler->codeGen->regSet.rsMaskResvd); +#else + availableIntRegs = (RBM_ALLINT & ~compiler->codeGen->regSet.rsMaskResvd); +#endif #if ETW_EBP_FRAMED availableIntRegs &= ~RBM_FPBASE; diff --git a/src/jit/target.h b/src/jit/target.h index 3cd5244..30c715d 100644 --- a/src/jit/target.h +++ b/src/jit/target.h @@ -1595,6 +1595,7 @@ typedef unsigned short regPairNoSmall; // arm: need 12 bits #define REG_VAR_ORDER REG_R9,REG_R10,REG_R11,REG_R12,REG_R13,REG_R14,REG_R15,\ REG_R8,REG_R7,REG_R6,REG_R5,REG_R4,REG_R3,REG_R2,REG_R1,REG_R0,\ REG_R19,REG_R20,REG_R21,REG_R22,REG_R23,REG_R24,REG_R25,REG_R26,REG_R27,REG_R28,\ + REG_IP0,REG_IP1,\ #define REG_VAR_ORDER_FLT REG_V16, REG_V17, REG_V18, REG_V19, \ REG_V20, REG_V21, REG_V22, REG_V23, \ -- 2.7.4