From a4bf2be5d2b585bd3d7baa70bd06cdfd6e0da4e0 Mon Sep 17 00:00:00 2001 From: Fangrui Song Date: Tue, 6 Jun 2023 20:21:00 -0700 Subject: [PATCH] [Hexagon,Lanai,LoongArch,Sparc] Migrate to new encodeInstruction that uses SmallVectorImpl. NFC --- .../Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp | 15 ++++++++------- .../Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h | 4 ++-- llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp | 10 +++++----- .../LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp | 8 ++++---- llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp | 7 ++++--- 5 files changed, 23 insertions(+), 21 deletions(-) diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp index a916748..8bf4d0a 100644 --- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp +++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp @@ -364,7 +364,8 @@ uint32_t HexagonMCCodeEmitter::parseBits(size_t Last, MCInst const &MCB, } /// Emit the bundle. -void HexagonMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS, +void HexagonMCCodeEmitter::encodeInstruction(const MCInst &MI, + SmallVectorImpl &CB, SmallVectorImpl &Fixups, const MCSubtargetInfo &STI) const { MCInst &HMB = const_cast(MI); @@ -380,7 +381,7 @@ void HexagonMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS, for (auto &I : HexagonMCInstrInfo::bundleInstructions(HMB)) { MCInst &HMI = const_cast(*I.getInst()); - EncodeSingleInstruction(HMI, OS, Fixups, STI, parseBits(Last, HMB, HMI)); + encodeSingleInstruction(HMI, CB, Fixups, STI, parseBits(Last, HMB, HMI)); State.Extended = HexagonMCInstrInfo::isImmext(HMI); State.Addend += HEXAGON_INSTR_SIZE; ++State.Index; @@ -394,10 +395,10 @@ static bool RegisterMatches(unsigned Consumer, unsigned Producer, Consumer); } -/// EncodeSingleInstruction - Emit a single -void HexagonMCCodeEmitter::EncodeSingleInstruction(const MCInst &MI, - raw_ostream &OS, SmallVectorImpl &Fixups, - const MCSubtargetInfo &STI, uint32_t Parse) const { +void HexagonMCCodeEmitter::encodeSingleInstruction( + const MCInst &MI, SmallVectorImpl &CB, + SmallVectorImpl &Fixups, const MCSubtargetInfo &STI, + uint32_t Parse) const { assert(!HexagonMCInstrInfo::isBundle(MI)); uint64_t Binary; @@ -442,7 +443,7 @@ void HexagonMCCodeEmitter::EncodeSingleInstruction(const MCInst &MI, Binary |= SubBits0 | (SubBits1 << 16); } - support::endian::write(OS, Binary, support::little); + support::endian::write(CB, Binary, support::little); ++MCNumEmitted; } diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h index 151964b..aee95bc 100644 --- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h +++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h @@ -49,11 +49,11 @@ public: HexagonMCCodeEmitter(MCInstrInfo const &MII, MCContext &MCT) : MCT(MCT), MCII(MII) {} - void encodeInstruction(MCInst const &MI, raw_ostream &OS, + void encodeInstruction(MCInst const &MI, SmallVectorImpl &CB, SmallVectorImpl &Fixups, MCSubtargetInfo const &STI) const override; - void EncodeSingleInstruction(const MCInst &MI, raw_ostream &OS, + void encodeSingleInstruction(const MCInst &MI, SmallVectorImpl &CB, SmallVectorImpl &Fixups, const MCSubtargetInfo &STI, uint32_t Parse) const; diff --git a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp index ec573a1..5f9c2a1 100644 --- a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp +++ b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp @@ -24,6 +24,7 @@ #include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCSubtargetInfo.h" #include "llvm/Support/Casting.h" +#include "llvm/Support/EndianStream.h" #include "llvm/Support/raw_ostream.h" #include #include @@ -74,7 +75,7 @@ public: SmallVectorImpl &Fixups, const MCSubtargetInfo &SubtargetInfo) const; - void encodeInstruction(const MCInst &Inst, raw_ostream &Ostream, + void encodeInstruction(const MCInst &Inst, SmallVectorImpl &CB, SmallVectorImpl &Fixups, const MCSubtargetInfo &SubtargetInfo) const override; @@ -170,15 +171,14 @@ LanaiMCCodeEmitter::adjustPqBitsSpls(const MCInst &Inst, unsigned Value, } void LanaiMCCodeEmitter::encodeInstruction( - const MCInst &Inst, raw_ostream &Ostream, SmallVectorImpl &Fixups, + const MCInst &Inst, SmallVectorImpl &CB, + SmallVectorImpl &Fixups, const MCSubtargetInfo &SubtargetInfo) const { // Get instruction encoding and emit it unsigned Value = getBinaryCodeForInstr(Inst, Fixups, SubtargetInfo); ++MCNumEmitted; // Keep track of the number of emitted insns. - // Emit bytes in big-endian - for (int i = (4 - 1) * 8; i >= 0; i -= 8) - Ostream << static_cast((Value >> i) & 0xff); + support::endian::write(CB, Value, support::big); } // Encode Lanai Memory Operand diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp index 4587d59..1742619 100644 --- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp +++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp @@ -39,7 +39,7 @@ public: ~LoongArchMCCodeEmitter() override {} - void encodeInstruction(const MCInst &MI, raw_ostream &OS, + void encodeInstruction(const MCInst &MI, SmallVectorImpl &CB, SmallVectorImpl &Fixups, const MCSubtargetInfo &STI) const override; @@ -274,8 +274,8 @@ LoongArchMCCodeEmitter::getExprOpValue(const MCInst &MI, const MCOperand &MO, } void LoongArchMCCodeEmitter::encodeInstruction( - const MCInst &MI, raw_ostream &OS, SmallVectorImpl &Fixups, - const MCSubtargetInfo &STI) const { + const MCInst &MI, SmallVectorImpl &CB, + SmallVectorImpl &Fixups, const MCSubtargetInfo &STI) const { const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); // Get byte count of instruction. unsigned Size = Desc.getSize(); @@ -285,7 +285,7 @@ void LoongArchMCCodeEmitter::encodeInstruction( llvm_unreachable("Unhandled encodeInstruction length!"); case 4: { uint32_t Bits = getBinaryCodeForInstr(MI, Fixups, STI); - support::endian::write(OS, Bits, support::little); + support::endian::write(CB, Bits, support::little); break; } } diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp index e69319f..333e0b4 100644 --- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp +++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp @@ -53,7 +53,7 @@ public: SparcMCCodeEmitter &operator=(const SparcMCCodeEmitter &) = delete; ~SparcMCCodeEmitter() override = default; - void encodeInstruction(const MCInst &MI, raw_ostream &OS, + void encodeInstruction(const MCInst &MI, SmallVectorImpl &CB, SmallVectorImpl &Fixups, const MCSubtargetInfo &STI) const override; @@ -87,11 +87,12 @@ public: } // end anonymous namespace -void SparcMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS, +void SparcMCCodeEmitter::encodeInstruction(const MCInst &MI, + SmallVectorImpl &CB, SmallVectorImpl &Fixups, const MCSubtargetInfo &STI) const { unsigned Bits = getBinaryCodeForInstr(MI, Fixups, STI); - support::endian::write(OS, Bits, + support::endian::write(CB, Bits, Ctx.getAsmInfo()->isLittleEndian() ? support::little : support::big); -- 2.7.4