From a49a1b9cccbc632fa2763dd4efe49fb22c4ef899 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Sat, 7 Apr 2018 12:47:35 +0000 Subject: [PATCH] [CostModel][X86] Regenerate vector comparison cost tests with update_analyze_test_checks.py llvm-svn: 329497 --- llvm/test/Analysis/CostModel/X86/cmp.ll | 423 +++++++++++++++++++++----------- 1 file changed, 286 insertions(+), 137 deletions(-) diff --git a/llvm/test/Analysis/CostModel/X86/cmp.ll b/llvm/test/Analysis/CostModel/X86/cmp.ll index f4733d6..f8a6cc2 100644 --- a/llvm/test/Analysis/CostModel/X86/cmp.ll +++ b/llvm/test/Analysis/CostModel/X86/cmp.ll @@ -1,147 +1,296 @@ -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=pentium4 | FileCheck --check-prefix=CHECK --check-prefix=SSE --check-prefix=SSE2 %s -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=yonah | FileCheck --check-prefix=CHECK --check-prefix=SSE --check-prefix=SSE3 %s -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=core2 | FileCheck --check-prefix=CHECK --check-prefix=SSE --check-prefix=SSSE3 %s -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=penryn | FileCheck --check-prefix=CHECK --check-prefix=SSE --check-prefix=SSE41 %s -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7 | FileCheck --check-prefix=CHECK --check-prefix=SSE --check-prefix=SSE42 %s -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX1 %s -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=core-avx2 | FileCheck --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX2 %s -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=knl | FileCheck --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX512 %s +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py +; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2 +; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+sse3 | FileCheck %s --check-prefixes=CHECK,SSE,SSE3 +; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+ssse3 | FileCheck %s --check-prefixes=CHECK,SSE,SSSE3 +; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE41 +; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE42 +; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1 +; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2 +; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F +; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" -target triple = "x86_64-apple-macosx10.8.0" +define i32 @cmp_float(i32 %arg) { +; SSE2-LABEL: 'cmp_float' +; SSE2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F32 = fcmp olt <2 x float> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4F32 = fcmp olt <4 x float> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V8F32 = fcmp olt <8 x float> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V16F32 = fcmp olt <16 x float> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F64 = fcmp olt <2 x double> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V4F64 = fcmp olt <4 x double> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V8F64 = fcmp olt <8 x double> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V16F64 = fcmp olt <16 x double> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SSE3-LABEL: 'cmp_float' +; SSE3-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F32 = fcmp olt <2 x float> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4F32 = fcmp olt <4 x float> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V8F32 = fcmp olt <8 x float> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V16F32 = fcmp olt <16 x float> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F64 = fcmp olt <2 x double> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V4F64 = fcmp olt <4 x double> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V8F64 = fcmp olt <8 x double> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V16F64 = fcmp olt <16 x double> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SSSE3-LABEL: 'cmp_float' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F32 = fcmp olt <2 x float> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4F32 = fcmp olt <4 x float> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V8F32 = fcmp olt <8 x float> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V16F32 = fcmp olt <16 x float> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F64 = fcmp olt <2 x double> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V4F64 = fcmp olt <4 x double> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V8F64 = fcmp olt <8 x double> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V16F64 = fcmp olt <16 x double> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SSE41-LABEL: 'cmp_float' +; SSE41-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F32 = fcmp olt <2 x float> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4F32 = fcmp olt <4 x float> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V8F32 = fcmp olt <8 x float> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V16F32 = fcmp olt <16 x float> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F64 = fcmp olt <2 x double> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V4F64 = fcmp olt <4 x double> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V8F64 = fcmp olt <8 x double> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V16F64 = fcmp olt <16 x double> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SSE42-LABEL: 'cmp_float' +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F32 = fcmp olt <2 x float> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fcmp olt <4 x float> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fcmp olt <8 x float> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fcmp olt <16 x float> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fcmp olt <2 x double> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fcmp olt <4 x double> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fcmp olt <8 x double> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16F64 = fcmp olt <16 x double> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX-LABEL: 'cmp_float' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F32 = fcmp olt <2 x float> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fcmp olt <4 x float> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fcmp olt <8 x float> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F32 = fcmp olt <16 x float> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fcmp olt <2 x double> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fcmp olt <4 x double> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F64 = fcmp olt <8 x double> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F64 = fcmp olt <16 x double> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512-LABEL: 'cmp_float' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F32 = fcmp olt <2 x float> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fcmp olt <4 x float> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fcmp olt <8 x float> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = fcmp olt <16 x float> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fcmp olt <2 x double> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fcmp olt <4 x double> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fcmp olt <8 x double> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F64 = fcmp olt <16 x double> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; + %V2F32 = fcmp olt <2 x float> undef, undef + %V4F32 = fcmp olt <4 x float> undef, undef + %V8F32 = fcmp olt <8 x float> undef, undef + %V16F32 = fcmp olt <16 x float> undef, undef -define i32 @cmp(i32 %arg) { - ; -- floats -- - ;SSE2: cost of 3 {{.*}} fcmp - ;SSE3: cost of 3 {{.*}} fcmp - ;SSSE3: cost of 3 {{.*}} fcmp - ;SSE41: cost of 3 {{.*}} fcmp - ;SSE42: cost of 1 {{.*}} fcmp - ;AVX: cost of 1 {{.*}} fcmp - %A = fcmp olt <2 x float> undef, undef + %V2F64 = fcmp olt <2 x double> undef, undef + %V4F64 = fcmp olt <4 x double> undef, undef + %V8F64 = fcmp olt <8 x double> undef, undef + %V16F64 = fcmp olt <16 x double> undef, undef - ;SSE2: cost of 7 {{.*}} fcmp - ;SSE3: cost of 7 {{.*}} fcmp - ;SSSE3: cost of 7 {{.*}} fcmp - ;SSE41: cost of 7 {{.*}} fcmp - ;SSE42: cost of 1 {{.*}} fcmp - ;AVX: cost of 1 {{.*}} fcmp - %B = fcmp olt <4 x float> undef, undef - - ;SSE2: cost of 14 {{.*}} fcmp - ;SSE3: cost of 14 {{.*}} fcmp - ;SSSE3: cost of 14 {{.*}} fcmp - ;SSE41: cost of 14 {{.*}} fcmp - ;SSE42: cost of 2 {{.*}} fcmp - ;AVX: cost of 1 {{.*}} fcmp - %C = fcmp olt <8 x float> undef, undef - - ;SSE2: cost of 3 {{.*}} fcmp - ;SSE3: cost of 3 {{.*}} fcmp - ;SSSE3: cost of 3 {{.*}} fcmp - ;SSE41: cost of 3 {{.*}} fcmp - ;SSE42: cost of 1 {{.*}} fcmp - ;AVX: cost of 1 {{.*}} fcmp - %D = fcmp olt <2 x double> undef, undef - - ;SSE2: cost of 6 {{.*}} fcmp - ;SSE3: cost of 6 {{.*}} fcmp - ;SSSE3: cost of 6 {{.*}} fcmp - ;SSE41: cost of 6 {{.*}} fcmp - ;SSE42: cost of 2 {{.*}} fcmp - ;AVX: cost of 1 {{.*}} fcmp - %E = fcmp olt <4 x double> undef, undef - - ; AVX512: cost of 1 {{.*}} %E1 = fcmp - %E1 = fcmp olt <16 x float> undef, undef - - ; AVX512: cost of 1 {{.*}} %E2 = fcmp - %E2 = fcmp olt <8 x double> undef, undef - - ; AVX512: cost of 2 {{.*}} %E3 = fcmp - %E3 = fcmp olt <16 x double> undef, undef - - ; -- integers -- - - ;SSE2: cost of 1 {{.*}} icmp - ;SSE3: cost of 1 {{.*}} icmp - ;SSSE3: cost of 1 {{.*}} icmp - ;SSE41: cost of 1 {{.*}} icmp - ;SSE42: cost of 1 {{.*}} icmp - ;AVX: cost of 1 {{.*}} icmp - %F = icmp eq <16 x i8> undef, undef - - ;SSE2: cost of 1 {{.*}} icmp - ;SSE3: cost of 1 {{.*}} icmp - ;SSSE3: cost of 1 {{.*}} icmp - ;SSE41: cost of 1 {{.*}} icmp - ;SSE42: cost of 1 {{.*}} icmp - ;AVX: cost of 1 {{.*}} icmp - %G = icmp eq <8 x i16> undef, undef - - ;SSE2: cost of 1 {{.*}} icmp - ;SSE3: cost of 1 {{.*}} icmp - ;SSSE3: cost of 1 {{.*}} icmp - ;SSE41: cost of 1 {{.*}} icmp - ;SSE42: cost of 1 {{.*}} icmp - ;AVX: cost of 1 {{.*}} icmp - %H = icmp eq <4 x i32> undef, undef - - ;SSE2: cost of 8 {{.*}} icmp - ;SSE3: cost of 8 {{.*}} icmp - ;SSSE3: cost of 8 {{.*}} icmp - ;SSE41: cost of 8 {{.*}} icmp - ;SSE42: cost of 1 {{.*}} icmp - ;AVX: cost of 1 {{.*}} icmp - %I = icmp eq <2 x i64> undef, undef - - ;SSE2: cost of 16 {{.*}} icmp - ;SSE3: cost of 16 {{.*}} icmp - ;SSSE3: cost of 16 {{.*}} icmp - ;SSE41: cost of 16 {{.*}} icmp - ;SSE42: cost of 2 {{.*}} icmp - ;AVX1: cost of 4 {{.*}} icmp - ;AVX2: cost of 1 {{.*}} icmp - %J = icmp eq <4 x i64> undef, undef - - ;SSE2: cost of 2 {{.*}} icmp - ;SSE3: cost of 2 {{.*}} icmp - ;SSSE3: cost of 2 {{.*}} icmp - ;SSE41: cost of 2 {{.*}} icmp - ;SSE42: cost of 2 {{.*}} icmp - ;AVX1: cost of 4 {{.*}} icmp - ;AVX2: cost of 1 {{.*}} icmp - %K = icmp eq <8 x i32> undef, undef - - ;SSE2: cost of 2 {{.*}} icmp - ;SSE3: cost of 2 {{.*}} icmp - ;SSSE3: cost of 2 {{.*}} icmp - ;SSE41: cost of 2 {{.*}} icmp - ;SSE42: cost of 2 {{.*}} icmp - ;AVX1: cost of 4 {{.*}} icmp - ;AVX2: cost of 1 {{.*}} icmp - %L = icmp eq <16 x i16> undef, undef + ret i32 undef +} - ;SSE2: cost of 2 {{.*}} icmp - ;SSE3: cost of 2 {{.*}} icmp - ;SSSE3: cost of 2 {{.*}} icmp - ;SSE41: cost of 2 {{.*}} icmp - ;SSE42: cost of 2 {{.*}} icmp - ;AVX1: cost of 4 {{.*}} icmp - ;AVX2: cost of 1 {{.*}} icmp - %M = icmp eq <32 x i8> undef, undef +define i32 @cmp_int(i32 %arg) { +; SSE2-LABEL: 'cmp_int' +; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I8 = icmp eq <32 x i8> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I8 = icmp eq <64 x i8> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V128I8 = icmp eq <128 x i8> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = icmp eq <16 x i16> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = icmp eq <32 x i16> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V64I16 = icmp eq <64 x i16> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = icmp eq <4 x i32> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = icmp eq <8 x i32> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = icmp eq <16 x i32> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V32I32 = icmp eq <32 x i32> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V2I64 = icmp eq <2 x i64> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V4I64 = icmp eq <4 x i64> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V8I64 = icmp eq <8 x i64> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V16I64 = icmp eq <16 x i64> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SSE3-LABEL: 'cmp_int' +; SSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I8 = icmp eq <32 x i8> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I8 = icmp eq <64 x i8> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V128I8 = icmp eq <128 x i8> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = icmp eq <16 x i16> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = icmp eq <32 x i16> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V64I16 = icmp eq <64 x i16> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = icmp eq <4 x i32> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = icmp eq <8 x i32> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = icmp eq <16 x i32> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V32I32 = icmp eq <32 x i32> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V2I64 = icmp eq <2 x i64> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V4I64 = icmp eq <4 x i64> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V8I64 = icmp eq <8 x i64> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V16I64 = icmp eq <16 x i64> undef, undef +; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SSSE3-LABEL: 'cmp_int' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I8 = icmp eq <32 x i8> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I8 = icmp eq <64 x i8> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V128I8 = icmp eq <128 x i8> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = icmp eq <16 x i16> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = icmp eq <32 x i16> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V64I16 = icmp eq <64 x i16> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = icmp eq <4 x i32> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = icmp eq <8 x i32> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = icmp eq <16 x i32> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V32I32 = icmp eq <32 x i32> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V2I64 = icmp eq <2 x i64> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V4I64 = icmp eq <4 x i64> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V8I64 = icmp eq <8 x i64> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V16I64 = icmp eq <16 x i64> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SSE41-LABEL: 'cmp_int' +; SSE41-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I8 = icmp eq <32 x i8> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I8 = icmp eq <64 x i8> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V128I8 = icmp eq <128 x i8> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = icmp eq <16 x i16> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = icmp eq <32 x i16> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V64I16 = icmp eq <64 x i16> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = icmp eq <4 x i32> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = icmp eq <8 x i32> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = icmp eq <16 x i32> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V32I32 = icmp eq <32 x i32> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V2I64 = icmp eq <2 x i64> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V4I64 = icmp eq <4 x i64> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V8I64 = icmp eq <8 x i64> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V16I64 = icmp eq <16 x i64> undef, undef +; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SSE42-LABEL: 'cmp_int' +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I8 = icmp eq <32 x i8> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I8 = icmp eq <64 x i8> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V128I8 = icmp eq <128 x i8> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = icmp eq <16 x i16> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = icmp eq <32 x i16> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V64I16 = icmp eq <64 x i16> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = icmp eq <4 x i32> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = icmp eq <8 x i32> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = icmp eq <16 x i32> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V32I32 = icmp eq <32 x i32> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = icmp eq <2 x i64> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4I64 = icmp eq <4 x i64> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8I64 = icmp eq <8 x i64> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16I64 = icmp eq <16 x i64> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX1-LABEL: 'cmp_int' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I8 = icmp eq <32 x i8> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V64I8 = icmp eq <64 x i8> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V128I8 = icmp eq <128 x i8> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16I16 = icmp eq <16 x i16> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V32I16 = icmp eq <32 x i16> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V64I16 = icmp eq <64 x i16> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = icmp eq <4 x i32> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8I32 = icmp eq <8 x i32> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16I32 = icmp eq <16 x i32> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V32I32 = icmp eq <32 x i32> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = icmp eq <2 x i64> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4I64 = icmp eq <4 x i64> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8I64 = icmp eq <8 x i64> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V16I64 = icmp eq <16 x i64> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX2-LABEL: 'cmp_int' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = icmp eq <32 x i8> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V64I8 = icmp eq <64 x i8> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V128I8 = icmp eq <128 x i8> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = icmp eq <16 x i16> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I16 = icmp eq <32 x i16> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I16 = icmp eq <64 x i16> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = icmp eq <4 x i32> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = icmp eq <8 x i32> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I32 = icmp eq <16 x i32> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I32 = icmp eq <32 x i32> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = icmp eq <2 x i64> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = icmp eq <4 x i64> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I64 = icmp eq <8 x i64> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16I64 = icmp eq <16 x i64> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512F-LABEL: 'cmp_int' +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = icmp eq <32 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V64I8 = icmp eq <64 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V128I8 = icmp eq <128 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = icmp eq <16 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I16 = icmp eq <32 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I16 = icmp eq <64 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = icmp eq <4 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = icmp eq <8 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = icmp eq <16 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I32 = icmp eq <32 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = icmp eq <2 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = icmp eq <4 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I64 = icmp eq <8 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I64 = icmp eq <16 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512BW-LABEL: 'cmp_int' +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = icmp eq <32 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V64I8 = icmp eq <64 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 256 for instruction: %V128I8 = icmp eq <128 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = icmp eq <16 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V32I16 = icmp eq <32 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V64I16 = icmp eq <64 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = icmp eq <4 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = icmp eq <8 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = icmp eq <16 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I32 = icmp eq <32 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = icmp eq <2 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = icmp eq <4 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I64 = icmp eq <8 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I64 = icmp eq <16 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; + %V16I8 = icmp eq <16 x i8> undef, undef + %V32I8 = icmp eq <32 x i8> undef, undef + %V64I8 = icmp eq <64 x i8> undef, undef + %V128I8 = icmp eq <128 x i8> undef, undef - ; AVX512: cost of 1 {{.*}} %M1 = icmp - %M1 = icmp eq <16 x i32> undef, undef + %V8I16 = icmp eq <8 x i16> undef, undef + %V16I16 = icmp eq <16 x i16> undef, undef + %V32I16 = icmp eq <32 x i16> undef, undef + %V64I16 = icmp eq <64 x i16> undef, undef - ; AVX512: cost of 1 {{.*}} %M2 = icmp - %M2 = icmp eq <8 x i64> undef, undef + %V4I32 = icmp eq <4 x i32> undef, undef + %V8I32 = icmp eq <8 x i32> undef, undef + %V16I32 = icmp eq <16 x i32> undef, undef + %V32I32 = icmp eq <32 x i32> undef, undef - ; AVX512: cost of 2 {{.*}} %M3 = icmp - %M3 = icmp eq <16 x i64> undef, undef + %V2I64 = icmp eq <2 x i64> undef, undef + %V4I64 = icmp eq <4 x i64> undef, undef + %V8I64 = icmp eq <8 x i64> undef, undef + %V16I64 = icmp eq <16 x i64> undef, undef - ;CHECK: cost of 0 {{.*}} ret ret i32 undef } - - -- 2.7.4