From a479b2cb03d073de00a5cd9bd6e1ca4bc43c3e70 Mon Sep 17 00:00:00 2001 From: "balazs.kilvady@imgtec.com" Date: Thu, 18 Sep 2014 15:38:52 +0000 Subject: [PATCH] MIPS: Convert KeyedLoad indexed interceptor case to a Handler. Port r24042 (eb9b9ec) Original commit message: Currently, KeyedLoads on objects with indexed interceptors are handled with a special stub. Instead, key on the map and handler mechanism for more uniform treatment. BUG= R=dusan.milosavljevic@imgtec.com Review URL: https://codereview.chromium.org/579273002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24047 ce2b1a6d-e550-0410-aec6-3dcde31c8c00 --- src/ic/mips64/ic-mips64.cc | 40 ---------------------------------------- src/mips64/code-stubs-mips64.cc | 26 ++++++++++++++++++++++++++ 2 files changed, 26 insertions(+), 40 deletions(-) diff --git a/src/ic/mips64/ic-mips64.cc b/src/ic/mips64/ic-mips64.cc index 0095d14..0ac35ff 100644 --- a/src/ic/mips64/ic-mips64.cc +++ b/src/ic/mips64/ic-mips64.cc @@ -896,46 +896,6 @@ void KeyedStoreIC::GenerateGeneric(MacroAssembler* masm, } -void KeyedLoadIC::GenerateIndexedInterceptor(MacroAssembler* masm) { - // Return address is in ra. - Label slow; - - Register receiver = LoadDescriptor::ReceiverRegister(); - Register key = LoadDescriptor::NameRegister(); - Register scratch1 = a3; - Register scratch2 = a4; - DCHECK(!scratch1.is(receiver) && !scratch1.is(key)); - DCHECK(!scratch2.is(receiver) && !scratch2.is(key)); - - // Check that the receiver isn't a smi. - __ JumpIfSmi(receiver, &slow); - - // Check that the key is an array index, that is Uint32. - __ And(a4, key, Operand(kSmiTagMask | kSmiSignMask)); - __ Branch(&slow, ne, a4, Operand(zero_reg)); - - // Get the map of the receiver. - __ ld(scratch1, FieldMemOperand(receiver, HeapObject::kMapOffset)); - - // Check that it has indexed interceptor and access checks - // are not enabled for this object. - __ lbu(scratch2, FieldMemOperand(scratch1, Map::kBitFieldOffset)); - __ And(scratch2, scratch2, Operand(kSlowCaseBitFieldMask)); - __ Branch(&slow, ne, scratch2, Operand(1 << Map::kHasIndexedInterceptor)); - // Everything is fine, call runtime. - __ Push(receiver, key); // Receiver, key. - - // Perform tail call to the entry. - __ TailCallExternalReference( - ExternalReference(IC_Utility(kLoadElementWithInterceptor), - masm->isolate()), - 2, 1); - - __ bind(&slow); - GenerateMiss(masm); -} - - void KeyedStoreIC::GenerateMiss(MacroAssembler* masm) { // Push receiver, key and value for runtime call. __ Push(StoreDescriptor::ReceiverRegister(), StoreDescriptor::NameRegister(), diff --git a/src/mips64/code-stubs-mips64.cc b/src/mips64/code-stubs-mips64.cc index 41ada8c..bd6a016 100644 --- a/src/mips64/code-stubs-mips64.cc +++ b/src/mips64/code-stubs-mips64.cc @@ -1894,6 +1894,32 @@ void ArgumentsAccessStub::GenerateNewSloppyFast(MacroAssembler* masm) { } +void LoadIndexedInterceptorStub::Generate(MacroAssembler* masm) { + // Return address is in ra. + Label slow; + + Register receiver = LoadDescriptor::ReceiverRegister(); + Register key = LoadDescriptor::NameRegister(); + + // Check that the key is an array index, that is Uint32. + __ And(t0, key, Operand(kSmiTagMask | kSmiSignMask)); + __ Branch(&slow, ne, t0, Operand(zero_reg)); + + // Everything is fine, call runtime. + __ Push(receiver, key); // Receiver, key. + + // Perform tail call to the entry. + __ TailCallExternalReference( + ExternalReference(IC_Utility(IC::kLoadElementWithInterceptor), + masm->isolate()), + 2, 1); + + __ bind(&slow); + PropertyAccessCompiler::TailCallBuiltin( + masm, PropertyAccessCompiler::MissBuiltin(Code::KEYED_LOAD_IC)); +} + + void ArgumentsAccessStub::GenerateNewStrict(MacroAssembler* masm) { // sp[0] : number of parameters // sp[4] : receiver displacement -- 2.7.4