From a462561ceec6aa6daffb5ee01dd029dbdaa6d603 Mon Sep 17 00:00:00 2001 From: QingShan Zhang Date: Wed, 3 Jun 2020 06:32:53 +0000 Subject: [PATCH] [NFC][PowerPC] Remove unused node PPCISD::VMADDFP and PPCISD::VNMSUBFP These two nodes were added by 69caef2b781130a7d0eeaf8898eb346b6423ae03 in 2005 and they are not used by PowerPC backend anymore. And the ISD::FMA is a prefer way for VMADDFP if we really want to create that node. For VNMSUBFP, we will also add a more generic node FNMSUB in D76585 if we really want it. Reviewed By: qiucf Differential Revision: https://reviews.llvm.org/D80429 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 -- llvm/lib/Target/PowerPC/PPCISelLowering.h | 5 ----- llvm/lib/Target/PowerPC/PPCInstrAltivec.td | 8 -------- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 2 -- 4 files changed, 17 deletions(-) diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 0ede11e..2b69c2d 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -1434,8 +1434,6 @@ const char *PPCTargetLowering::getTargetNodeName(unsigned Opcode) const { case PPCISD::FRE: return "PPCISD::FRE"; case PPCISD::FRSQRTE: return "PPCISD::FRSQRTE"; case PPCISD::STFIWX: return "PPCISD::STFIWX"; - case PPCISD::VMADDFP: return "PPCISD::VMADDFP"; - case PPCISD::VNMSUBFP: return "PPCISD::VNMSUBFP"; case PPCISD::VPERM: return "PPCISD::VPERM"; case PPCISD::XXSPLT: return "PPCISD::XXSPLT"; case PPCISD::VECINSERT: return "PPCISD::VECINSERT"; diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h index 77083b4..f3efd26 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.h +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h @@ -89,11 +89,6 @@ namespace llvm { FRE, FRSQRTE, - // VMADDFP, VNMSUBFP - The VMADDFP and VNMSUBFP instructions, taking - // three v4f32 operands and producing a v4f32 result. - VMADDFP, - VNMSUBFP, - /// VPERM - The PPC VPERM Instruction. /// VPERM, diff --git a/llvm/lib/Target/PowerPC/PPCInstrAltivec.td b/llvm/lib/Target/PowerPC/PPCInstrAltivec.td index 9b7b7b3..4a7ea23 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrAltivec.td +++ b/llvm/lib/Target/PowerPC/PPCInstrAltivec.td @@ -1024,14 +1024,6 @@ def : Pat<(fmul v4f32:$vA, v4f32:$vB), (VMADDFP $vA, $vB, (v4i32 (VSLW (v4i32 (V_SETALLONES)), (v4i32 (V_SETALLONES)))))>; -// Fused multiply add and multiply sub for packed float. These are represented -// separately from the real instructions above, for operations that must have -// the additional precision, such as Newton-Rhapson (used by divide, sqrt) -def : Pat<(PPCvmaddfp v4f32:$A, v4f32:$B, v4f32:$C), - (VMADDFP $A, $B, $C)>; -def : Pat<(PPCvnmsubfp v4f32:$A, v4f32:$B, v4f32:$C), - (VNMSUBFP $A, $B, $C)>; - def : Pat<(int_ppc_altivec_vmaddfp v4f32:$A, v4f32:$B, v4f32:$C), (VMADDFP $A, $B, $C)>; def : Pat<(int_ppc_altivec_vnmsubfp v4f32:$A, v4f32:$B, v4f32:$C), diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td index 194e720..4825465 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -168,8 +168,6 @@ def PPChi : SDNode<"PPCISD::Hi", SDTIntBinOp, []>; def PPClo : SDNode<"PPCISD::Lo", SDTIntBinOp, []>; def PPCtoc_entry: SDNode<"PPCISD::TOC_ENTRY", SDTIntBinOp, [SDNPMayLoad, SDNPMemOperand]>; -def PPCvmaddfp : SDNode<"PPCISD::VMADDFP", SDTFPTernaryOp, []>; -def PPCvnmsubfp : SDNode<"PPCISD::VNMSUBFP", SDTFPTernaryOp, []>; def PPCppc32GOT : SDNode<"PPCISD::PPC32_GOT", SDTIntLeaf, []>; -- 2.7.4